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Re: [SeaBIOS] Chromebook doesn't boot BSD
by Ronny Schneider 16 Feb '16

16 Feb '16

> Am 15.02.2016 um 15:40 schrieb edward wandasiewicz <0.w3ntd(a)gmail.com>: > > On Sun, Feb 14, 2016 at 11:02 PM, Kevin O'Connor <kevin(a)koconnor.net> wrote: >> On Sun, Feb 14, 2016 at 08:30:47PM +0100, Ronny Schneider wrote: >>>> Am 14.02.2016 um 19:29 schrieb Kevin O'Connor <kevin(a)koconnor.net>: >>>> On Sun, Feb 14, 2016 at 06:04:16PM +0100, Ronny Schneider wrote: >>>>> Hello there, >>>>> >>>>> i have a Toshiba Chromebook 2 (CB30-B-104) with a flashed on SeaBIOS by the script from John Lewis: https://johnlewis.ie/custom-chromebook-firmware/rom-download/ >>>>> >>>>> Linux is running very well but i want to see OpenBSD 5.8 on this laptop. But it’s not working, neither do FreeBSD 10.2, NetBSD 7.0 or DragonFly 4.2. The boot stops at the point where the kernel wants to mount the root-filesystem. I even copied an installed OpenBSD-System from an usb-stick onto the emmc-flash of the chromebook but it’s not working. >>>>> >>>>> I googled arround and found out the problem is not unknown among the Chromebook Pixel. So i thought i could help a little by providing my cbmem-bootlog for my machine: http://pastebin.com/asLqar5q >>>>> If i can do more to see OpenBSD booting on this laptop, please let me know :-) >>>> >>>> When you say "it's not working" - what happens - does the machine hang or does it attempt to reboot? >>>> If it hangs, are you sure the machine is really stuck instead of just the display not working? >>> >>> The Display is working all the time. Using NetBSD, it also applies the native resolution of the panel. >>> >>>> If it hangs, can you provide all the information on the screen prior to the hang. >>> >>> I used the amd64 install-images on an 64GB USB3-Stick for the following pictures. If you want me to copy the installer-images onto the mmc of the chromebook, tell me please. >>> >>> With FreeBSD 11 it freezes. The machine hangs at the moment the kernel tries to mount the root-filesystem and does not respond to any keypress anymore. I have to shutdown the chromebook by keep pressing on the powerbutton for a few seconds. >>> Image: http://bilderhochladen.org/i/SFrHFStWws/ >>> >>> With OpenBSD 5.8 it „stalls“. The Cursor is blinking but nothing more happens. Although the chromebook shuts down when the powerbutton is pressed. >>> Image: http://bilderhochladen.org/i/4jFRYDYO11/ >>> >>> With NetBSD 7.0 it „stalls“ too. The Cursor is not blinking but i can enter a „root device“. If nothing is entered it gives me the choice of either „ddb“, „halt“ or „reboot“. „Halt" and „Reboot" are working properly, the machine shuts down or reboots correctly. >>> Image 1: http://bilderhochladen.org/i/zgq1usG2Ri/ >>> Image 2: http://bilderhochladen.org/i/EqVSDbn25x/ >>> >>> With Dragonfly 4.2 the kernel stops at the moment it tries to mount the root-filesystem and asks me to enter the device. The machine has to be shut down via holding the powerbutton for a few seconds. >>> Image 1: http://bilderhochladen.org/i/TRIdjee9VP/ >>> Image 2: http://bilderhochladen.org/i/khPrwt4P0C/ >>> >> >> So if I understand correctly, you are attempting to launch BSD install >> media from a USB drive, and the installer fails to start? >> >> This doesn't look like a typical SeaBIOS issue > > Try OpenBSD snapshots. > > You're findings on the Toshiba Chromebook 2 may vary from what I found > with the Chromebook Pixel 2015. > > bsd.rd - you cant directly boot a bsd.rd kernel as it doesn't load > inteldrm. VGA only, but there's no VGA 800x600 resolution for SeaBIOS > to use, hence no dmesg output. It does boot, but you don't see the > screen changes. > > bsd - snapshots only - will load inteldrm > > bsd 5.8 - will not load inteldrm > > It will load the kernel (bsd snapsots) but won't display any dmesg > output, until the kernel finds inteldrm, then it will output dmesg and > hey presto, we've booted up. > > If you want to update OpenBSD bsd, I use arch Linux and boot bsd.rd > through qemu. > > This patch > > http://cvsweb.openbsd.org/cgi-bin/cvsweb/src/sys/dev/pci/drm/i915/i915_drv.… > > Revision 1.95 fixes this issue, hence snapshots only. > > This only refers to the Chromebook Pixel 2015 only. > > If we run > > $ vbeinfo > > in grub2, we only get one resolution available, of 1280 x 850 x 16. No > 800 x 600, so no dmesg output till inteldrm hits. > > Coolstar organisation on Google+ (search coreboot Google+) has found a > patch for Coreboot to fix this resolution problem at boot,. > > I used > > http://goo.gl/9sgchs > > from https://wiki.archlinux.org/index.php/Chrome_OS_devices > > to repartition the SSD on the Pixel 2015, install Arch, Grub2 & > OpenBSD keeping ChromeOS too for updates to Coreboot & SeaBIOS. > > You can install OpenBSD to the SSD and write the MBR (no Grub > installed) and it will boot up via Ctrl-L keeping ChromeOS via Ctrl-D. > But you need another OS to boot bsd.rd via qemu to update files from > snapshots/amd64 to upgrade OpenBSD going forward. > > Haven't tried the other BSD's. > > Edward. I tried the latest OpenBSD snapshot 5.9 and it doesn’t work - neither using USB-Stick nor SD-Card. The latest snapshots from FreeBSD, NetBSD and DragonFlyBSD also do not work. >> - it looks more like the various BSD kernels don't like the USB controller and/or USB drive on your machine. Have you tried using a different type of USB drive for the install media? It's also possible there's something in the ACPI tables that coreboot provides that is confusing the BSDs. I tried several usb-sticks and sd-cards. Every time the same result: it doesn’t work. If i boot NetBSD without ACPI-support the screen turns black and stays this way until the machine is shut down. >> Your logs seem to indicate you also have an eMMC and an SD card. Have you tried placing the install media on an SD card instead of USB? That’s right. The main storage device of this Chromebook is an eMMC. Booting from SD card is working if it is a linux. BSD won’t start from. The same results as using an usb stick. >> Another thing you could do is launch the install media with the same verson of SeaBIOS on QEMU emulating an XHCI drive and SD drive - just to see if it's possible to reproduce outside of your particular >> machine. See below. Using QEMU it is working flawlessly, wether the SeaBIOS version is 1.8, 1.9 or 1.9.1 (which i compiled myself). So it really seems to be a problem with the BSDs. Greetings, — Ronny

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Chromebook doesn't boot BSD
by Ronny Schneider 16 Feb '16

16 Feb '16

Hello there, i have a Toshiba Chromebook 2 (CB30-B-104) with a flashed on SeaBIOS by the script from John Lewis: https://johnlewis.ie/custom-chromebook-firmware/rom-download/ Linux is running very well but i want to see OpenBSD 5.8 on this laptop. But it’s not working, neither do FreeBSD 10.2, NetBSD 7.0 or DragonFly 4.2. The boot stops at the point where the kernel wants to mount the root-filesystem. I even copied an installed OpenBSD-System from an usb-stick onto the emmc-flash of the chromebook but it’s not working. I googled arround and found out the problem is not unknown among the Chromebook Pixel. So i thought i could help a little by providing my cbmem-bootlog for my machine: http://pastebin.com/asLqar5q If i can do more to see OpenBSD booting on this laptop, please let me know :-) Thank you very much! Greetings, — Ronny Schneider

3 4

ipxe/seabios: segment register initialization
by Victor Kaplansky 16 Feb '16

16 Feb '16

Hi, I've created a boot-sector which works just fine when loaded directly from BIOS, but doesn't work when loaded by ipxe: 0: b8 ad de mov ax,0xdead 3: a3 10 7c mov ds:0x7c10,ax 0xdead is not written to 0000:7c10. The reason is that BIOS have data segment register initialized to zero, while ipxe leaves it dirty before the jump to boot sector code. After adding to boot sector some code to initialize DS register, my code works well: 0: b8 00 00 mov ax,0x0 3: 8e d8 mov ds,ax 5: b8 ad de mov ax,0xdead 8: a3 10 7c mov ds:0x7c10,ax Is such behaviour intentional, or it is a bug? Who is responsible for segment registers initialization? Thanks, -- Victor

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AHCI: Set transfer mode according to the capabilities of connected drive
by Zeh, Werner 15 Feb '16

15 Feb '16

Hi Kevin. We had some issues with some connected AHCI devices in SeaBIOS. We have connected some CF-Cards by using a simple SATA<->IDE bridge to the mainboard and in some cases, the drive (which is the CF-card) was not recognized correctly. After some deeper analysis we found that SeaBIOS does not set up the transfer rate which is used to communicate to the drive. The supported transfer rate can be found in the data structure which is delivered by IDENTIFY_DEVICE command. So in our error cases the default transfer rate was too high and therefore data error has occurred. I have attached a patch which will deal with this case on AHCI controllers. Maybe you can push this patch to mainline or at least have a look at it. Up to now I have verified the function of this patch with the latest master branch of SeaBIOS and a Broadwell-DE CPU. I have used PIO4, default PIO, Multiword-DMA2 and several Ultra-DMA CF-cards to ensure that all three paths work properly. BTW: I am not that familiar with code style in SeaBIOS. If I made some formal mistakes, feel free to correct them. Thank you in advance Werner

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[PATCH 00/14] Clean up PCI BAR handling
by Kevin O'Connor 08 Feb '16

08 Feb '16

This series adds some helper functions for working with PCI BARs (Base Address Registers), and it then updates all the drivers to use these helper functions. The new helper functions perform sanity checks on the BARs and make sure the appropriate pci command register flags are enabled. The existing driver code was inconsistent with these checks. At the end of this series, the pci->have_driver flag is also consistently set on any PCI device that there is a SeaBIOS driver for. This will make sure SeaBIOS does not attempt to load an option rom for a device that SeaBIOS already has a native driver for. This series is also available at: https://github.com/KevinOConnor/seabios/tree/testing -Kevin Kevin O'Connor (14): pci: Add helper functions for internal driver BAR handling ahci: Convert to new PCI BAR helper functions ata: Convert to new PCI BAR helper functions esp-scsi: Convert to new PCI BAR helper functions lsi-scsi: Convert to new PCI BAR helper functions megasas: Convert to new PCI BAR helper functions pvscsi: Convert to new PCI BAR helper functions sdcard: Convert to new PCI BAR helper functions ehci: Convert to new PCI BAR helper functions ohci: Convert to new PCI BAR helper functions uhci: Convert to new PCI BAR helper functions xhci: Convert to new PCI BAR helper functions virtio: Convert to new PCI BAR helper functions pci: Consistently set pci->have_drivers for devices with internal drivers src/hw/ahci.c | 35 ++++++++++++++---------------- src/hw/ahci.h | 3 +-- src/hw/ata.c | 26 +++++++++++------------ src/hw/esp-scsi.c | 13 ++++++------ src/hw/lsi-scsi.c | 13 ++++++------ src/hw/megasas.c | 18 +++++++--------- src/hw/pci.c | 61 +++++++++++++++++++++++++++++++++++++++++++++++++++++ src/hw/pci.h | 3 +++ src/hw/pvscsi.c | 17 +++++++-------- src/hw/sdcard.c | 15 ++++++------- src/hw/usb-ehci.c | 12 +++++------ src/hw/usb-ohci.c | 17 +++++++-------- src/hw/usb-uhci.c | 16 ++++++++------ src/hw/usb-xhci.c | 27 ++++++++++++------------ src/hw/virtio-pci.c | 36 +++++++++++++++++-------------- src/hw/virtio-pci.h | 32 ++++++++++++++++------------ 16 files changed, 203 insertions(+), 141 deletions(-) -- 2.5.0

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[PATCH v3 00/11] Add TPM 2 support
by Stefan Berger 07 Feb '16

07 Feb '16

This series of patches adds TPM 2 support to SeaBIOS in the way previously proposed. v2->v3: - Converted TPM_VERSION_* from enum's to #define's and removed unnecessary cases with TPM_VERSION_NONE in switch statements. - Convert the log_entry internal representation to TPM 2 native format. - Added patch that looks at command tags in the TPM_Passthrough API call and return error code in case of TPM version mismatch. v1->v2: - Addressed most of Kevin's comments. - Added patch for writing logs in TPM 2 format Stefan Stefan Berger (11): tpm: Extend TPM TIS with TPM 2 support. tpm: Factor out tpm_extend tpm: Prepare code for TPM 2 functions tpm: Implement tpm20_startup and tpm20_s3_resume tpm: Implement tpm20_set_timeouts tpm: Implement tpm20_prepboot tpm: Implement tpm20_extend tpm: Implement tpm20_menu tpm: Implement TPM 2's tpm_set_failure part tpm: Write logs in TPM 2 format Filter TPM commands in passthrough API src/hw/tpm_drivers.c | 38 ++- src/hw/tpm_drivers.h | 26 +- src/std/tcg.h | 147 +++++++++ src/tcgbios.c | 900 ++++++++++++++++++++++++++++++++++++++++++--------- 4 files changed, 961 insertions(+), 150 deletions(-) -- 2.4.3

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[PATCH 1/2] ehci: Only delay UHCI/OHCI port scan until after EHCI setup completes
by Kevin O'Connor 07 Feb '16

07 Feb '16

EHCI controller setup needs to occur prior to checking any UHCI or OHCI ports to ensure a high speed device is not mistakenly configured on a full speed "companion" controller. However, only the UHCI/OHCI port scan needs to be delayed, not the full UHCI/OHCI controller init. This change moves back the ehci controller setup check until port scan in UHCI/OHCI. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/hw/usb-ehci.c | 8 ++++++-- src/hw/usb-ehci.h | 1 + src/hw/usb-ohci.c | 3 +++ src/hw/usb-uhci.c | 4 ++++ 4 files changed, 14 insertions(+), 2 deletions(-) diff --git a/src/hw/usb-ehci.c b/src/hw/usb-ehci.c index 41f8579..010746c 100644 --- a/src/hw/usb-ehci.c +++ b/src/hw/usb-ehci.c @@ -337,9 +337,13 @@ ehci_setup(void) if (pci_classprog(pci) == PCI_CLASS_SERIAL_USB_EHCI) ehci_controller_setup(pci); } +} - // Wait for all EHCI controllers to initialize. This forces OHCI/UHCI - // setup to always be after any EHCI ports are routed to EHCI. +// Wait for all EHCI controllers to initialize. This forces OHCI/UHCI +// setup to always be after any EHCI ports are routed to EHCI. +void +ehci_wait_controllers(void) +{ while (PendingEHCI) yield(); } diff --git a/src/hw/usb-ehci.h b/src/hw/usb-ehci.h index 88f7b6a..0442188 100644 --- a/src/hw/usb-ehci.h +++ b/src/hw/usb-ehci.h @@ -3,6 +3,7 @@ // usb-ehci.c void ehci_setup(void); +void ehci_wait_controllers(void); struct usbdevice_s; struct usb_endpoint_descriptor; struct usb_pipe; diff --git a/src/hw/usb-ohci.c b/src/hw/usb-ohci.c index 42f8a06..7ed964f 100644 --- a/src/hw/usb-ohci.c +++ b/src/hw/usb-ohci.c @@ -14,6 +14,7 @@ #include "pci_regs.h" // PCI_BASE_ADDRESS_0 #include "string.h" // memset #include "usb.h" // struct usb_s +#include "usb-ehci.h" // ehci_wait_controllers #include "usb-ohci.h" // struct ohci_hcca #include "util.h" // msleep #include "x86.h" // readl @@ -96,6 +97,8 @@ static int check_ohci_ports(struct usb_ohci_s *cntl) { ASSERT32FLAT(); + // Wait for ehci init - in case this is a "companion controller" + ehci_wait_controllers(); // Turn on power for all devices on roothub. u32 rha = readl(&cntl->regs->roothub_a); rha &= ~(RH_A_PSM | RH_A_OCPM); diff --git a/src/hw/usb-uhci.c b/src/hw/usb-uhci.c index 69c33ee..6d8aa47 100644 --- a/src/hw/usb-uhci.c +++ b/src/hw/usb-uhci.c @@ -13,6 +13,7 @@ #include "pci_regs.h" // PCI_BASE_ADDRESS_4 #include "string.h" // memset #include "usb.h" // struct usb_s +#include "usb-ehci.h" // ehci_wait_controllers #include "usb-uhci.h" // USBLEGSUP #include "util.h" // msleep #include "x86.h" // outw @@ -94,6 +95,9 @@ static int check_uhci_ports(struct usb_uhci_s *cntl) { ASSERT32FLAT(); + // Wait for ehci init - in case this is a "companion controller" + ehci_wait_controllers(); + struct usbhub_s hub; memset(&hub, 0, sizeof(hub)); hub.cntl = &cntl->usb; -- 2.5.0

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[PATCH 0/4] Some additional PCI cleanups
by Kevin O'Connor 07 Feb '16

07 Feb '16

Some additional PCI code cleanup - most notable is the first patch which adds a '%pP' modifier to the 'printf' code for outputting 'struct pci_device' pointers. This series is on top of the previous series; it is also at: https://github.com/KevinOConnor/seabios/tree/testing -Kevin Kevin O'Connor (4): pci: Implement '%pP' printf handler for 'struct pci_device' pointers pci: Move code in pci.c that is specific to pciinit.c to pciinit.c pci: Split low-level pci code from higher-level 'struct pci_device' code scsi: Always use MAXDESCSIZE when building drive description Makefile | 2 +- src/boot.c | 1 + src/fw/acpi.c | 2 +- src/fw/coreboot.c | 2 +- src/fw/csm.c | 3 +- src/fw/mptable.c | 5 +- src/fw/mtrr.c | 1 - src/fw/paravirt.c | 3 +- src/fw/pciinit.c | 63 ++++++++--- src/fw/smm.c | 1 + src/hw/ahci.c | 8 +- src/hw/ata.c | 3 +- src/hw/esp-scsi.c | 10 +- src/hw/floppy.c | 2 +- src/hw/lsi-scsi.c | 10 +- src/hw/megasas.c | 12 +-- src/hw/pci.c | 241 +----------------------------------------- src/hw/pci.h | 104 ++---------------- src/hw/{pci.c => pcidevice.c} | 137 +----------------------- src/hw/{pci.h => pcidevice.h} | 71 ++----------- src/hw/pvscsi.c | 10 +- src/hw/sdcard.c | 2 +- src/hw/usb-ehci.c | 6 +- src/hw/usb-ohci.c | 6 +- src/hw/usb-uhci.c | 7 +- src/hw/usb-xhci.c | 9 +- src/hw/virtio-blk.c | 41 +++---- src/hw/virtio-pci.c | 12 +-- src/hw/virtio-scsi.c | 15 +-- src/optionroms.c | 22 ++-- src/output.c | 19 ++++ src/pcibios.c | 1 + src/util.h | 2 + src/vgahooks.c | 3 +- 34 files changed, 173 insertions(+), 663 deletions(-) copy src/hw/{pci.c => pcidevice.c} (64%) copy src/hw/{pci.h => pcidevice.h} (59%) -- 2.5.0

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[RFC PATCH v2] fw/pci: Add support for mapping Intel IGD OpRegion via QEMU
by Alex Williamson 05 Feb '16

05 Feb '16

When assigning Intel IGD graphics via QEMU/vfio, the OpRegion for the device may be exposed as a fw_cfg file. Allocate space for this, copy the contents and write the ASL Storage register (0xFC) to point to this buffer. NB, it's possible for QEMU to use the write to the ASL Storage register to map access to the host OpRegion overlapping the allocated buffer, but we shouldn't care if it does. References: kernel vfio opregion support: https://lkml.org/lkml/2016/2/1/884 QEMU vfio opregion support (revised v2 of 7/7 adds fw_cfg): https://lists.gnu.org/archive/html/qemu-devel/2016-02/msg00202.html Gerd's IGD assignment series: https://lists.gnu.org/archive/html/qemu-devel/2016-01/msg00244.html Signed-off-by: Alex Williamson <alex.williamson(a)redhat.com> --- src/fw/pciinit.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index c31c2fa..92170d5 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -257,6 +257,32 @@ static void ich9_smbus_setup(struct pci_device *dev, void *arg) pci_config_writeb(bdf, ICH9_SMB_HOSTC, ICH9_SMB_HOSTC_HST_EN); } +static void intel_igd_opregion_setup(struct pci_device *dev, void *arg) +{ + struct romfile_s *file = romfile_find("etc/igd-opregion"); + void *opregion; + u16 bdf = dev->bdf; + + if (!file || !file->size) + return; + + opregion = memalign_high(PAGE_SIZE, file->size); + if (!opregion) { + warn_noalloc(); + return; + } + + if (file->copy(file, opregion, file->size) < 0) { + free(opregion); + return; + } + + pci_config_writel(bdf, 0xFC, cpu_to_le32((u32)opregion)); + + dprintf(1, "Intel IGD OpRegion enabled on %02x:%02x.%x\n", + pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf), pci_bdf_to_fn(bdf)); +} + static const struct pci_device_id pci_device_tbl[] = { /* PIIX3/PIIX4 PCI to ISA bridge */ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_0, @@ -290,6 +316,10 @@ static const struct pci_device_id pci_device_tbl[] = { PCI_DEVICE_CLASS(PCI_VENDOR_ID_APPLE, 0x0017, 0xff00, apple_macio_setup), PCI_DEVICE_CLASS(PCI_VENDOR_ID_APPLE, 0x0022, 0xff00, apple_macio_setup), + /* Intel IGD OpRegion setup */ + PCI_DEVICE_CLASS(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA, + intel_igd_opregion_setup), + PCI_DEVICE_END, };

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[PATCH] block: Move drive setup to new function block_setup()
by Kevin O'Connor 04 Feb '16

04 Feb '16

Move the list of drive setup calls from post.c to a new function in block.c. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/block.c | 16 ++++++++++++++++ src/block.h | 1 + src/post.c | 22 ++-------------------- 3 files changed, 19 insertions(+), 20 deletions(-) diff --git a/src/block.c b/src/block.c index b4530fc..b231c01 100644 --- a/src/block.c +++ b/src/block.c @@ -487,6 +487,22 @@ fill_edd(struct segoff_s edd, struct drive_s *drive_gf) * Disk driver dispatch ****************************************************************/ +void +block_setup(void) +{ + floppy_setup(); + ata_setup(); + ahci_setup(); + sdcard_setup(); + ramdisk_setup(); + virtio_blk_setup(); + virtio_scsi_setup(); + lsi_scsi_setup(); + esp_scsi_setup(); + megasas_setup(); + pvscsi_setup(); +} + // Fallback handler for command requests not implemented by drivers int default_process_op(struct disk_op_s *op) diff --git a/src/block.h b/src/block.h index 2ff359f..8f4c1aa 100644 --- a/src/block.h +++ b/src/block.h @@ -111,6 +111,7 @@ void map_hd_drive(struct drive_s *drive); void map_cd_drive(struct drive_s *drive); struct int13dpt_s; int fill_edd(struct segoff_s edd, struct drive_s *drive_gf); +void block_setup(void); int default_process_op(struct disk_op_s *op); int process_op(struct disk_op_s *op); int send_disk_op(struct disk_op_s *op); diff --git a/src/post.c b/src/post.c index e5fa4be..c82ab17 100644 --- a/src/post.c +++ b/src/post.c @@ -6,24 +6,17 @@ // This file may be distributed under the terms of the GNU LGPLv3 license. #include "biosvar.h" // SET_BDA +#include "block.h" // block_setup #include "bregs.h" // struct bregs #include "config.h" // CONFIG_* #include "e820map.h" // e820_add #include "fw/paravirt.h" // qemu_cfg_preinit #include "fw/xen.h" // xen_preinit -#include "hw/ahci.h" // ahci_setup -#include "hw/ata.h" // ata_setup -#include "hw/esp-scsi.h" // esp_scsi_setup -#include "hw/lsi-scsi.h" // lsi_scsi_setup -#include "hw/megasas.h" // megasas_setup -#include "hw/pvscsi.h" // pvscsi_setup #include "hw/pic.h" // pic_setup #include "hw/ps2port.h" // ps2port_setup #include "hw/rtc.h" // rtc_write #include "hw/serialio.h" // serial_debug_preinit #include "hw/usb.h" // usb_setup -#include "hw/virtio-blk.h" // virtio_blk_setup -#include "hw/virtio-scsi.h" // virtio_scsi_setup #include "malloc.h" // malloc_init #include "memmap.h" // SYMBOL #include "output.h" // dprintf @@ -136,19 +129,8 @@ device_hardware_setup(void) ps2port_setup(); lpt_setup(); serial_setup(); - - floppy_setup(); - ata_setup(); - ahci_setup(); - sdcard_setup(); + block_setup(); cbfs_payload_setup(); - ramdisk_setup(); - virtio_blk_setup(); - virtio_scsi_setup(); - lsi_scsi_setup(); - esp_scsi_setup(); - megasas_setup(); - pvscsi_setup(); } static void -- 2.5.0

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