SeaBIOS

seabios@seabios.org

3806 discussions

[PATCH 0/2] print some errors to the screen
by Gerd Hoffmann 09 May '23

09 May '23

Gerd Hoffmann (2): add hwerr_printf function for threads display error message for blocksizes != 512 src/output.h | 5 +++++ src/hw/blockcmd.c | 2 +- src/hw/virtio-blk.c | 4 ++-- src/output.c | 17 +++++++++++++++++ src/post.c | 4 ++++ 5 files changed, 29 insertions(+), 3 deletions(-) -- 2.40.1

2 5

[PATCH v2 0/6] misc tweaks for kvm and the 64bit pci window
by Gerd Hoffmann 04 May '23

04 May '23

v2 changes: - e820 conflict fix Gerd Hoffmann (6): better kvm detection detect physical address space size move 64bit pci window to end of address space be less conservative with the 64bit pci io window qemu: log reservations in fw_cfg e820 table check for e820 conflict src/e820map.h | 1 + src/fw/paravirt.h | 2 ++ src/e820map.c | 15 +++++++++ src/fw/paravirt.c | 86 ++++++++++++++++++++++++++++++++++++++++++----- src/fw/pciinit.c | 20 ++++++++++- 5 files changed, 114 insertions(+), 10 deletions(-) -- 2.40.1

2 7

Large 32 bit BAR's
by Wannes Bouwen (Nokia) 14 Apr '23

14 Apr '23

Hello, I'm running a x86 QEMU with Ubuntu. On this system we want to emulate a PCIe device which contains a large 32-bit BAR (2 GiB). This is not working and I get following error: SeaBIOS (version rel-1.14.0-0-g155821a-20210629_105355-sharpie) BUILD: gcc: (GCC) 4.8.5 20150623 (Red Hat 4.8.5-36) binutils: version 2.27-34.base.el7 No Xen hypervisor found. Running on QEMU (q35) Running on KVM Found QEMU fw_cfg QEMU fw_cfg DMA interface supported qemu/e820: addr 0x0000000000000000 len 0x0000000080000000 [RAM] qemu/e820: addr 0x0000000100000000 len 0x0000000180000000 [RAM] Relocating init from 0x000d4de0 to 0x7ffa9420 (size 93008) Moving pm_base to 0x600 kvmclock: at 0xeb040 (msr 0x4b564d01) kvmclock: stable tsc, 2992 MHz CPU Mhz=2992 (kvmclock) === PCI bus & bridge init === PCI: pci_bios_init_bus_rec bus = 0x0 PCI: pci_bios_init_bus_rec bdf = 0x20 PCI: primary bus = 0x0 PCI: secondary bus = 0xff -> 0x1 PCI: pci_bios_init_bus_rec bus = 0x1 PCI: subordinate bus = 0x0 -> 0x1 === PCI device probing === Found 12 PCI devices (max PCI bus is 01) PCIe: using q35 mmconfig at 0xb0000000 === PCI new allocation pass #1 === PCI: check devices PCI: secondary bus 1 size 00000000 type io PCI: secondary bus 1 size 100000000 type mem PCI: secondary bus 1 size 100000000 type prefmem === PCI new allocation pass #2 === PCI: IO: c000 - c0ff PCI: 32: 00000000c0000000 - 00000000fec00000 PCI: out of 32bit address space I've had a look at the code and it seems that 32-bit BAR's have a limited memory region available (less than 1 GiB). Is there a possibility to use such large 32-bit BAR's in combination with SeaBios by e.g. mapping them in the higher memory region where 64-bit BAR's are mapped? Thanks in advance! Kind regards, Wannes

4 8

[SeaBIOS PATCH] xen: require Xen info structure at 0x1000 to detect Xen
by David Woodhouse 16 Mar '23

16 Mar '23

From: David Woodhouse <dwmw(a)amazon.co.uk> When running under Xen, hvmloader places a table at 0x1000 with the e820 information and BIOS tables. If this isn't present, SeaBIOS will currently panic. We now have support for running Xen guests natively in QEMU/KVM, which boots SeaBIOS directly instead of via hvmloader, and does not provide the same structure. As it happens, this doesn't matter on first boot. because although we set PlatformRunningOn to PF_QEMU|PF_XEN, reading it back again still gives zero. Presumably because in true Xen, this is all already RAM. But in QEMU with a faithfully-emulated PAM config in the host bridge, it's still in ROM mode at this point so we don't see what we've just written. On reboot, however, the region *is* set to RAM mode and we do see the updated value of PlatformRunningOn, do manage to remember that we've detected Xen in CPUID, and hit the panic. It's not trivial to detect QEMU vs. real Xen at the time xen_preinit() runs, because it's so early. We can't even make a XENVER_extraversion hypercall to look for hints, because we haven't set up the hypercall page (and don't have an allocator to give us a page in which to do so). So just make Xen detection contingent on the info structure being present. If it wasn't, we were going to panic anyway. That leaves us taking the standard QEMU init path for Xen guests in native QEMU, which is just fine. Untested on actual Xen but ObviouslyCorrect™. Signed-off-by: David Woodhouse <dwmw(a)amazon.co.uk> --- src/fw/xen.c | 45 ++++++++++++++++++++++++++++++++------------- 1 file changed, 32 insertions(+), 13 deletions(-) diff --git a/src/fw/xen.c b/src/fw/xen.c index a215b9e..00e4b0c 100644 --- a/src/fw/xen.c +++ b/src/fw/xen.c @@ -40,16 +40,25 @@ struct xen_seabios_info { u32 e820_nr; } PACKED; -static void validate_info(struct xen_seabios_info *t) +static struct xen_seabios_info *validate_info(void) { - if ( memcmp(t->signature, "XenHVMSeaBIOS", 14) ) - panic("Bad Xen info signature\n"); + struct xen_seabios_info *t = (void *)INFO_PHYSICAL_ADDRESS; - if ( t->length < sizeof(struct xen_seabios_info) ) - panic("Bad Xen info length\n"); + if ( memcmp(t->signature, "XenHVMSeaBIOS", 14) ) { + dprintf(1, "Bad Xen info signature\n"); + return NULL; + } + + if ( t->length < sizeof(struct xen_seabios_info) ) { + dprintf(1, "Bad Xen info length\n"); + return NULL; + } - if (checksum(t, t->length) != 0) - panic("Bad Xen info checksum\n"); + if (checksum(t, t->length) != 0) { + dprintf(1, "Bad Xen info checksum\n"); + return NULL; + } + return t; } void xen_preinit(void) @@ -86,7 +95,10 @@ void xen_preinit(void) dprintf(1, "No Xen hypervisor found.\n"); return; } - PlatformRunningOn = PF_QEMU|PF_XEN; + if (validate_info()) + PlatformRunningOn = PF_QEMU|PF_XEN; + else + dprintf(1, "Not enabling Xen support due to lack of Xen info\n"); } static int hypercall_xen_version( int cmd, void *arg) @@ -122,10 +134,14 @@ void xen_hypercall_setup(void) void xen_biostable_setup(void) { - struct xen_seabios_info *info = (void *)INFO_PHYSICAL_ADDRESS; - void **tables = (void*)info->tables; + struct xen_seabios_info *info = validate_info(); + void **tables; int i; + if (!info) + panic("Xen info corrupted\n"); + + tables = (void*)info->tables; dprintf(1, "xen: copy BIOS tables...\n"); for (i=0; i<info->tables_nr; i++) copy_table(tables[i]); @@ -136,12 +152,15 @@ void xen_biostable_setup(void) void xen_ramsize_preinit(void) { int i; - struct xen_seabios_info *info = (void *)INFO_PHYSICAL_ADDRESS; - struct e820entry *e820 = (struct e820entry *)info->e820; - validate_info(info); + struct xen_seabios_info *info = validate_info(); + struct e820entry *e820; + + if (!info) + panic("Xen info corrupted\n"); dprintf(1, "xen: copy e820...\n"); + e820 = (struct e820entry *)info->e820; for (i = 0; i < info->e820_nr; i++) { struct e820entry *e = &e820[i]; e820_add(e->start, e->size, e->type); -- 2.34.1

4 8

[PATCH] Fix Bay Trail Chromebook Bootup
by Christopher Lentocha 15 Feb '23

15 Feb '23

on MrChromebox's Custom Firmware while using the SeaBios payload with MrChromebox's SMM variable in coreboot. This is required even if we are booting off of a USB, since it will give MMC errors in Linux and Windows 10 won't see it. See comments and code in ./src/boot.c for more information. Signed-off-by: Christopher Lentocha <christopherericlentocha(a)gmail.com> --- src/boot.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/src/boot.c b/src/boot.c index 1effd80..8433f51 100644 --- a/src/boot.c +++ b/src/boot.c @@ -871,6 +871,21 @@ call_boot_entry(struct segoff_s bootsegip, u8 bootdrv) // Set the magic number in ax and the boot drive in dl. br.dl = bootdrv; br.ax = 0xaa55; + // Fix Bay Trail Chromebook Bootup + // on MrChromebox's Custom Firmware + // while using the SeaBios payload + // with MrChromebox's SMM variable in coreboot. + // This is required even if we are booting off of a USB, + // since it will give MMC errors in Linux and Windows 10 + // won't see it. + outb(0xcd, 0xb2); + // Don't Add the line above this comment to CBFS booting, + // because EDK2 as 2nd payload breaks, + // since its already being applied there too, + // and we should expect all CBFS payloads in ROM to do + // what we are doing here. + // The same bug is also in EDK2, so this line would need to be + // added in a similar way for EDK2 code. farcall16(&br); } -- 2.35.1

5 4

SeaBIOS 1.16.1 release
by Marek Marczykowski-Górecki 03 Feb '23

03 Feb '23

Hello, I see rel-1.16.1 tag on https://review.coreboot.org/plugins/gitiles/seabios/, but that's about the only place where it's visible - no tarball, no info on https://www.seabios.org/Releases etc. Is 1.16.1 an actual release? -- Best Regards, Marek Marczykowski-Górecki Invisible Things Lab

2 1

[PATCH 0/4] misc tweaks for kvm and the 64bit pci window
by Gerd Hoffmann 20 Jan '23

20 Jan '23

Gerd Hoffmann (4): better kvm detection detect physical address space size move 64bit pci window to end of address space be less conservative with the 64bit pci io window src/fw/paravirt.h | 2 ++ src/fw/paravirt.c | 87 ++++++++++++++++++++++++++++++++++++++++++----- src/fw/pciinit.c | 16 ++++++++- 3 files changed, 96 insertions(+), 9 deletions(-) -- 2.38.1

5 11

"Press ESC for boot menu"
by Mahmut Olger 21 Dec '22

21 Dec '22

Hello, We are using intel atom C3558 denverton_NS platform. This platform is booting with coreboot4.16. Payload of coreboot is Seabios. Openbsd running in our board. Coreboot is booting successfully. I press ESC key when I see "Press ESC for boot menu" print but I can not select boot device. It is booting automatically. I want to select boot device. I check seabios community and disabled CONFIG_HARDWARE_IRQ but nothing changed. You can find seabios config file above. You can find coreboot config file above. How can i solve this problem. Mahmut ÖLGER Embedded Software Engineer.

2 1

[PATCH v4 0/4] Make seabios linkable with lld
by Fangrui Song 07 Dec '22

07 Dec '22

Another try after https://mail.coreboot.org/hyperkitty/list/seabios@seabios.org/thread/KBHQU4… The only change is the removal of `Makefile: Change ET_EXEC to ET_REL so that lld can link bios.bin.elf` since 699a4e5d6919cc8eae5342443025ceb6909dc276 ("ldnoexec: Add script to remove ET_EXEC flag from intermediate build objects") has done the same thing. For your convenience, the patch series is available on https://github.com/MaskRay/seabios/tree/lld Re-sending. I posted this 3 days but got bounced. I have now ensured there is my email address record on (previously not) https://mail.coreboot.org/postorius/lists/seabios.seabios.org/ as well as https://mail.coreboot.org/hyperkitty/list/seabios@seabios.org/ Fangrui Song (4): romlayout.S: Add missing SHF_ALLOC flag to .fixedaddr.\addr Make rom16.o linkable with lld romlayout32flag.lds: Use `. +=` instead of `. =` test-build.sh: Delete unneeded LD capability test scripts/layoutrom.py | 8 +++++++- scripts/test-build.sh | 42 +----------------------------------------- src/romlayout.S | 2 +- 3 files changed, 9 insertions(+), 43 deletions(-) -- 2.37.0.144.g8ac04bfd2-goog

3 7

SeaBIOS USB issues
by Sorin Pop 02 Dec '22

02 Dec '22

Hi I have tried to get SeaBIOS to enable usb and mouse support but seabios always gets stuck while I have USB enabled and the devices connected (regardless if it is just the keyboard, mouse, usb mass storage or any combination of them) Below I have attached the logs from coreboot and seabios (I have tested both 1.11 and 1.16 and none work) Does anyone have any clue on what might be the problem? Thanks

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