February 2013 - SeaBIOS - mail.coreboot.org

9-segment allocator
by Kevin O'Connor Feb. 23, 2013

Feb. 23, 2013

SeaBIOS v1.7.0 and earlier had an allocator that would reserve memory in the "9-segment" - memory at the end of the first 640K. (Subsequent versions of SeaBIOS allocate ram for "low memory" in the e-segment.) I recently revived the 9-segment code for testing purposes. I don't plan to commit this to the SeaBIOS repo - I'm posting it here in case there is interest. It is also available at: https://github.com/KevinOConnor/seabios/tree/test-9segment-20130223 -Kevin >From 3608cf00a12c33f03c8dcb3f3ba272effdf3dfb7 Mon Sep 17 00:00:00 2001 From: Kevin O'Connor <kevin(a)koconnor.net> Date: Mon, 18 Feb 2013 10:45:39 -0500 Subject: [PATCH] Revive 9-segment allocator. To: seabios(a)seabios.org May be useful for testing. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/Kconfig | 9 +++++ src/pmm.c | 113 ++++++++++++++++++++++++++++++++++++++++++++++++----- src/post.c | 10 +++-- src/shadow.c | 4 +- src/stacks.c | 3 +- tools/layoutrom.py | 9 +++-- 6 files changed, 131 insertions(+), 17 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index 98a6642..c88aaec 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -104,6 +104,15 @@ endchoice help Support floppy images in coreboot flash. + config MALLOC_UPPERMEMORY + bool "Allocate memory that needs to be in first Meg above 0xc0000" + default y + help + Use the "Upper Memory Block" area for internal "low + memory" allocations. If this is not selected, the memory + is instead allocated between 0x90000-0xa0000 (the + "9-segment"). + endmenu menu "Hardware support" diff --git a/src/pmm.c b/src/pmm.c index f02cf62..829547f 100644 --- a/src/pmm.c +++ b/src/pmm.c @@ -174,8 +174,12 @@ static struct allocinfo_s *RomBase; u32 rom_get_max(void) { - return ALIGN_DOWN((u32)RomBase->allocend - OPROM_HEADER_RESERVE - , OPTION_ROM_ALIGN); + if (CONFIG_MALLOC_UPPERMEMORY) + return ALIGN_DOWN((u32)RomBase->allocend - OPROM_HEADER_RESERVE + , OPTION_ROM_ALIGN); + extern u8 code32init_end[]; + u32 end = (u32)code32init_end; + return end > BUILD_BIOS_ADDR ? BUILD_BIOS_ADDR : end; } // Return the end of the last deployed option rom. @@ -189,6 +193,11 @@ rom_get_last(void) struct rom_header * rom_reserve(u32 size) { + if (!CONFIG_MALLOC_UPPERMEMORY) { + if (RomEnd + size > rom_get_max()) + return NULL; + return (void*)RomEnd; + } u32 newend = ALIGN(RomEnd + size, OPTION_ROM_ALIGN) + OPROM_HEADER_RESERVE; if (newend > (u32)RomBase->allocend) return NULL; @@ -313,8 +322,14 @@ malloc_init(void) // Initialize low-memory region extern u8 varlow_start[], varlow_end[], final_varlow_start[]; memmove(final_varlow_start, varlow_start, varlow_end - varlow_start); - addSpace(&ZoneLow, zonelow_base + OPROM_HEADER_RESERVE, final_varlow_start); - RomBase = findLast(&ZoneLow); + if (CONFIG_MALLOC_UPPERMEMORY) { + addSpace(&ZoneLow, zonelow_base + OPROM_HEADER_RESERVE + , final_varlow_start); + RomBase = findLast(&ZoneLow); + } else { + addSpace(&ZoneLow, (void*)ALIGN_DOWN((u32)final_varlow_start, 1024) + , final_varlow_start); + } // Add space available in f-segment to ZoneFSeg extern u8 zonefseg_start[], zonefseg_end[]; @@ -330,13 +345,19 @@ malloc_prepboot(void) ASSERT32FLAT(); dprintf(3, "malloc finalize\n"); - // Place an optionrom signature around used low mem area. u32 base = rom_get_max(); - struct rom_header *dummyrom = (void*)base; - dummyrom->signature = OPTION_ROM_SIGNATURE; - int size = (BUILD_BIOS_ADDR - base) / 512; - dummyrom->size = (size > 255) ? 255 : size; memset((void*)RomEnd, 0, base-RomEnd); + if (CONFIG_MALLOC_UPPERMEMORY) { + // Place an optionrom signature around used low mem area. + struct rom_header *dummyrom = (void*)base; + dummyrom->signature = OPTION_ROM_SIGNATURE; + int size = (BUILD_BIOS_ADDR - base) / 512; + dummyrom->size = (size > 255) ? 255 : size; + } + + // Reserve more low-mem if needed. + u32 endlow = GET_BDA(mem_size_kb)*1024; + add_e820(endlow, BUILD_LOWRAM_END-endlow, E820_RESERVED); // Clear unused f-seg ram. struct allocinfo_s *info = findLast(&ZoneFSeg); @@ -357,6 +378,78 @@ malloc_prepboot(void) /**************************************************************** + * ebda movement + ****************************************************************/ + +// Move ebda +static int +relocate_ebda(u32 newebda, u32 oldebda, u8 ebda_size) +{ + u32 lowram = GET_BDA(mem_size_kb) * 1024; + if (oldebda != lowram) + // EBDA isn't at end of ram - give up. + return -1; + + // Do copy + memmove((void*)newebda, (void*)oldebda, ebda_size * 1024); + + // Update indexes + dprintf(1, "ebda moved from %x to %x\n", oldebda, newebda); + SET_BDA(mem_size_kb, newebda / 1024); + SET_BDA(ebda_seg, FLATPTR_TO_SEG(newebda)); + return 0; +} + +// Support expanding the ZoneLow dynamically. +static void * +zonelow_expand(u32 size, u32 align, struct allocinfo_s *fill) +{ + // Make sure to not move ebda while an optionrom is running. + if (unlikely(wait_preempt())) { + void *data = allocSpace(&ZoneLow, size, align, fill); + if (data) + return data; + } + + struct allocinfo_s *info = findLast(&ZoneLow); + if (!info) + return NULL; + u32 oldpos = (u32)info->allocend; + u32 newpos = ALIGN_DOWN(oldpos - size, align); + u32 bottom = (u32)info->dataend; + if (newpos >= bottom && newpos <= oldpos) + // Space already present. + return allocSpace(&ZoneLow, size, align, fill); + u16 ebda_seg = get_ebda_seg(); + u32 ebda_pos = (u32)MAKE_FLATPTR(ebda_seg, 0); + u8 ebda_size = GET_EBDA(ebda_seg, size); + u32 ebda_end = ebda_pos + ebda_size * 1024; + if (ebda_end != bottom) + // Something else is after ebda - can't use any existing space. + newpos = ALIGN_DOWN(ebda_end - size, align); + u32 newbottom = ALIGN_DOWN(newpos, 1024); + u32 newebda = ALIGN_DOWN(newbottom - ebda_size * 1024, 1024); + if (newebda < BUILD_EBDA_MINIMUM) + // Not enough space. + return NULL; + + // Move ebda + int ret = relocate_ebda(newebda, ebda_pos, ebda_size); + if (ret) + return NULL; + + // Update zone + if (ebda_end == bottom) { + info->data = (void*)newbottom; + info->dataend = (void*)newbottom; + } else + addSpace(&ZoneLow, (void*)newbottom, (void*)ebda_end); + + return allocSpace(&ZoneLow, size, align, fill); +} + + +/**************************************************************** * tracked memory allocations ****************************************************************/ @@ -380,6 +473,8 @@ pmm_malloc(struct zone_s *zone, u32 handle, u32 size, u32 align) // Find and reserve space for main allocation void *data = allocSpace(zone, size, align, &detail->datainfo); + if (!CONFIG_MALLOC_UPPERMEMORY && !data && zone == &ZoneLow) + data = zonelow_expand(size, align, &detail->datainfo); if (!data) { freeSpace(&detail->detailinfo); return NULL; diff --git a/src/post.c b/src/post.c index 44bb0b0..70a3be6 100644 --- a/src/post.c +++ b/src/post.c @@ -85,17 +85,21 @@ bda_init(void) memset(bda, 0, sizeof(*bda)); int esize = EBDA_SIZE_START; - SET_BDA(mem_size_kb, BUILD_LOWRAM_END/1024 - esize); u16 ebda_seg = EBDA_SEGMENT_START; + extern u8 final_varlow_start[]; + if (!CONFIG_MALLOC_UPPERMEMORY) + ebda_seg = FLATPTR_TO_SEG(ALIGN_DOWN((u32)final_varlow_start, 1024) + - EBDA_SIZE_START*1024); SET_BDA(ebda_seg, ebda_seg); + SET_BDA(mem_size_kb, ebda_seg / (1024/16)); + // Init ebda struct extended_bios_data_area_s *ebda = get_ebda_ptr(); memset(ebda, 0, sizeof(*ebda)); ebda->size = esize; - add_e820((u32)MAKE_FLATPTR(ebda_seg, 0), GET_EBDA(ebda_seg, size) * 1024 - , E820_RESERVED); + add_e820((u32)ebda, BUILD_LOWRAM_END-(u32)ebda, E820_RESERVED); // Init extra stack StackPos = (void*)(&ExtraStack[BUILD_EXTRA_STACK_SIZE] - zonelow_base); diff --git a/src/shadow.c b/src/shadow.c index e971fe9..5bb1bd7 100644 --- a/src/shadow.c +++ b/src/shadow.c @@ -80,7 +80,9 @@ make_bios_readonly_intel(u16 bdf, u32 pam0) wbinvd(); // Write protect roms from 0xc0000-0xf0000 - u32 romend = rom_get_last(), romtop = rom_get_max(); + u32 romend = rom_get_last(), romtop = BUILD_BIOS_ADDR; + if (CONFIG_MALLOC_UPPERMEMORY) + romtop = rom_get_max(); int i; for (i=0; i<6; i++) { u32 mem = BUILD_ROM_START + i * 32*1024; diff --git a/src/stacks.c b/src/stacks.c index 7423939..3d49d35 100644 --- a/src/stacks.c +++ b/src/stacks.c @@ -456,7 +456,8 @@ finish_preempt(void) int wait_preempt(void) { - if (MODESEGMENT || !CONFIG_THREAD_OPTIONROMS || !CanPreempt) + if (MODESEGMENT || !CONFIG_THREAD_OPTIONROMS || !CanPreempt + || getesp() < 1024*1024) return 0; while (CanPreempt) yield(); diff --git a/tools/layoutrom.py b/tools/layoutrom.py index 6e1c588..d45a37e 100755 --- a/tools/layoutrom.py +++ b/tools/layoutrom.py @@ -238,10 +238,13 @@ def doLayout(sections): # Determine "low memory" data positions li.sections32low = getSectionsCategory(sections, '32low') sec32low_end = li.sec32init_start - final_sec32low_start = min(BUILD_BIOS_ADDR, li.sec32flat_start) - relocdelta = final_sec32low_start - sec32low_end - zonelow_base = final_sec32low_start - 64*1024 + final_sec32low_end = min(BUILD_BIOS_ADDR, li.sec32flat_start) + relocdelta = final_sec32low_end - sec32low_end + zonelow_base = final_sec32low_end - 64*1024 li.zonelow_base = max(BUILD_ROM_START, alignpos(zonelow_base, 2*1024)) + if '.bss.RomBase' not in dict([(s.name, '') for s in sections]): #XXX + relocdelta = 0xa0000 - sec32low_end + li.zonelow_base = 0x90000 li.sec32low_start, li.sec32low_align = setSectionsStart( li.sections32low, sec32low_end, 16 , segoffset=li.zonelow_base - relocdelta) -- 1.7.11.7

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[PATCH] Try to detect an unsuccessful hard-reboot to prevent soft-reboot loops.
by Kevin O'Connor Feb. 23, 2013

Feb. 23, 2013

There have been various kvm bugs that prevent reboots from working properly. Generalize the existing test for a failed reboot to better catch these cases. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/resume.c | 9 +++++++++ src/shadow.c | 4 ---- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/src/resume.c b/src/resume.c index 784abac..9466480 100644 --- a/src/resume.c +++ b/src/resume.c @@ -123,10 +123,19 @@ s3_resume(void) farcall16big(&br); } +u8 HaveAttemptedReboot VARLOW; + // Attempt to invoke a hard-reboot. static void tryReboot(void) { + if (HaveAttemptedReboot) { + // Hard reboot has failed - try to shutdown machine. + dprintf(1, "Unable to hard-reboot machine - attempting shutdown.\n"); + apm_shutdown(); + } + HaveAttemptedReboot = 1; + dprintf(1, "Attempting a hard reboot\n"); // Setup for reset on qemu. diff --git a/src/shadow.c b/src/shadow.c index 0aac60b..e971fe9 100644 --- a/src/shadow.c +++ b/src/shadow.c @@ -169,8 +169,4 @@ qemu_prep_reset(void) extern u8 code32flat_start[], code32flat_end[]; memcpy(code32flat_start, code32flat_start + BIOS_SRC_OFFSET , code32flat_end - code32flat_start); - - if (HaveRunPost) - // Memory copy failed to work - try to halt the machine. - apm_shutdown(); } -- 1.7.11.7

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[PATCH] Add acpi_reboot() function for invoking ACPI reset
by David Woodhouse Feb. 23, 2013

Feb. 23, 2013

Signed-off-by: David Woodhouse <David.Woodhouse(a)intel.com> --- Nothing actually sets it yet. We'll do that from the ACPI table parser for CSM and Xen, and we can put it in our own tables for the native case. diff --git a/src/acpi.c b/src/acpi.c index f7a2e55..97ade3f 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -150,17 +150,6 @@ struct madt_local_nmi { /* - * ACPI 2.0 Generic Address Space definition. - */ -struct acpi_20_generic_address { - u8 address_space_id; - u8 register_bit_width; - u8 register_bit_offset; - u8 reserved; - u64 address; -} PACKED; - -/* * HPET Description Table */ struct acpi_20_hpet { @@ -936,3 +925,38 @@ find_pmtimer(void) pmtimer_setup(pm_tmr, 3579); } + +static struct acpi_20_generic_address acpi_reset_reg; +static u8 acpi_reset_val; + +void +acpi_reboot(void) +{ + // Must be a single byte; + if (acpi_reset_reg.register_bit_width != 8) + return; + + switch (acpi_reset_reg.address_space_id) { + case 0: // System Memory + writeb((void *)(u32)acpi_reset_reg.address, acpi_reset_val); + break; + case 1: // System I/O + outb(acpi_reset_val, acpi_reset_reg.address); + break; + case 2: // PCI config space + pci_config_writeb(acpi_ga_to_bdf(acpi_reset_reg.address), + acpi_reset_reg.address & 0xffff, + acpi_reset_val); + break; + } +} + +void acpi_set_reset_reg(struct acpi_20_generic_address *reg, u8 val) +{ + if (!reg || reg->address_space_id > 2 || + reg->register_bit_width != 8 || reg->register_bit_offset) + return; + + acpi_reset_reg = *reg; + acpi_reset_val = val; +} diff --git a/src/acpi.h b/src/acpi.h index e52470e..3f85814 100644 --- a/src/acpi.h +++ b/src/acpi.h @@ -3,9 +3,23 @@ #include "types.h" // u32 +/* + * ACPI 2.0 Generic Address Space definition. + */ +struct acpi_20_generic_address { + u8 address_space_id; + u8 register_bit_width; + u8 register_bit_offset; + u8 reserved; + u64 address; +} PACKED; +#define acpi_ga_to_bdf(addr) pci_to_bdf(0, (addr >> 32) & 0xffff, (addr >> 16) & 0xffff) + void acpi_setup(void); u32 find_resume_vector(void); void find_pmtimer(void); +void acpi_set_reset_reg(struct acpi_20_generic_address *reg, u8 val); +void acpi_reboot(void); #define RSDP_SIGNATURE 0x2052545020445352LL // "RSD PTR " diff --git a/src/resume.c b/src/resume.c index adc3594..6b9ad9a 100644 --- a/src/resume.c +++ b/src/resume.c @@ -132,6 +132,9 @@ tryReboot(void) // Setup for reset on qemu. qemu_prep_reset(); + // Reboot using ACPI RESET_REG + acpi_reboot(); + // Try keyboard controller reboot. i8042_reboot(); -- dwmw2

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[PATCH] Make Xen one of the top-level build target choices
by David Woodhouse Feb. 23, 2013

Feb. 23, 2013

I think we've fairly much decided not to do this, so I'll drop it from my tree for now. But for archival purposes here it is... Signed-off-by: David Woodhouse <David.Woodhouse(a)intel.com> --- src/Kconfig | 16 +++++++--------- src/boot.c | 2 +- src/paravirt.c | 12 ------------ src/paravirt.h | 6 +----- src/post.c | 3 ++- src/shadow.c | 7 +++---- src/xen.c | 29 +++++++++++++++++++++-------- src/xen.h | 4 +++- 8 files changed, 38 insertions(+), 41 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index 98a6642..2bef08b 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -14,10 +14,10 @@ choice Configure as a coreboot payload. config QEMU - bool "Build for QEMU/Xen/KVM/Bochs" + bool "Build for QEMU/KVM/Bochs" select QEMU_HARDWARE help - Configure for an emulated machine (QEMU, Xen, KVM, or Bochs). + Configure for an emulated machine (QEMU, KVM, or Bochs). config CSM bool "Build as Compatibilty Support Module for EFI BIOS" @@ -25,6 +25,11 @@ choice Configure to be used by EFI firmware as Compatibility Support module (CSM) to provide legacy BIOS services. + config XEN + bool "Build for Xen HVM" + help + Configure to be used by xen hvmloader, for a HVM guest. + endchoice config QEMU_HARDWARE @@ -34,13 +39,6 @@ endchoice Support virtual hardware when the code detects it is running on an emulator. - config XEN - depends on QEMU - bool "Support Xen HVM" - default y - help - Configure to be used by xen hvmloader, for a HVM guest. - config THREADS bool "Parallelize hardware init" default y diff --git a/src/boot.c b/src/boot.c index ec411b7..60c985c 100644 --- a/src/boot.c +++ b/src/boot.c @@ -250,7 +250,7 @@ boot_init(void) if (! CONFIG_BOOT) return; - if (CONFIG_QEMU) { + if (CONFIG_QEMU || CONFIG_XEN) { // On emulators, get boot order from nvram. if (inb_cmos(CMOS_BIOS_BOOTFLAG1) & 1) CheckFloppySig = 0; diff --git a/src/paravirt.c b/src/paravirt.c index f061039..5d2ce84 100644 --- a/src/paravirt.c +++ b/src/paravirt.c @@ -58,11 +58,6 @@ qemu_preinit(void) if (!CONFIG_QEMU) return; - if (runningOnXen()) { - xen_ramsize_preinit(); - return; - } - PlatformRunningOn = PF_QEMU; kvm_preinit(); @@ -97,13 +92,6 @@ qemu_platform_setup(void) if (!CONFIG_QEMU) return; - if (runningOnXen()) { - pci_probe_devices(); - xen_hypercall_setup(); - xen_biostable_setup(); - return; - } - // Initialize pci pci_setup(); smm_setup(); diff --git a/src/paravirt.h b/src/paravirt.h index fce5af9..8a33af4 100644 --- a/src/paravirt.h +++ b/src/paravirt.h @@ -6,8 +6,7 @@ // Types of paravirtualized platforms. #define PF_QEMU (1<<0) -#define PF_XEN (1<<1) -#define PF_KVM (1<<2) +#define PF_KVM (1<<1) extern u32 RamSize; extern u64 RamSizeOver4G; @@ -17,9 +16,6 @@ static inline int runningOnQEMU(void) { return CONFIG_QEMU || ( CONFIG_QEMU_HARDWARE && GET_GLOBAL(PlatformRunningOn) & PF_QEMU); } -static inline int runningOnXen(void) { - return CONFIG_XEN && GET_GLOBAL(PlatformRunningOn) & PF_XEN; -} static inline int runningOnKVM(void) { return CONFIG_QEMU && GET_GLOBAL(PlatformRunningOn) & PF_KVM; } diff --git a/src/post.c b/src/post.c index 44bb0b0..977e09d 100644 --- a/src/post.c +++ b/src/post.c @@ -294,6 +294,7 @@ dopost(void) { // Detect ram and setup internal malloc. qemu_preinit(); + xen_preinit(); coreboot_preinit(); malloc_preinit(); @@ -314,7 +315,7 @@ handle_post(void) dprintf(1, "Start bios (version %s)\n", VERSION); // Check if we are running under Xen. - xen_preinit(); + xen_early_preinit(); // Allow writes to modify bios area (0xf0000) make_bios_writable(); diff --git a/src/shadow.c b/src/shadow.c index 0aac60b..467d777 100644 --- a/src/shadow.c +++ b/src/shadow.c @@ -10,7 +10,6 @@ #include "config.h" // CONFIG_* #include "pci_ids.h" // PCI_VENDOR_ID_INTEL #include "pci_regs.h" // PCI_VENDOR_ID -#include "paravirt.h" // runningOnXen #include "dev-q35.h" // PCI_VENDOR_ID_INTEL // On the emulators, the bios at 0xf0000 is also at 0xffff0000 @@ -119,7 +118,7 @@ static const struct pci_device_id dram_controller_make_readonly_tbl[] = { void make_bios_writable(void) { - if (!CONFIG_QEMU || runningOnXen()) + if (!CONFIG_QEMU) return; dprintf(3, "enabling shadow ram\n"); @@ -148,7 +147,7 @@ make_bios_writable(void) void make_bios_readonly(void) { - if (!CONFIG_QEMU || runningOnXen()) + if (!CONFIG_QEMU) return; dprintf(3, "locking shadow ram\n"); @@ -161,7 +160,7 @@ make_bios_readonly(void) void qemu_prep_reset(void) { - if (!CONFIG_QEMU || runningOnXen()) + if (!CONFIG_QEMU) return; // QEMU doesn't map 0xc0000-0xfffff back to the original rom on a // reset, so do that manually before invoking a hard reset. diff --git a/src/xen.c b/src/xen.c index f5de3d6..78ddfa8 100644 --- a/src/xen.c +++ b/src/xen.c @@ -11,6 +11,7 @@ #include "types.h" // ASM32FLAT #include "util.h" // copy_acpi_rsdp #include "acpi.h" // find_pmtimer +#include "pci.h" // pci_probe_devices #define INFO_PHYSICAL_ADDRESS 0x00001000 @@ -48,7 +49,7 @@ static void validate_info(struct xen_seabios_info *t) panic("Bad Xen info checksum\n"); } -void xen_preinit(void) +void xen_early_preinit(void) { u32 base, eax, ebx, ecx, edx; char signature[13]; @@ -77,11 +78,10 @@ void xen_preinit(void) break; } } - if (!xen_cpuid_base) { - dprintf(1, "No Xen hypervisor found.\n"); - return; - } - PlatformRunningOn = PF_QEMU|PF_XEN; + if (!xen_cpuid_base) + panic("No Xen hypervisor found.\n"); + + PlatformRunningOn = PF_QEMU; } static int hypercall_xen_version( int cmd, void *arg) @@ -96,7 +96,7 @@ void xen_hypercall_setup(void) xen_extraversion_t extraversion; unsigned long i; - if (!runningOnXen()) + if (!CONFIG_XEN) return; cpuid(xen_cpuid_base + 2, &eax, &ebx, &ecx, &edx); @@ -129,8 +129,11 @@ void xen_biostable_setup(void) find_reset_reg(); } -void xen_ramsize_preinit(void) +void xen_preinit(void) { + if (!CONFIG_XEN) + return; + int i; struct xen_seabios_info *info = (void *)INFO_PHYSICAL_ADDRESS; struct e820entry *e820 = (struct e820entry *)info->e820; @@ -143,3 +146,13 @@ void xen_ramsize_preinit(void) add_e820(e->start, e->size, e->type); } } + +void xen_platform_setup(void) +{ + if (!CONFIG_XEN) + return; + + pci_probe_devices(); + xen_hypercall_setup(); + xen_biostable_setup(); +} diff --git a/src/xen.h b/src/xen.h index f00f840..6a2bdd6 100644 --- a/src/xen.h +++ b/src/xen.h @@ -1,10 +1,12 @@ #ifndef __XEN_H #define __XEN_H -void xen_preinit(void); +void xen_early_preinit(void); void xen_ramsize_preinit(void); void xen_hypercall_setup(void); void xen_biostable_setup(void); +void xen_preinit(void); +void xen_platform_setup(void); extern unsigned long xen_hypercall_page; -- 1.8.1.2 -- dwmw2

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Re: [SeaBIOS] [edk2] [PATCH 0/8] OvmfPkg: reset-related changes
by David Woodhouse Feb. 22, 2013

Feb. 22, 2013

On Fri, 2013-02-22 at 04:23 +0100, Laszlo Ersek wrote: > Patches 1 to 6 upgrade the FADT to ACPI 2.0 and present the PIIX3 > Reset Control Register in it. Hm. I can still trigger the soft reset loop in SeaBIOS, but perhaps not in a circumstance that we care about... I've fixed Qemu to do the proper hard reset on 0xcf9 but not any other reset method. I'm running with KVM on an old machine without "unrestricted guest" support. I've fixed SeaBIOS to look for the ACPI RESET_REG and use it, and that part *works*... but SeaBIOS only *sees* the ACPI table when we boot a legacy OS. If I boot an EFI OS and then do a soft reset via the keyboard controller ('echo -en \\xfe | dd of=/dev/port bs=1 seek=$((0x64))'), SeaBIOS hasn't seen the ACPI tables, still uses the keyboard controller as its first choice of reset method, and still does its reset loop as before. Do we actually *care* about that? Do we expect any EFI OS to be doing a keyboard reset instead of using ACPI or the runtime services Reset call? If we've booted a legacy OS, it works fine. SeaBIOS gets invoked at 0xffff0 after a soft reset, uses the ACPI RESET_REG that it was given by OVMF, and does a proper reset... # echo -en \\xfe | dd of=/dev/port bs=1 seek=$((0x64)) Changing serial settings was 0/0 now 3/0 In resume (status=0) In 32bit resume Attempting a hard reboot Using ACPI reset reg rcr_write 6 (debug from qemu) SecCoreStartupWithStack(0xFFFE6000, 0x80000) File->Type: 0xB ... -- dwmw2

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[PATCH] seabios: Add a dummy PCI slot to irq mapping function
by Alex Williamson Feb. 22, 2013

Feb. 22, 2013

This should never get called, but if we somehow get a new chipset that fails to implement their own pci_slot_get_irq function, fail gracefully and add a debug log message. Signed-off-by: Alex Williamson <alex.williamson(a)redhat.com> --- src/pciinit.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/src/pciinit.c b/src/pciinit.c index 70e4c07..a495742 100644 --- a/src/pciinit.c +++ b/src/pciinit.c @@ -91,7 +91,15 @@ const u8 pci_irqs[4] = { 10, 10, 11, 11 }; -static int (*pci_slot_get_irq)(struct pci_device *pci, int pin); +static int dummy_pci_slot_get_irq(struct pci_device *pci, int pin) +{ + dprintf(1, "pci_slot_get_irq called with unknown routing\n"); + + return 0xff; /* PCI defined "unknown" or "no connection" for x86 */ +} + +static int (*pci_slot_get_irq)(struct pci_device *pci, int pin) = + dummy_pci_slot_get_irq; // Return the global irq number corresponding to a host bus device irq pin. static int piix_pci_slot_get_irq(struct pci_device *pci, int pin)

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[RESEND] Some questions about SeaBIOS's native VGA drivers.
by Denis 'GNUtoo' Carikli Feb. 21, 2013

Feb. 21, 2013

Hi, I'd like to replace the lenovo x60(supported by coreboot) non-free VGA option rom: I don't use it right now but that has serious drawbacks: * No graphics at all until the i915 kernel module is loaded (really user unfriendly), my main motivation to replace it... * No backlight control * nvramtool doesn't work anymore without using the -y option (not really important). I've created stub in SeaBIOS(there is an attached patch for that) for the i915 driver(it will be filled in later), however I don't know how to run the code: * I guess it creates an option rom that is in out/vgabios.bin and that I've to include it trough one of the various ways(let seabios pick it, run it in coreboot, run it in coreboot trough YABEL for debugging etc...)? right? romheaders seem to think that the option rom is valid(more on it later). I guess YABEL also thinks it's valid. I guess SeaBIOS out/bios.bin.elf doesn't link that option rom inside SeaBIOS... * it doesn't print a thing, I've CONFIG_DEBUG_LEVEL=2 and there is the following in the driver stub: dprintf(1, "i915vga_setup: VGA init...\n"); So I've tried the YABEL way with debugging enabled and here's the result: [...] Normal boot. PCI: 00:02.0 init CBFS: Looking for 'pci8086,27a2.rom' starting from 0x0. CBFS: (unmatched file @0x0: cmos_layout.bin) CBFS: (unmatched file @0x640: fallback/romstage) CBFS: (unmatched file @0xb500: fallback/coreboot_ram) CBFS: (unmatched file @0x2d200: fallback/payload) CBFS: (unmatched file @0x39a80: config) CBFS: (unmatched file @0x3a9c0: ) CBFS: (unmatched file @0x3ff80: normal/romstage) CBFS: (unmatched file @0x4ae80: normal/coreboot_ram) CBFS: (unmatched file @0x6cb80: normal/payload) CBFS: Found file (offset=0x79af8, len=33280). In CBFS, ROM address for PCI: 00:02.0 = ffe79af8 PCI expansion ROM, signature 0xaa55, INIT size 0x8200, data ptr 0x4930 PCI ROM image, vendor ID 8086, device ID 27a2, PCI ROM image, Class Code 030000, Code Type 00 Copying VGA ROM Image from ffe79af8 to 0xc0000, 0x8200 bytes [long wait] PCI: 00:02.1 init CBFS: Looking for 'cmos_layout.bin' starting from 0x0. CBFS: Found file (offset=0x28, len=1560). PCI: 00:1b.0 init [...] It doesn't seem to print a thing...and YABEL is pretty silent and should really not be that silent according to the YABEL debug options: CONFIG_X86EMU_DEBUG=y CONFIG_X86EMU_DEBUG_JMP=y # CONFIG_X86EMU_DEBUG_TRACE is not set CONFIG_X86EMU_DEBUG_PNP=y CONFIG_X86EMU_DEBUG_DISK=y CONFIG_X86EMU_DEBUG_PMM=y CONFIG_X86EMU_DEBUG_VBE=y CONFIG_X86EMU_DEBUG_INT10=y CONFIG_X86EMU_DEBUG_INTERRUPTS=y CONFIG_X86EMU_DEBUG_CHECK_VMEM_ACCESS=y CONFIG_X86EMU_DEBUG_MEM=y CONFIG_X86EMU_DEBUG_IO=y Denis.

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[PATCHv2 0/6] Improved multi-platform support
by Kevin O'Connor Feb. 21, 2013

Feb. 21, 2013

This is the redo of the "multi-platform support" patch I sent previously. This patch series is less ambitious than the previous - SeaBIOS can't be compiled for multiple platforms (eg, QEMU, CSM, coreboot) at the same time. However, this series still contains all the CONFIG_X reorganization and it will ensure that virtual devices aren't accessed when not on real hardware when using CONFIG_CSM. This series also enables the possibility of using some virtual devices under coreboot and CSM when it is safe to do so (and CONFIG_QEMU_HARDWARE is selected). I have also placed this code for testing at: https://github.com/KevinOConnor/seabios/tree/test-20130209 -Kevin Kevin O'Connor (6): Determine century during init and store in VARLOW mem during runtime. No need to check both CONFIG_THREADS and CONFIG_THREAD_OPTIONROMS. Add runningOnQEMU() and runningOnXEN() ror runtime platform detection. Consistently use CONFIG_COREBOOT, CONFIG_QEMU, and runningOnXen(). Convert kvm_para_available() to runningOnKVM(). Minor - move definitions to paravirt.c from paravirt.h. src/Kconfig | 24 ++++++++++++++------- src/apm.c | 3 ++- src/ata.c | 2 +- src/block.c | 2 +- src/blockcmd.c | 2 +- src/boot.c | 4 ++-- src/clock.c | 26 +++++++++++++--------- src/coreboot.c | 8 +++---- src/esp-scsi.c | 3 ++- src/floppy.c | 14 ++++++------ src/lsi-scsi.c | 3 ++- src/misc.c | 2 ++ src/mtrr.c | 4 ++-- src/optionroms.c | 2 +- src/output.c | 3 ++- src/paravirt.c | 64 ++++++++++++++++++++++++++++++++++++++++++++++++++----- src/paravirt.h | 59 +++++++++++++++----------------------------------- src/pciinit.c | 4 ++-- src/post.c | 8 +++---- src/ramdisk.c | 2 +- src/resume.c | 6 +----- src/shadow.c | 12 +++++++---- src/smm.c | 9 ++------ src/smp.c | 8 +++---- src/stacks.c | 10 ++++----- src/virtio-blk.c | 4 ++-- src/virtio-scsi.c | 2 +- src/xen.c | 9 +++++--- src/xen.h | 11 ---------- 29 files changed, 172 insertions(+), 138 deletions(-) -- 1.7.11.7

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Some questions about SeaBIOS's native VGA drivers.
by Denis 'GNUtoo' Carikli Feb. 21, 2013

Feb. 21, 2013

Hi, I'd like to replace the lenovo x60(supported by coreboot) non-free VGA option rom: I don't use it right now but that has serious drawbacks: * No graphics at all until the i915 kernel module is loaded (really user unfriendly), my main motivation to replace it... * No backlight control * nvramtool doesn't work anymore without using the -y option (not really important). I've created stub in SeaBIOS(there is an attached patch for that) for the i915 driver(it will be filled in later), however I don't know how to run the code: * I guess it creates an option rom that is in out/vgabios.bin and that I've to include it trough one of the various ways(let seabios pick it, run it in coreboot, run it in coreboot trough YABEL for debugging etc...)? right? romheaders seem to think that the option rom is valid(more on it later). I guess YABEL also thinks it's valid. I guess SeaBIOS out/bios.bin.elf doesn't link that option rom inside SeaBIOS... * it doesn't print a thing, I've CONFIG_DEBUG_LEVEL=2 and there is the following in the driver stub: dprintf(1, "i915vga_setup: VGA init...\n"); So I've tried the YABEL way with debugging enabled and here's the result: [...] Normal boot. PCI: 00:02.0 init CBFS: Looking for 'pci8086,27a2.rom' starting from 0x0. CBFS: (unmatched file @0x0: cmos_layout.bin) CBFS: (unmatched file @0x640: fallback/romstage) CBFS: (unmatched file @0xb500: fallback/coreboot_ram) CBFS: (unmatched file @0x2d200: fallback/payload) CBFS: (unmatched file @0x39a80: config) CBFS: (unmatched file @0x3a9c0: ) CBFS: (unmatched file @0x3ff80: normal/romstage) CBFS: (unmatched file @0x4ae80: normal/coreboot_ram) CBFS: (unmatched file @0x6cb80: normal/payload) CBFS: Found file (offset=0x79af8, len=33280). In CBFS, ROM address for PCI: 00:02.0 = ffe79af8 PCI expansion ROM, signature 0xaa55, INIT size 0x8200, data ptr 0x4930 PCI ROM image, vendor ID 8086, device ID 27a2, PCI ROM image, Class Code 030000, Code Type 00 Copying VGA ROM Image from ffe79af8 to 0xc0000, 0x8200 bytes [long wait] PCI: 00:02.1 init CBFS: Looking for 'cmos_layout.bin' starting from 0x0. CBFS: Found file (offset=0x28, len=1560). PCI: 00:1b.0 init [...] It doesn't seem to print a thing...and YABEL is pretty silent and should really not be that silent according to the YABEL debug options: CONFIG_X86EMU_DEBUG=y CONFIG_X86EMU_DEBUG_JMP=y # CONFIG_X86EMU_DEBUG_TRACE is not set CONFIG_X86EMU_DEBUG_PNP=y CONFIG_X86EMU_DEBUG_DISK=y CONFIG_X86EMU_DEBUG_PMM=y CONFIG_X86EMU_DEBUG_VBE=y CONFIG_X86EMU_DEBUG_INT10=y CONFIG_X86EMU_DEBUG_INTERRUPTS=y CONFIG_X86EMU_DEBUG_CHECK_VMEM_ACCESS=y CONFIG_X86EMU_DEBUG_MEM=y CONFIG_X86EMU_DEBUG_IO=y Denis.

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[RESEND PATCH v2 0/2] seabios q35: Fix seabios IRQ mapping and setup
by Alex Williamson Feb. 21, 2013

Feb. 21, 2013

This enables interrupts to work pre-boot for assigned devices. I had self nak'd and resent a v2 patch for 2/2, but there were never any comments, so resending the whole series as v2. Thanks, Alex --- Alex Williamson (2): seabios q35: Enable all PIRQn IRQs at startup seabios q35: Add new PCI slot to irq routing function src/pciinit.c | 39 ++++++++++++++++++++++++++++++++++----- 1 file changed, 34 insertions(+), 5 deletions(-)

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