SeaBIOS July 2010

seabios@seabios.org

10 participants
33 discussions

Re: [SeaBIOS] [PATCH 1/2] seabios: pciinit: fix 64bit bar initilization.
by Kevin O'Connor 27 Jul '10

27 Jul '10

On Mon, Jul 26, 2010 at 02:02:45PM +0900, Isaku Yamahata wrote: > When 64bit bar allocation failed, leave it untouched as 32bit bar case. > There is no point to set higher bit to all 1, it is just leftover from > debug code. Thanks. -Kevin

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[PATCH 0/2] seabios: pciinit: fix bar allocation
by Isaku Yamahata 26 Jul '10

26 Jul '10

This patch set fixes pci bar allocation. Cam Macdonell reported that there was something wrong with 64bit/32bit 512M BAR. This addresses his report. Isaku Yamahata (2): seabios: pciinit: fix 64bit bar initilization. seabios: pciinit: fix overflow when bar allocation. src/pciinit.c | 56 ++++++++++++++++++++++++++++++++++++-------------------- 1 files changed, 36 insertions(+), 20 deletions(-)

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Re: [SeaBIOS] [RFC PATCH v3 0/3] Add segment limit checks to emulator
by Kevin O'Connor 25 Jul '10

25 Jul '10

On Sat, Jul 24, 2010 at 11:45:22AM -0400, Kevin O'Connor wrote: > On Mon, Jul 12, 2010 at 04:13:06PM +0300, Avi Kivity wrote: > > Does SeaBIOS use big real mode now? > > SeaBIOS calls option roms in big real mode. This is required by the > relevant specs. > > See the transition16big function in src/romlayout.S. It briefly jumps > to an address at 0xffxxx during the transition to real-mode. At a > quick glance, it looks like it could probably be changed to not use a > code address >64K. I put together a SeaBIOS patch so it does not use code addresses >64K in big real mode - in case anyone wants to test it. Note, this only reduces the use of code addresses >64K - SeaBIOS will still try to use data addresses >64K (eg, in option rom PMM code). -Kevin diff --git a/src/misc.c b/src/misc.c index 354df87..108c332 100644 --- a/src/misc.c +++ b/src/misc.c @@ -156,8 +156,8 @@ u64 rombios32_gdt[] VAR16VISIBLE __aligned(8) = { GDT_LIMIT(BUILD_BIOS_SIZE-1) | GDT_CODE | GDT_BASE(BUILD_BIOS_ADDR), // 16 bit data segment base=0x0 limit=0xffff (SEG32_MODE16_DS) GDT_LIMIT(0x0ffff) | GDT_DATA, - // 16 bit code segment base=0 limit=0xffffffff (SEG32_MODE16BIG_CS) - GDT_LIMIT(0xfffff) | GDT_CODE | GDT_G, + // 16 bit code segment base=0xf0000 limit=0xffffffff (SEG32_MODE16BIG_CS) + GDT_LIMIT(0xfffff) | GDT_CODE | GDT_G | GDT_BASE(BUILD_BIOS_ADDR), // 16 bit data segment base=0 limit=0xffffffff (SEG32_MODE16BIG_DS) GDT_LIMIT(0xfffff) | GDT_DATA | GDT_G, }; diff --git a/src/romlayout.S b/src/romlayout.S index 54e5a4d..a469596 100644 --- a/src/romlayout.S +++ b/src/romlayout.S @@ -105,7 +105,7 @@ transition16big: movw %ax, %fs movw %ax, %gs - ljmpl $SEG32_MODE16BIG_CS, $(BUILD_BIOS_ADDR + 1f) + ljmpw $SEG32_MODE16BIG_CS, $1f .code16gcc 1:

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[PATCH v2 0/2] abstract shadow and smm opreration.
by Isaku Yamahata 24 Jul '10

24 Jul '10

This is on top of the patch series of PATCH v2 "abstract chipset(i440fx) specific register operation." Patch descriontion: This patch set abstract out shadow and smm operation which are specific to chipset. and spit out i440fx specific part into dev-i440fx.c. Thus q35 specific register value/operation will be added easily. Changes v1 -> v2: - separated non-arguable part to make the merge easy. - factor out intel specific shadow memory operation. - factor out smm operation. - abstract at device level, not register level. Isaku Yamahata (2): seabios: shadow: make device finding more generic. seabios: smm: move out piix4 specific smram logic to dev-i440fx.c src/dev-i440fx.c | 44 ++++++++++++++++++++++ src/dev-i440fx.h | 3 ++ src/shadow.c | 106 +++++++++++++++++++++++++++++++++--------------------- src/smm.c | 58 +++++++++++++----------------- src/util.h | 6 +++ 5 files changed, 143 insertions(+), 74 deletions(-)

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Impossible to distinguish between two '/' keys
by Christopher Gautier 23 Jul '10

23 Jul '10

Hello, On a French keyboard, the '/' can be obtained by shifting the ':/' key (scancode 0x34), or using the '/' keypad key which is the extended '0xe0+0x35'. However, calling the 0x16 interrupt while pressing the keypad '/' does not return an extended key: it returns 0x35 which maps to '!§'. This means it is impossible to implement a correct key mapping for both '/' keys, and '!'. It seems to me that the problem is due to the following test in the __processkey() function (kbd.c, seabios 0.5.1 and git repository): if (flags2 & KF2_LAST_E0 && scancode >= 0x47 && scancode <= 0x53) { /* extended keys handling */ ... } which disregards the case scancode = 0x35. Changing the 0x47 boundary value fixes the problem. Could somebody validate this micro patch? -- k

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[PATCH 0/5] abstract chipset(i440fx) specific register operation.(Part I)
by Isaku Yamahata 20 Jul '10

20 Jul '10

Changes v2 -> v1: - dropped patches which are under discussion to make the merge easy. The updated one on top of this patch series will be posted as Part II. - moved cpu_to_le{16, 32}() to util.h Patch descriontion: This patch set abstract out chipset specific operation, and spit out i440fx specific operation into dev-i440fx.c with it. Thus q35 specific register value/operation will be added easily. Isaku Yamahata (5): seabios: pci: introduce helper function to find device from table and initialize it. seabios: acpi: move out endian conversion helper function. seabios: acpi: move acpi definitions to acpi.h from acpi.c seabios: acpi: split out piix4 pm logic. seabios: acpi: clean up of finding pm device. src/acpi.c | 107 +++++++++--------------------------------------------- src/acpi.h | 76 ++++++++++++++++++++++++++++++++++++++ src/dev-i440fx.c | 15 ++++++++ src/dev-i440fx.h | 1 + src/pci.c | 12 ++++++ src/pci.h | 1 + src/util.h | 10 +++++ 7 files changed, 133 insertions(+), 89 deletions(-)

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Re: [SeaBIOS] [PATCH 2/7] seabios: shadow: make device finding more generic.
by Kevin O'Connor 20 Jul '10

20 Jul '10

On Mon, Jul 12, 2010 at 08:47:47PM +0900, Isaku Yamahata wrote: > pam register offset is north bridge specific. > So determine the offset based on found north bridge. Is it really just the offset that is north bridge specific? I thought the entire process was very north bridge specific. If so, I don't think it makes sense to pass back the pam0 register - instead the north bridge specific code should do the necessary work (using helper functions if possible). I have the same concern with part 3 and 4 of this series. -Kevin

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[PATCH 0/7] abstract chipset(i440fx) specific register operation.
by Isaku Yamahata 13 Jul '10

13 Jul '10

This patch set abstract out chipset specific operation, and spit out i440fx specific operation into dev-i440fx.c with it. Thus q35 specific register value/operation will be added easily. Isaku Yamahata (7): seabios: pci: introduce helper function to find device from table and initialize it. seabios: shadow: make device finding more generic. seabios: smm: move out piix4 specific logic to dev-i440fx.c seabios: smm_init: move out i440fx smram operation into dev-i440fx.c seabios: acpi: move acpi definitions to acpi.h from acpi.c seabios: acpi: split out piix4 pm logic. seabios: acpi: clean up of finding pm device. src/acpi.c | 102 +++++++++-------------------------------------------- src/acpi.h | 81 ++++++++++++++++++++++++++++++++++++++++++ src/dev-i440fx.c | 57 ++++++++++++++++++++++++++++++ src/dev-i440fx.h | 4 ++ src/pci.c | 12 ++++++ src/pci.h | 1 + src/post.h | 24 +++++++++++++ src/shadow.c | 44 +++++++++++++++-------- src/smm.c | 35 +++++++++++++----- 9 files changed, 251 insertions(+), 109 deletions(-) create mode 100644 src/post.h

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Re: [SeaBIOS] [PATCH 6/7] seabios: acpi: split out piix4 pm logic.
by Kevin O'Connor 13 Jul '10

13 Jul '10

On Mon, Jul 12, 2010 at 08:47:51PM +0900, Isaku Yamahata wrote: > split out piix4 pm logic. [...] > @@ -202,11 +203,6 @@ static inline u16 cpu_to_le16(u16 x) > return x; > } > > -static inline u32 cpu_to_le32(u32 x) > -{ > - return x; > -} This is a nitpick, but if cpu_to_le32() is moved to a header then cpu_to_le16() needs to be moved to. It should also be moved to where ntohl() is defined (util.h). -Kevin

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Re: [SeaBIOS] Alt SeaBIOS SSDT cpu hotplug
by Kevin O'Connor 11 Jul '10

11 Jul '10

On Sat, Jul 10, 2010 at 12:41:18AM +0800, Liu, Jinsong wrote: > Kevin O'Connor wrote: > > I've tested this under linux - there were a few bugs in the previous > > patch. I also had to replace the dynamically created CPUS array with > > a dynamically created NTFY method - which is a bit more complicated. [...] > Yeah, thanks Kevin. > After you done patch and draft test, our QA may do nightly test. Thanks. I've tested it with a Fedora Core 13 guest using kvm. Basic add cpu and eject cpu appears to work. I'll wait to hear back on further testing, and for any other comments. -Kevin

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SeaBIOS July 2010