This patch is purely cosmetic - no code changes should be observed.
Use a consistent indentation style with the ACPI DSDT code: 1 - Use spaces (no tabs) and 4 space indentation 2 - Place opening braces on same line as statement declaration 3 - Don't put a space between statement and opening parenthesis, except for control statements (If, Else, While, Return) where a space is always present
Signed-off-by: Kevin O'Connor kevin@koconnor.net --- src/acpi-dsdt-cpu-hotplug.dsl | 131 ++++++------ src/acpi-dsdt-dbug.dsl | 42 ++-- src/acpi-dsdt-hpet.dsl | 54 +++-- src/acpi-dsdt-isa.dsl | 226 +++++++++----------- src/acpi-dsdt-pci-crs.dsl | 205 +++++++++--------- src/acpi-dsdt.dsl | 271 ++++++++++++------------ src/q35-acpi-dsdt.dsl | 480 ++++++++++++++++++++---------------------- src/ssdt-pcihp.dsl | 20 +- src/ssdt-proc.dsl | 14 +- src/ssdt-susp.dsl | 9 +- 10 files changed, 692 insertions(+), 760 deletions(-)
diff --git a/src/acpi-dsdt-cpu-hotplug.dsl b/src/acpi-dsdt-cpu-hotplug.dsl index 7f3ad3b..0f3e83b 100644 --- a/src/acpi-dsdt-cpu-hotplug.dsl +++ b/src/acpi-dsdt-cpu-hotplug.dsl @@ -2,76 +2,77 @@ * CPU hotplug ****************************************************************/
- Scope(_SB) { - /* Objects filled in by run-time generated SSDT */ - External(NTFY, MethodObj) - External(CPON, PkgObj) +Scope(_SB) { + /* Objects filled in by run-time generated SSDT */ + External(NTFY, MethodObj) + External(CPON, PkgObj)
- /* Methods called by run-time generated SSDT Processor objects */ - Method (CPMA, 1, NotSerialized) { - // _MAT method - create an madt apic buffer - // Arg0 = Processor ID = Local APIC ID - // Local0 = CPON flag for this cpu - Store(DerefOf(Index(CPON, Arg0)), Local0) - // Local1 = Buffer (in madt apic form) to return - Store(Buffer(8) {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0}, Local1) - // Update the processor id, lapic id, and enable/disable status - Store(Arg0, Index(Local1, 2)) - Store(Arg0, Index(Local1, 3)) - Store(Local0, Index(Local1, 4)) - Return (Local1) - } - Method (CPST, 1, NotSerialized) { - // _STA method - return ON status of cpu - // Arg0 = Processor ID = Local APIC ID - // Local0 = CPON flag for this cpu - Store(DerefOf(Index(CPON, Arg0)), Local0) - If (Local0) { Return(0xF) } Else { Return(0x0) } - } - Method (CPEJ, 2, NotSerialized) { - // _EJ0 method - eject callback - Sleep(200) + /* Methods called by run-time generated SSDT Processor objects */ + Method(CPMA, 1, NotSerialized) { + // _MAT method - create an madt apic buffer + // Arg0 = Processor ID = Local APIC ID + // Local0 = CPON flag for this cpu + Store(DerefOf(Index(CPON, Arg0)), Local0) + // Local1 = Buffer (in madt apic form) to return + Store(Buffer(8) {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0}, Local1) + // Update the processor id, lapic id, and enable/disable status + Store(Arg0, Index(Local1, 2)) + Store(Arg0, Index(Local1, 3)) + Store(Local0, Index(Local1, 4)) + Return (Local1) + } + Method(CPST, 1, NotSerialized) { + // _STA method - return ON status of cpu + // Arg0 = Processor ID = Local APIC ID + // Local0 = CPON flag for this cpu + Store(DerefOf(Index(CPON, Arg0)), Local0) + If (Local0) { + Return (0xF) + } Else { + Return (0x0) } + } + Method(CPEJ, 2, NotSerialized) { + // _EJ0 method - eject callback + Sleep(200) + }
- /* CPU hotplug notify method */ - OperationRegion(PRST, SystemIO, 0xaf00, 32) - Field (PRST, ByteAcc, NoLock, Preserve) - { - PRS, 256 - } - Method(PRSC, 0) { - // Local5 = active cpu bitmap - Store (PRS, Local5) - // Local2 = last read byte from bitmap - Store (Zero, Local2) - // Local0 = Processor ID / APIC ID iterator - Store (Zero, Local0) - While (LLess(Local0, SizeOf(CPON))) { - // Local1 = CPON flag for this cpu - Store(DerefOf(Index(CPON, Local0)), Local1) - If (And(Local0, 0x07)) { - // Shift down previously read bitmap byte - ShiftRight(Local2, 1, Local2) - } Else { - // Read next byte from cpu bitmap - Store(DerefOf(Index(Local5, ShiftRight(Local0, 3))), Local2) - } - // Local3 = active state for this cpu - Store(And(Local2, 1), Local3) + /* CPU hotplug notify method */ + OperationRegion(PRST, SystemIO, 0xaf00, 32) + Field(PRST, ByteAcc, NoLock, Preserve) { + PRS, 256 + } + Method(PRSC, 0) { + // Local5 = active cpu bitmap + Store(PRS, Local5) + // Local2 = last read byte from bitmap + Store(Zero, Local2) + // Local0 = Processor ID / APIC ID iterator + Store(Zero, Local0) + While (LLess(Local0, SizeOf(CPON))) { + // Local1 = CPON flag for this cpu + Store(DerefOf(Index(CPON, Local0)), Local1) + If (And(Local0, 0x07)) { + // Shift down previously read bitmap byte + ShiftRight(Local2, 1, Local2) + } Else { + // Read next byte from cpu bitmap + Store(DerefOf(Index(Local5, ShiftRight(Local0, 3))), Local2) + } + // Local3 = active state for this cpu + Store(And(Local2, 1), Local3)
- If (LNotEqual(Local1, Local3)) { - // State change - update CPON with new state - Store(Local3, Index(CPON, Local0)) - // Do CPU notify - If (LEqual(Local3, 1)) { - NTFY(Local0, 1) - } Else { - NTFY(Local0, 3) - } + If (LNotEqual(Local1, Local3)) { + // State change - update CPON with new state + Store(Local3, Index(CPON, Local0)) + // Do CPU notify + If (LEqual(Local3, 1)) { + NTFY(Local0, 1) + } Else { + NTFY(Local0, 3) } - Increment(Local0) } + Increment(Local0) } } - - +} diff --git a/src/acpi-dsdt-dbug.dsl b/src/acpi-dsdt-dbug.dsl index ce6fd6e..276321f 100644 --- a/src/acpi-dsdt-dbug.dsl +++ b/src/acpi-dsdt-dbug.dsl @@ -2,29 +2,25 @@ * Debugging ****************************************************************/
- Scope () - { - /* Debug Output */ - OperationRegion (DBG, SystemIO, 0x0402, 0x01) - Field (DBG, ByteAcc, NoLock, Preserve) - { - DBGB, 8, - } +Scope() { + /* Debug Output */ + OperationRegion(DBG, SystemIO, 0x0402, 0x01) + Field(DBG, ByteAcc, NoLock, Preserve) { + DBGB, 8, + }
- /* Debug method - use this method to send output to the QEMU - * BIOS debug port. This method handles strings, integers, - * and buffers. For example: DBUG("abc") DBUG(0x123) */ - Method(DBUG, 1) { - ToHexString(Arg0, Local0) - ToBuffer(Local0, Local0) - Subtract(SizeOf(Local0), 1, Local1) - Store(Zero, Local2) - While (LLess(Local2, Local1)) { - Store(DerefOf(Index(Local0, Local2)), DBGB) - Increment(Local2) - } - Store(0x0A, DBGB) + /* Debug method - use this method to send output to the QEMU + * BIOS debug port. This method handles strings, integers, + * and buffers. For example: DBUG("abc") DBUG(0x123) */ + Method(DBUG, 1) { + ToHexString(Arg0, Local0) + ToBuffer(Local0, Local0) + Subtract(SizeOf(Local0), 1, Local1) + Store(Zero, Local2) + While (LLess(Local2, Local1)) { + Store(DerefOf(Index(Local0, Local2)), DBGB) + Increment(Local2) } + Store(0x0A, DBGB) } - - +} diff --git a/src/acpi-dsdt-hpet.dsl b/src/acpi-dsdt-hpet.dsl index 06ec7a3..d5aa3f1 100644 --- a/src/acpi-dsdt-hpet.dsl +++ b/src/acpi-dsdt-hpet.dsl @@ -2,35 +2,33 @@ * HPET ****************************************************************/
- Scope(_SB) { - Device(HPET) { - Name(_HID, EISAID("PNP0103")) - Name(_UID, 0) - OperationRegion(HPTM, SystemMemory , 0xFED00000, 0x400) - Field(HPTM, DWordAcc, Lock, Preserve) { - VEND, 32, - PRD, 32, +Scope(_SB) { + Device(HPET) { + Name(_HID, EISAID("PNP0103")) + Name(_UID, 0) + OperationRegion(HPTM, SystemMemory, 0xFED00000, 0x400) + Field(HPTM, DWordAcc, Lock, Preserve) { + VEND, 32, + PRD, 32, + } + Method(_STA, 0, NotSerialized) { + Store(VEND, Local0) + Store(PRD, Local1) + ShiftRight(Local0, 16, Local0) + If (LOr(LEqual(Local0, 0), LEqual(Local0, 0xffff))) { + Return (0x0) } - Method (_STA, 0, NotSerialized) { - Store (VEND, Local0) - Store (PRD, Local1) - ShiftRight(Local0, 16, Local0) - If (LOr (LEqual(Local0, 0), LEqual(Local0, 0xffff))) { - Return (0x0) - } - If (LOr (LEqual(Local1, 0), LGreater(Local1, 100000000))) { - Return (0x0) - } - Return (0x0F) + If (LOr(LEqual(Local1, 0), LGreater(Local1, 100000000))) { + Return (0x0) } - Name(_CRS, ResourceTemplate() { - IRQNoFlags () {2, 8} - Memory32Fixed (ReadOnly, - 0xFED00000, // Address Base - 0x00000400, // Address Length - ) - }) + Return (0x0F) } + Name(_CRS, ResourceTemplate() { + IRQNoFlags() {2, 8} + Memory32Fixed(ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) } - - +} diff --git a/src/acpi-dsdt-isa.dsl b/src/acpi-dsdt-isa.dsl index 9adc9de..cc5efde 100644 --- a/src/acpi-dsdt-isa.dsl +++ b/src/acpi-dsdt-isa.dsl @@ -1,134 +1,102 @@ - Scope(_SB.PCI0.ISA) { +/* Common legacy ISA style devices. */ +Scope(_SB.PCI0.ISA) {
- Device (RTC) - { - Name (_HID, EisaId ("PNP0B00")) - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x0070, 0x0070, 0x10, 0x02) - IRQNoFlags () {8} - IO (Decode16, 0x0072, 0x0072, 0x02, 0x06) - }) - } - - Device (KBD) - { - Name (_HID, EisaId ("PNP0303")) - Method (_STA, 0, NotSerialized) - { - Return (0x0f) - } - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x0060, 0x0060, 0x01, 0x01) - IO (Decode16, 0x0064, 0x0064, 0x01, 0x01) - IRQNoFlags () { 1 } - }) - } - - Device (MOU) - { - Name (_HID, EisaId ("PNP0F13")) - Method (_STA, 0, NotSerialized) - { - Return (0x0f) - } - Name (_CRS, ResourceTemplate () - { - IRQNoFlags () {12} - }) - } - - Device (FDC0) - { - Name (_HID, EisaId ("PNP0700")) - Method (_STA, 0, NotSerialized) - { - Store (FDEN, Local0) - If (LEqual (Local0, 0)) - { - Return (0x00) - } - Else - { - Return (0x0F) - } - } - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x03F2, 0x03F2, 0x00, 0x04) - IO (Decode16, 0x03F7, 0x03F7, 0x00, 0x01) - IRQNoFlags () {6} - DMA (Compatibility, NotBusMaster, Transfer8) {2} - }) - } - - Device (LPT) - { - Name (_HID, EisaId ("PNP0400")) - Method (_STA, 0, NotSerialized) - { - Store (LPEN, Local0) - If (LEqual (Local0, 0)) - { - Return (0x00) - } - Else - { - Return (0x0F) - } - } - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x0378, 0x0378, 0x08, 0x08) - IRQNoFlags () { 7 } - }) + Device(RTC) { + Name(_HID, EisaId("PNP0B00")) + Name(_CRS, ResourceTemplate() { + IO(Decode16, 0x0070, 0x0070, 0x10, 0x02) + IRQNoFlags() { 8 } + IO(Decode16, 0x0072, 0x0072, 0x02, 0x06) + }) + } + + Device(KBD) { + Name(_HID, EisaId("PNP0303")) + Method(_STA, 0, NotSerialized) { + Return (0x0f) + } + Name(_CRS, ResourceTemplate() { + IO(Decode16, 0x0060, 0x0060, 0x01, 0x01) + IO(Decode16, 0x0064, 0x0064, 0x01, 0x01) + IRQNoFlags() { 1 } + }) + } + + Device(MOU) { + Name(_HID, EisaId("PNP0F13")) + Method(_STA, 0, NotSerialized) { + Return (0x0f) + } + Name(_CRS, ResourceTemplate() { + IRQNoFlags() { 12 } + }) + } + + Device(FDC0) { + Name(_HID, EisaId("PNP0700")) + Method(_STA, 0, NotSerialized) { + Store(FDEN, Local0) + If (LEqual(Local0, 0)) { + Return (0x00) + } Else { + Return (0x0F) } - - Device (COM1) - { - Name (_HID, EisaId ("PNP0501")) - Name (_UID, 0x01) - Method (_STA, 0, NotSerialized) - { - Store (CAEN, Local0) - If (LEqual (Local0, 0)) - { - Return (0x00) - } - Else - { - Return (0x0F) - } - } - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x03F8, 0x03F8, 0x00, 0x08) - IRQNoFlags () { 4 } - }) + } + Name(_CRS, ResourceTemplate() { + IO(Decode16, 0x03F2, 0x03F2, 0x00, 0x04) + IO(Decode16, 0x03F7, 0x03F7, 0x00, 0x01) + IRQNoFlags() { 6 } + DMA(Compatibility, NotBusMaster, Transfer8) { 2 } + }) + } + + Device(LPT) { + Name(_HID, EisaId("PNP0400")) + Method(_STA, 0, NotSerialized) { + Store(LPEN, Local0) + If (LEqual(Local0, 0)) { + Return (0x00) + } Else { + Return (0x0F) } - - Device (COM2) - { - Name (_HID, EisaId ("PNP0501")) - Name (_UID, 0x01) - Method (_STA, 0, NotSerialized) - { - Store (CBEN, Local0) - If (LEqual (Local0, 0)) - { - Return (0x00) - } - Else - { - Return (0x0F) - } - } - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x02F8, 0x02F8, 0x00, 0x08) - IRQNoFlags () { 3 } - }) + } + Name(_CRS, ResourceTemplate() { + IO(Decode16, 0x0378, 0x0378, 0x08, 0x08) + IRQNoFlags() { 7 } + }) + } + + Device(COM1) { + Name(_HID, EisaId("PNP0501")) + Name(_UID, 0x01) + Method(_STA, 0, NotSerialized) { + Store(CAEN, Local0) + If (LEqual(Local0, 0)) { + Return (0x00) + } Else { + Return (0x0F) } + } + Name(_CRS, ResourceTemplate() { + IO(Decode16, 0x03F8, 0x03F8, 0x00, 0x08) + IRQNoFlags() { 4 } + }) + }
- } \ No newline at end of file + Device(COM2) { + Name(_HID, EisaId("PNP0501")) + Name(_UID, 0x01) + Method(_STA, 0, NotSerialized) { + Store(CBEN, Local0) + If (LEqual(Local0, 0)) { + Return (0x00) + } Else { + Return (0x0F) + } + } + Name(_CRS, ResourceTemplate() { + IO(Decode16, 0x02F8, 0x02F8, 0x00, 0x08) + IRQNoFlags() { 3 } + }) + } +} diff --git a/src/acpi-dsdt-pci-crs.dsl b/src/acpi-dsdt-pci-crs.dsl index c8c40f3..024403c 100644 --- a/src/acpi-dsdt-pci-crs.dsl +++ b/src/acpi-dsdt-pci-crs.dsl @@ -1,108 +1,107 @@ +/* PCI CRS (current resources) definition. */ +Scope(_SB.PCI0) {
- Scope(_SB.PCI0) { + Name(CRES, ResourceTemplate() { + WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Address Space Granularity + 0x0000, // Address Range Minimum + 0x00FF, // Address Range Maximum + 0x0000, // Address Translation Offset + 0x0100, // Address Length + ,, ) + IO(Decode16, + 0x0CF8, // Address Range Minimum + 0x0CF8, // Address Range Maximum + 0x01, // Address Alignment + 0x08, // Address Length + ) + WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Address Space Granularity + 0x0000, // Address Range Minimum + 0x0CF7, // Address Range Maximum + 0x0000, // Address Translation Offset + 0x0CF8, // Address Length + ,, , TypeStatic) + WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Address Space Granularity + 0x0D00, // Address Range Minimum + 0xFFFF, // Address Range Maximum + 0x0000, // Address Translation Offset + 0xF300, // Address Length + ,, , TypeStatic) + DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x000A0000, // Address Range Minimum + 0x000BFFFF, // Address Range Maximum + 0x00000000, // Address Translation Offset + 0x00020000, // Address Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0xE0000000, // Address Range Minimum + 0xFEBFFFFF, // Address Range Maximum + 0x00000000, // Address Translation Offset + 0x1EC00000, // Address Length + ,, PW32, AddressRangeMemory, TypeStatic) + })
- Name (CRES, ResourceTemplate () - { - WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, - 0x0000, // Address Space Granularity - 0x0000, // Address Range Minimum - 0x00FF, // Address Range Maximum - 0x0000, // Address Translation Offset - 0x0100, // Address Length - ,, ) - IO (Decode16, - 0x0CF8, // Address Range Minimum - 0x0CF8, // Address Range Maximum - 0x01, // Address Alignment - 0x08, // Address Length - ) - WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, - 0x0000, // Address Space Granularity - 0x0000, // Address Range Minimum - 0x0CF7, // Address Range Maximum - 0x0000, // Address Translation Offset - 0x0CF8, // Address Length - ,, , TypeStatic) - WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, - 0x0000, // Address Space Granularity - 0x0D00, // Address Range Minimum - 0xFFFF, // Address Range Maximum - 0x0000, // Address Translation Offset - 0xF300, // Address Length - ,, , TypeStatic) - DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, - 0x00000000, // Address Space Granularity - 0x000A0000, // Address Range Minimum - 0x000BFFFF, // Address Range Maximum - 0x00000000, // Address Translation Offset - 0x00020000, // Address Length - ,, , AddressRangeMemory, TypeStatic) - DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, - 0x00000000, // Address Space Granularity - 0xE0000000, // Address Range Minimum - 0xFEBFFFFF, // Address Range Maximum - 0x00000000, // Address Translation Offset - 0x1EC00000, // Address Length - ,, PW32, AddressRangeMemory, TypeStatic) - }) - Name (CR64, ResourceTemplate () - { - QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, - 0x00000000, // Address Space Granularity - 0x8000000000, // Address Range Minimum - 0xFFFFFFFFFF, // Address Range Maximum - 0x00000000, // Address Translation Offset - 0x8000000000, // Address Length - ,, PW64, AddressRangeMemory, TypeStatic) - }) - Method (_CRS, 0) - { - /* see see acpi.h, struct bfld */ - External (BDAT, OpRegionObj) - Field(BDAT, QWordAcc, NoLock, Preserve) { - P0S, 64, - P0E, 64, - P0L, 64, - P1S, 64, - P1E, 64, - P1L, 64, - } - Field(BDAT, DWordAcc, NoLock, Preserve) { - P0SL, 32, - P0SH, 32, - P0EL, 32, - P0EH, 32, - P0LL, 32, - P0LH, 32, - P1SL, 32, - P1SH, 32, - P1EL, 32, - P1EH, 32, - P1LL, 32, - P1LH, 32, - } + Name(CR64, ResourceTemplate() { + QWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x8000000000, // Address Range Minimum + 0xFFFFFFFFFF, // Address Range Maximum + 0x00000000, // Address Translation Offset + 0x8000000000, // Address Length + ,, PW64, AddressRangeMemory, TypeStatic) + })
- /* fixup 32bit pci io window */ - CreateDWordField (CRES,_SB.PCI0.PW32._MIN, PS32) - CreateDWordField (CRES,_SB.PCI0.PW32._MAX, PE32) - CreateDWordField (CRES,_SB.PCI0.PW32._LEN, PL32) - Store (P0SL, PS32) - Store (P0EL, PE32) - Store (P0LL, PL32) + Method(_CRS, 0) { + /* see see acpi.h, struct bfld */ + External(BDAT, OpRegionObj) + Field(BDAT, QWordAcc, NoLock, Preserve) { + P0S, 64, + P0E, 64, + P0L, 64, + P1S, 64, + P1E, 64, + P1L, 64, + } + Field(BDAT, DWordAcc, NoLock, Preserve) { + P0SL, 32, + P0SH, 32, + P0EL, 32, + P0EH, 32, + P0LL, 32, + P0LH, 32, + P1SL, 32, + P1SH, 32, + P1EL, 32, + P1EH, 32, + P1LL, 32, + P1LH, 32, + }
- If (LAnd(LEqual(P1SL, 0x00), LEqual(P1SH, 0x00))) { - Return (CRES) - } Else { - /* fixup 64bit pci io window */ - CreateQWordField (CR64,_SB.PCI0.PW64._MIN, PS64) - CreateQWordField (CR64,_SB.PCI0.PW64._MAX, PE64) - CreateQWordField (CR64,_SB.PCI0.PW64._LEN, PL64) - Store (P1S, PS64) - Store (P1E, PE64) - Store (P1L, PL64) - /* add window and return result */ - ConcatenateResTemplate (CRES, CR64, Local0) - Return (Local0) - } - } + /* fixup 32bit pci io window */ + CreateDWordField(CRES,_SB.PCI0.PW32._MIN, PS32) + CreateDWordField(CRES,_SB.PCI0.PW32._MAX, PE32) + CreateDWordField(CRES,_SB.PCI0.PW32._LEN, PL32) + Store(P0SL, PS32) + Store(P0EL, PE32) + Store(P0LL, PL32) + + If (LAnd(LEqual(P1SL, 0x00), LEqual(P1SH, 0x00))) { + Return (CRES) + } Else { + /* fixup 64bit pci io window */ + CreateQWordField(CR64,_SB.PCI0.PW64._MIN, PS64) + CreateQWordField(CR64,_SB.PCI0.PW64._MAX, PE64) + CreateQWordField(CR64,_SB.PCI0.PW64._LEN, PL64) + Store(P1S, PS64) + Store(P1E, PE64) + Store(P1L, PL64) + /* add window and return result */ + ConcatenateResTemplate(CRES, CR64, Local0) + Return (Local0) + } } +} diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl index bb4656c..10caf93 100644 --- a/src/acpi-dsdt.dsl +++ b/src/acpi-dsdt.dsl @@ -31,78 +31,79 @@ DefinitionBlock (
#include "acpi-dsdt-dbug.dsl"
+ /**************************************************************** * PCI Bus definition ****************************************************************/
Scope(_SB) { Device(PCI0) { - Name (_HID, EisaId ("PNP0A03")) - Name (_ADR, 0x00) - Name (_UID, 1) + Name(_HID, EisaId("PNP0A03")) + Name(_ADR, 0x00) + Name(_UID, 1) Name(_PRT, Package() { /* PCI IRQ routing table, example from ACPI 2.0a specification, section 6.2.8.1 */ /* Note: we provide the same info as the PCI routing table of the Bochs BIOS */ + #define prt_slot(nr, lnk0, lnk1, lnk2, lnk3) \ - Package() { nr##ffff, 0, lnk0, 0 }, \ - Package() { nr##ffff, 1, lnk1, 0 }, \ - Package() { nr##ffff, 2, lnk2, 0 }, \ - Package() { nr##ffff, 3, lnk3, 0 } + Package() { nr##ffff, 0, lnk0, 0 }, \ + Package() { nr##ffff, 1, lnk1, 0 }, \ + Package() { nr##ffff, 2, lnk2, 0 }, \ + Package() { nr##ffff, 3, lnk3, 0 }
#define prt_slot0(nr) prt_slot(nr, LNKD, LNKA, LNKB, LNKC) #define prt_slot1(nr) prt_slot(nr, LNKA, LNKB, LNKC, LNKD) #define prt_slot2(nr) prt_slot(nr, LNKB, LNKC, LNKD, LNKA) #define prt_slot3(nr) prt_slot(nr, LNKC, LNKD, LNKA, LNKB) - prt_slot0(0x0000), - /* Device 1 is power mgmt device, and can only use irq 9 */ - Package() { 0x1ffff, 0, 0, 9 }, - Package() { 0x1ffff, 1, LNKB, 0 }, - Package() { 0x1ffff, 2, LNKC, 0 }, - Package() { 0x1ffff, 3, LNKD, 0 }, - prt_slot2(0x0002), - prt_slot3(0x0003), - prt_slot0(0x0004), - prt_slot1(0x0005), - prt_slot2(0x0006), - prt_slot3(0x0007), - prt_slot0(0x0008), - prt_slot1(0x0009), - prt_slot2(0x000a), - prt_slot3(0x000b), - prt_slot0(0x000c), - prt_slot1(0x000d), - prt_slot2(0x000e), - prt_slot3(0x000f), - prt_slot0(0x0010), - prt_slot1(0x0011), - prt_slot2(0x0012), - prt_slot3(0x0013), - prt_slot0(0x0014), - prt_slot1(0x0015), - prt_slot2(0x0016), - prt_slot3(0x0017), - prt_slot0(0x0018), - prt_slot1(0x0019), - prt_slot2(0x001a), - prt_slot3(0x001b), - prt_slot0(0x001c), - prt_slot1(0x001d), - prt_slot2(0x001e), - prt_slot3(0x001f), + + prt_slot0(0x0000), + /* Device 1 is power mgmt device, and can only use irq 9 */ + Package() { 0x1ffff, 0, 0, 9 }, + Package() { 0x1ffff, 1, LNKB, 0 }, + Package() { 0x1ffff, 2, LNKC, 0 }, + Package() { 0x1ffff, 3, LNKD, 0 }, + prt_slot2(0x0002), + prt_slot3(0x0003), + prt_slot0(0x0004), + prt_slot1(0x0005), + prt_slot2(0x0006), + prt_slot3(0x0007), + prt_slot0(0x0008), + prt_slot1(0x0009), + prt_slot2(0x000a), + prt_slot3(0x000b), + prt_slot0(0x000c), + prt_slot1(0x000d), + prt_slot2(0x000e), + prt_slot3(0x000f), + prt_slot0(0x0010), + prt_slot1(0x0011), + prt_slot2(0x0012), + prt_slot3(0x0013), + prt_slot0(0x0014), + prt_slot1(0x0015), + prt_slot2(0x0016), + prt_slot3(0x0017), + prt_slot0(0x0018), + prt_slot1(0x0019), + prt_slot2(0x001a), + prt_slot3(0x001b), + prt_slot0(0x001c), + prt_slot1(0x001d), + prt_slot2(0x001e), + prt_slot3(0x001f), })
OperationRegion(PCST, SystemIO, 0xae00, 0x08) - Field (PCST, DWordAcc, NoLock, WriteAsZeros) - { + Field(PCST, DWordAcc, NoLock, WriteAsZeros) { PCIU, 32, PCID, 32, }
OperationRegion(SEJ, SystemIO, 0xae08, 0x04) - Field (SEJ, DWordAcc, NoLock, WriteAsZeros) - { + Field(SEJ, DWordAcc, NoLock, WriteAsZeros) { B0EJ, 32, } } @@ -111,33 +112,31 @@ DefinitionBlock ( #include "acpi-dsdt-pci-crs.dsl" #include "acpi-dsdt-hpet.dsl"
+ /**************************************************************** * VGA ****************************************************************/
Scope(_SB.PCI0) { - Device (VGA) { - Name (_ADR, 0x00020000) - OperationRegion(PCIC, PCI_Config, Zero, 0x4) - Field(PCIC, DWordAcc, NoLock, Preserve) { - VEND, 32 - } - Method (_S1D, 0, NotSerialized) - { - Return (0x00) - } - Method (_S2D, 0, NotSerialized) - { - Return (0x00) - } - Method (_S3D, 0, NotSerialized) - { - If (LEqual(VEND, 0x1001b36)) { - Return (0x03) // QXL - } Else { - Return (0x00) - } - } + Device(VGA) { + Name(_ADR, 0x00020000) + OperationRegion(PCIC, PCI_Config, Zero, 0x4) + Field(PCIC, DWordAcc, NoLock, Preserve) { + VEND, 32 + } + Method(_S1D, 0, NotSerialized) { + Return (0x00) + } + Method(_S2D, 0, NotSerialized) { + Return (0x00) + } + Method(_S3D, 0, NotSerialized) { + If (LEqual(VEND, 0x1001b36)) { + Return (0x03) // QXL + } Else { + Return (0x00) + } + } } }
@@ -147,11 +146,11 @@ DefinitionBlock ( ****************************************************************/
Scope(_SB.PCI0) { - Device (ISA) { - Name (_ADR, 0x00010000) + Device(ISA) { + Name(_ADR, 0x00010000)
/* PIIX PCI to ISA irq remapping */ - OperationRegion (P40C, PCI_Config, 0x60, 0x04) + OperationRegion(P40C, PCI_Config, 0x60, 0x04) } }
@@ -162,19 +161,19 @@ DefinitionBlock (
Scope(_SB.PCI0.ISA) {
- /* enable bits */ - Field (_SB.PCI0.PX13.P13C, AnyAcc, NoLock, Preserve) - { - Offset(0x5f), - , 7, - LPEN, 1, // LPT - Offset(0x67), - , 3, - CAEN, 1, // COM1 - , 3, - CBEN, 1, // COM2 - } - Name (FDEN, 1) + /* enable bits */ + Field(_SB.PCI0.PX13.P13C, AnyAcc, NoLock, Preserve) + { + Offset(0x5f), + , 7, + LPEN, 1, // LPT + Offset(0x67), + , 3, + CAEN, 1, // COM1 + , 3, + CBEN, 1, // COM2 + } + Name(FDEN, 1) }
#include "acpi-dsdt-isa.dsl" @@ -185,10 +184,10 @@ DefinitionBlock ( ****************************************************************/
Scope(_SB.PCI0) { - Device (PX13) { - Name (_ADR, 0x00010003) - OperationRegion (P13C, PCI_Config, 0x00, 0xff) - } + Device(PX13) { + Name(_ADR, 0x00010003) + OperationRegion(P13C, PCI_Config, 0x00, 0xff) + } }
@@ -200,19 +199,19 @@ DefinitionBlock ( /* Methods called by bulk generated PCI devices below */
/* Methods called by hotplug devices */ - Method (PCEJ, 1, NotSerialized) { + Method(PCEJ, 1, NotSerialized) { // _EJ0 method - eject callback Store(ShiftLeft(1, Arg0), B0EJ) Return (0x0) }
- /* Hotplug notification method supplied by SSDT */ - External (_SB.PCI0.PCNT, MethodObj) + /* Hotplug notification method supplied by SSDT */ + External(_SB.PCI0.PCNT, MethodObj)
/* PCI hotplug notify method */ Method(PCNF, 0) { // Local0 = iterator - Store (Zero, Local0) + Store(Zero, Local0) While (LLess(Local0, 31)) { Increment(Local0) If (And(PCIU, ShiftLeft(1, Local0))) { @@ -223,7 +222,6 @@ DefinitionBlock ( } } } - }
@@ -232,31 +230,28 @@ DefinitionBlock ( ****************************************************************/
Scope(_SB) { - Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) - { + Field(PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) { PRQ0, 8, PRQ1, 8, PRQ2, 8, PRQ3, 8 }
- Method (IQST, 1, NotSerialized) { + Method(IQST, 1, NotSerialized) { // _STA method - get status - If (And (0x80, Arg0)) { + If (And(0x80, Arg0)) { Return (0x09) } Return (0x0B) } - Method (IQCR, 1, NotSerialized) { + Method(IQCR, 1, NotSerialized) { // _CRS method - get current settings - Name (PRR0, ResourceTemplate () - { - Interrupt (, Level, ActiveHigh, Shared) - { 0 } + Name(PRR0, ResourceTemplate() { + Interrupt(, Level, ActiveHigh, Shared) { 0 } }) - CreateDWordField (PRR0, 0x05, PRRI) - If (LLess (Arg0, 0x80)) { - Store (Arg0, PRRI) + CreateDWordField(PRR0, 0x05, PRRI) + If (LLess(Arg0, 0x80)) { + Store(Arg0, PRRI) } Return (PRR0) } @@ -265,67 +260,71 @@ DefinitionBlock ( Or(PRQVAR, 0x80, PRQVAR) \ // _SRS method - set interrupt #define SETIRQ(PRQVAR, IRQINFO) \ - CreateDWordField (IRQINFO, 0x05, PRRI) \ - Store (PRRI, PRQVAR) + CreateDWordField(IRQINFO, 0x05, PRRI) \ + Store(PRRI, PRQVAR)
Device(LNKA) { Name(_HID, EISAID("PNP0C0F")) // PCI interrupt link Name(_UID, 1) - Name(_PRS, ResourceTemplate(){ - Interrupt (, Level, ActiveHigh, Shared) - { 5, 10, 11 } + Name(_PRS, ResourceTemplate() { + Interrupt(, Level, ActiveHigh, Shared) { + 5, 10, 11 + } }) - Method (_STA, 0, NotSerialized) { Return (IQST(PRQ0)) } - Method (_DIS, 0, NotSerialized) { DISIRQ(PRQ0) } - Method (_CRS, 0, NotSerialized) { Return (IQCR(PRQ0)) } - Method (_SRS, 1, NotSerialized) { SETIRQ(PRQ0, Arg0) } + Method(_STA, 0, NotSerialized) { Return (IQST(PRQ0)) } + Method(_DIS, 0, NotSerialized) { DISIRQ(PRQ0) } + Method(_CRS, 0, NotSerialized) { Return (IQCR(PRQ0)) } + Method(_SRS, 1, NotSerialized) { SETIRQ(PRQ0, Arg0) } } Device(LNKB) { Name(_HID, EISAID("PNP0C0F")) // PCI interrupt link Name(_UID, 2) - Name(_PRS, ResourceTemplate(){ - Interrupt (, Level, ActiveHigh, Shared) - { 5, 10, 11 } + Name(_PRS, ResourceTemplate() { + Interrupt(, Level, ActiveHigh, Shared) { + 5, 10, 11 + } }) - Method (_STA, 0, NotSerialized) { Return (IQST(PRQ1)) } - Method (_DIS, 0, NotSerialized) { DISIRQ(PRQ1) } - Method (_CRS, 0, NotSerialized) { Return (IQCR(PRQ1)) } - Method (_SRS, 1, NotSerialized) { SETIRQ(PRQ1, Arg0) } + Method(_STA, 0, NotSerialized) { Return (IQST(PRQ1)) } + Method(_DIS, 0, NotSerialized) { DISIRQ(PRQ1) } + Method(_CRS, 0, NotSerialized) { Return (IQCR(PRQ1)) } + Method(_SRS, 1, NotSerialized) { SETIRQ(PRQ1, Arg0) } } Device(LNKC) { Name(_HID, EISAID("PNP0C0F")) // PCI interrupt link Name(_UID, 3) Name(_PRS, ResourceTemplate() { - Interrupt (, Level, ActiveHigh, Shared) - { 5, 10, 11 } + Interrupt(, Level, ActiveHigh, Shared) { + 5, 10, 11 + } }) - Method (_STA, 0, NotSerialized) { Return (IQST(PRQ2)) } - Method (_DIS, 0, NotSerialized) { DISIRQ(PRQ2) } - Method (_CRS, 0, NotSerialized) { Return (IQCR(PRQ2)) } - Method (_SRS, 1, NotSerialized) { SETIRQ(PRQ2, Arg0) } + Method(_STA, 0, NotSerialized) { Return (IQST(PRQ2)) } + Method(_DIS, 0, NotSerialized) { DISIRQ(PRQ2) } + Method(_CRS, 0, NotSerialized) { Return (IQCR(PRQ2)) } + Method(_SRS, 1, NotSerialized) { SETIRQ(PRQ2, Arg0) } } Device(LNKD) { Name(_HID, EISAID("PNP0C0F")) // PCI interrupt link Name(_UID, 4) Name(_PRS, ResourceTemplate() { - Interrupt (, Level, ActiveHigh, Shared) - { 5, 10, 11 } + Interrupt(, Level, ActiveHigh, Shared) { + 5, 10, 11 + } }) - Method (_STA, 0, NotSerialized) { Return (IQST(PRQ3)) } - Method (_DIS, 0, NotSerialized) { DISIRQ(PRQ3) } - Method (_CRS, 0, NotSerialized) { Return (IQCR(PRQ3)) } - Method (_SRS, 1, NotSerialized) { SETIRQ(PRQ3, Arg0) } + Method(_STA, 0, NotSerialized) { Return (IQST(PRQ3)) } + Method(_DIS, 0, NotSerialized) { DISIRQ(PRQ3) } + Method(_CRS, 0, NotSerialized) { Return (IQCR(PRQ3)) } + Method(_SRS, 1, NotSerialized) { SETIRQ(PRQ3, Arg0) } } }
#include "acpi-dsdt-cpu-hotplug.dsl"
+ /**************************************************************** * General purpose events ****************************************************************/
- Scope (_GPE) - { + Scope(_GPE) { Name(_HID, "ACPI0006")
Method(_L00) { diff --git a/src/q35-acpi-dsdt.dsl b/src/q35-acpi-dsdt.dsl index b106a4f..cb70678 100644 --- a/src/q35-acpi-dsdt.dsl +++ b/src/q35-acpi-dsdt.dsl @@ -34,98 +34,89 @@ DefinitionBlock (
#include "acpi-dsdt-dbug.dsl"
- Scope (_SB) - { + Scope(_SB) { OperationRegion(PCST, SystemIO, 0xae00, 0x0c) OperationRegion(PCSB, SystemIO, 0xae0c, 0x01) - Field (PCSB, AnyAcc, NoLock, WriteAsZeros) - { + Field(PCSB, AnyAcc, NoLock, WriteAsZeros) { PCIB, 8, } }
/* Zero => PIC mode, One => APIC Mode */ - Name (\PICF, Zero) - Method (_PIC, 1, NotSerialized) - { - Store (Arg0, \PICF) + Name(\PICF, Zero) + Method(_PIC, 1, NotSerialized) { + Store(Arg0, \PICF) }
/* PCI Bus definition */ Scope(_SB) {
Device(PCI0) { - Name (_HID, EisaId ("PNP0A08")) - Name (_CID, EisaId ("PNP0A03")) - Name (_ADR, 0x00) - Name (_UID, 1) + Name(_HID, EisaId("PNP0A08")) + Name(_CID, EisaId("PNP0A03")) + Name(_ADR, 0x00) + Name(_UID, 1)
// _OSC: based on sample of ACPI3.0b spec - Name(SUPP,0) // PCI _OSC Support Field value - Name(CTRL,0) // PCI _OSC Control Field value - Method(_OSC,4) - { + Name(SUPP, 0) // PCI _OSC Support Field value + Name(CTRL, 0) // PCI _OSC Control Field value + Method(_OSC, 4) { // Create DWORD-addressable fields from the Capabilities Buffer - CreateDWordField(Arg3,0,CDW1) + CreateDWordField(Arg3, 0, CDW1)
// Check for proper UUID - If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) - { + If (LEqual(Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) { // Create DWORD-addressable fields from the Capabilities Buffer - CreateDWordField(Arg3,4,CDW2) - CreateDWordField(Arg3,8,CDW3) + CreateDWordField(Arg3, 4, CDW2) + CreateDWordField(Arg3, 8, CDW3)
// Save Capabilities DWORD2 & 3 - Store(CDW2,SUPP) - Store(CDW3,CTRL) + Store(CDW2, SUPP) + Store(CDW3, CTRL)
// Always allow native PME, AER (no dependencies) // Never allow SHPC (no SHPC controller in this system) - And(CTRL,0x1D,CTRL) + And(CTRL, 0x1D, CTRL)
#if 0 // For now, nothing to do - If(Not(And(CDW1,1))) // Query flag clear? - { // Disable GPEs for features granted native control. - If(And(CTRL,0x01)) // Hot plug control granted? - { - Store(0,HPCE) // clear the hot plug SCI enable bit - Store(1,HPCS) // clear the hot plug SCI status bit + If (Not(And(CDW1, 1))) { // Query flag clear? + // Disable GPEs for features granted native control. + If (And(CTRL, 0x01)) { // Hot plug control granted? + Store(0, HPCE) // clear the hot plug SCI enable bit + Store(1, HPCS) // clear the hot plug SCI status bit } - If(And(CTRL,0x04)) // PME control granted? - { - Store(0,PMCE) // clear the PME SCI enable bit - Store(1,PMCS) // clear the PME SCI status bit + If (And(CTRL, 0x04)) { // PME control granted? + Store(0, PMCE) // clear the PME SCI enable bit + Store(1, PMCS) // clear the PME SCI status bit } - If(And(CTRL,0x10)) // OS restoring PCI Express cap structure? - { + If (And(CTRL, 0x10)) { // OS restoring PCI Express cap structure? // Set status to not restore PCI Express cap structure // upon resume from S3 - Store(1,S3CR) + Store(1, S3CR) } - } #endif - If(LNotEqual(Arg1,One)) - { // Unknown revision - Or(CDW1,0x08,CDW1) + If (LNotEqual(Arg1, One)) { + // Unknown revision + Or(CDW1, 0x08, CDW1) } - If(LNotEqual(CDW3,CTRL)) - { // Capabilities bits were masked - Or(CDW1,0x10,CDW1) + If (LNotEqual(CDW3, CTRL)) { + // Capabilities bits were masked + Or(CDW1, 0x10, CDW1) } // Update DWORD3 in the buffer - Store(CTRL,CDW3) + Store(CTRL, CDW3) } Else { - Or(CDW1,4,CDW1) // Unrecognized UUID + Or(CDW1, 4, CDW1) // Unrecognized UUID } - Return(Arg3) + Return (Arg3) }
-#define prt_slot_lnk(nr, lnk0, lnk1, lnk2, lnk3) \ - Package() { nr##ffff, 0, lnk0, 0 }, \ - Package() { nr##ffff, 1, lnk1, 0 }, \ - Package() { nr##ffff, 2, lnk2, 0 }, \ - Package() { nr##ffff, 3, lnk3, 0 } +#define prt_slot_lnk(nr, lnk0, lnk1, lnk2, lnk3) \ + Package() { nr##ffff, 0, lnk0, 0 }, \ + Package() { nr##ffff, 1, lnk1, 0 }, \ + Package() { nr##ffff, 2, lnk2, 0 }, \ + Package() { nr##ffff, 3, lnk3, 0 }
#define prt_slot_lnkA(nr) prt_slot_lnk(nr, LNKA, LNKB, LNKC, LNKD) #define prt_slot_lnkB(nr) prt_slot_lnk(nr, LNKB, LNKC, LNKD, LNKA) @@ -137,11 +128,11 @@ DefinitionBlock ( #define prt_slot_lnkG(nr) prt_slot_lnk(nr, LNKG, LNKH, LNKE, LNKF) #define prt_slot_lnkH(nr) prt_slot_lnk(nr, LNKH, LNKE, LNKF, LNKG)
-#define prt_slot_gsi(nr, gsi0, gsi1, gsi2, gsi3) \ - Package() { nr##ffff, 0, gsi0, 0 }, \ - Package() { nr##ffff, 1, gsi1, 0 }, \ - Package() { nr##ffff, 2, gsi2, 0 }, \ - Package() { nr##ffff, 3, gsi3, 0 } +#define prt_slot_gsi(nr, gsi0, gsi1, gsi2, gsi3) \ + Package() { nr##ffff, 0, gsi0, 0 }, \ + Package() { nr##ffff, 1, gsi1, 0 }, \ + Package() { nr##ffff, 2, gsi2, 0 }, \ + Package() { nr##ffff, 3, gsi3, 0 }
#define prt_slot_gsiA(nr) prt_slot_gsi(nr, GSIA, GSIB, GSIC, GSID) #define prt_slot_gsiB(nr) prt_slot_gsi(nr, GSIB, GSIC, GSID, GSIA) @@ -153,104 +144,98 @@ DefinitionBlock ( #define prt_slot_gsiG(nr) prt_slot_gsi(nr, GSIG, GSIH, GSIE, GSIF) #define prt_slot_gsiH(nr) prt_slot_gsi(nr, GSIH, GSIE, GSIF, GSIG)
- NAME(PRTP, package() - { - prt_slot_lnkE(0x0000), - prt_slot_lnkF(0x0001), - prt_slot_lnkG(0x0002), - prt_slot_lnkH(0x0003), - prt_slot_lnkE(0x0004), - prt_slot_lnkF(0x0005), - prt_slot_lnkG(0x0006), - prt_slot_lnkH(0x0007), - prt_slot_lnkE(0x0008), - prt_slot_lnkF(0x0009), - prt_slot_lnkG(0x000a), - prt_slot_lnkH(0x000b), - prt_slot_lnkE(0x000c), - prt_slot_lnkF(0x000d), - prt_slot_lnkG(0x000e), - prt_slot_lnkH(0x000f), - prt_slot_lnkE(0x0010), - prt_slot_lnkF(0x0011), - prt_slot_lnkG(0x0012), - prt_slot_lnkH(0x0013), - prt_slot_lnkE(0x0014), - prt_slot_lnkF(0x0015), - prt_slot_lnkG(0x0016), - prt_slot_lnkH(0x0017), - prt_slot_lnkE(0x0018), - - /* INTA -> PIRQA for slot 25 - 31 - see the default value of D<N>IR */ - prt_slot_lnkA(0x0019), - prt_slot_lnkA(0x001a), - prt_slot_lnkA(0x001b), - prt_slot_lnkA(0x001c), - prt_slot_lnkA(0x001d), - - /* PCIe->PCI bridge. use PIRQ[E-H] */ - prt_slot_lnkE(0x001e), - - prt_slot_lnkA(0x001f) + NAME(PRTP, package() { + prt_slot_lnkE(0x0000), + prt_slot_lnkF(0x0001), + prt_slot_lnkG(0x0002), + prt_slot_lnkH(0x0003), + prt_slot_lnkE(0x0004), + prt_slot_lnkF(0x0005), + prt_slot_lnkG(0x0006), + prt_slot_lnkH(0x0007), + prt_slot_lnkE(0x0008), + prt_slot_lnkF(0x0009), + prt_slot_lnkG(0x000a), + prt_slot_lnkH(0x000b), + prt_slot_lnkE(0x000c), + prt_slot_lnkF(0x000d), + prt_slot_lnkG(0x000e), + prt_slot_lnkH(0x000f), + prt_slot_lnkE(0x0010), + prt_slot_lnkF(0x0011), + prt_slot_lnkG(0x0012), + prt_slot_lnkH(0x0013), + prt_slot_lnkE(0x0014), + prt_slot_lnkF(0x0015), + prt_slot_lnkG(0x0016), + prt_slot_lnkH(0x0017), + prt_slot_lnkE(0x0018), + + /* INTA -> PIRQA for slot 25 - 31 + see the default value of D<N>IR */ + prt_slot_lnkA(0x0019), + prt_slot_lnkA(0x001a), + prt_slot_lnkA(0x001b), + prt_slot_lnkA(0x001c), + prt_slot_lnkA(0x001d), + + /* PCIe->PCI bridge. use PIRQ[E-H] */ + prt_slot_lnkE(0x001e), + + prt_slot_lnkA(0x001f) + }) + + NAME(PRTA, package() { + prt_slot_gsiE(0x0000), + prt_slot_gsiF(0x0001), + prt_slot_gsiG(0x0002), + prt_slot_gsiH(0x0003), + prt_slot_gsiE(0x0004), + prt_slot_gsiF(0x0005), + prt_slot_gsiG(0x0006), + prt_slot_gsiH(0x0007), + prt_slot_gsiE(0x0008), + prt_slot_gsiF(0x0009), + prt_slot_gsiG(0x000a), + prt_slot_gsiH(0x000b), + prt_slot_gsiE(0x000c), + prt_slot_gsiF(0x000d), + prt_slot_gsiG(0x000e), + prt_slot_gsiH(0x000f), + prt_slot_gsiE(0x0010), + prt_slot_gsiF(0x0011), + prt_slot_gsiG(0x0012), + prt_slot_gsiH(0x0013), + prt_slot_gsiE(0x0014), + prt_slot_gsiF(0x0015), + prt_slot_gsiG(0x0016), + prt_slot_gsiH(0x0017), + prt_slot_gsiE(0x0018), + + /* INTA -> PIRQA for slot 25 - 31, but 30 + see the default value of D<N>IR */ + prt_slot_gsiA(0x0019), + prt_slot_gsiA(0x001a), + prt_slot_gsiA(0x001b), + prt_slot_gsiA(0x001c), + prt_slot_gsiA(0x001d), + + /* PCIe->PCI bridge. use PIRQ[E-H] */ + prt_slot_gsiE(0x001e), + + prt_slot_gsiA(0x001f) })
- NAME(PRTA, package() - { - prt_slot_gsiE(0x0000), - prt_slot_gsiF(0x0001), - prt_slot_gsiG(0x0002), - prt_slot_gsiH(0x0003), - prt_slot_gsiE(0x0004), - prt_slot_gsiF(0x0005), - prt_slot_gsiG(0x0006), - prt_slot_gsiH(0x0007), - prt_slot_gsiE(0x0008), - prt_slot_gsiF(0x0009), - prt_slot_gsiG(0x000a), - prt_slot_gsiH(0x000b), - prt_slot_gsiE(0x000c), - prt_slot_gsiF(0x000d), - prt_slot_gsiG(0x000e), - prt_slot_gsiH(0x000f), - prt_slot_gsiE(0x0010), - prt_slot_gsiF(0x0011), - prt_slot_gsiG(0x0012), - prt_slot_gsiH(0x0013), - prt_slot_gsiE(0x0014), - prt_slot_gsiF(0x0015), - prt_slot_gsiG(0x0016), - prt_slot_gsiH(0x0017), - prt_slot_gsiE(0x0018), - - /* INTA -> PIRQA for slot 25 - 31, but 30 - see the default value of D<N>IR */ - prt_slot_gsiA(0x0019), - prt_slot_gsiA(0x001a), - prt_slot_gsiA(0x001b), - prt_slot_gsiA(0x001c), - prt_slot_gsiA(0x001d), - - /* PCIe->PCI bridge. use PIRQ[E-H] */ - prt_slot_gsiE(0x001e), - - prt_slot_gsiA(0x001f) - }) - - Method(_PRT, 0, NotSerialized) - { + Method(_PRT, 0, NotSerialized) { /* PCI IRQ routing table, example from ACPI 2.0a specification, section 6.2.8.1 */ /* Note: we provide the same info as the PCI routing table of the Bochs BIOS */ - If (LEqual (\PICF, Zero)) - { - Return (PRTP) - } - Else - { - Return (PRTA) - } + If (LEqual(\PICF, Zero)) { + Return (PRTP) + } Else { + Return (PRTA) + } } } } @@ -259,47 +244,41 @@ DefinitionBlock ( #include "acpi-dsdt-hpet.dsl"
Scope(_SB.PCI0) { - Device (VGA) { - Name (_ADR, 0x00010000) - Method (_S1D, 0, NotSerialized) - { - Return (0x00) - } - Method (_S2D, 0, NotSerialized) - { - Return (0x00) - } - Method (_S3D, 0, NotSerialized) - { - Return (0x00) - } + Device(VGA) { + Name(_ADR, 0x00010000) + Method(_S1D, 0, NotSerialized) { + Return (0x00) + } + Method(_S2D, 0, NotSerialized) { + Return (0x00) + } + Method(_S3D, 0, NotSerialized) { + Return (0x00) + } }
- /* PCI D31:f0 LPC ISA bridge */ - Device (ISA) { + Device(ISA) { /* PCI D31:f0 */ - Name (_ADR, 0x001f0000) + Name(_ADR, 0x001f0000)
/* ICH9 PCI to ISA irq remapping */ - OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C) - Field (PIRQ, ByteAcc, NoLock, Preserve) - { + OperationRegion(PIRQ, PCI_Config, 0x60, 0x0C) + Field(PIRQ, ByteAcc, NoLock, Preserve) { PRQA, 8, PRQB, 8, PRQC, 8, PRQD, 8,
- Offset (0x08), + Offset(0x08), PRQE, 8, PRQF, 8, PRQG, 8, PRQH, 8 }
- OperationRegion (LPCD, PCI_Config, 0x80, 0x2) - Field (LPCD, AnyAcc, NoLock, Preserve) - { + OperationRegion(LPCD, PCI_Config, 0x80, 0x2) + Field(LPCD, AnyAcc, NoLock, Preserve) { COMA, 3, , 1, COMB, 3, @@ -309,9 +288,8 @@ DefinitionBlock ( , 2, FDCD, 2 } - OperationRegion (LPCE, PCI_Config, 0x82, 0x2) - Field (LPCE, AnyAcc, NoLock, Preserve) - { + OperationRegion(LPCE, PCI_Config, 0x82, 0x2) + Field(LPCE, AnyAcc, NoLock, Preserve) { CAEN, 1, CBEN, 1, LPEN, 1, @@ -324,46 +302,40 @@ DefinitionBlock (
/* PCI IRQs */ Scope(_SB) { -#define define_link(link, uid, reg) \ - Device(link){ \ - Name(_HID, EISAID("PNP0C0F")) \ - Name(_UID, uid) \ - Name(_PRS, ResourceTemplate(){ \ - Interrupt (, Level, ActiveHigh, \ - Shared) \ - { 5, 10, 11 } \ - }) \ - Method (_STA, 0, NotSerialized) \ - { \ - Store (0x0B, Local0) \ - If (And (0x80, reg, Local1)) \ - { \ - Store (0x09, Local0) \ - } \ - Return (Local0) \ - } \ - Method (_DIS, 0, NotSerialized) \ - { \ - Or (reg, 0x80, reg) \ - } \ - Method (_CRS, 0, NotSerialized) \ - { \ - Name (PRR0, ResourceTemplate () \ - { \ - Interrupt (, Level, ActiveHigh, \ - Shared) \ - {1} \ - }) \ - CreateDWordField (PRR0, 0x05, TMP) \ - And (reg, 0x0F, Local0) \ - Store (Local0, TMP) \ - Return (PRR0) \ - } \ - Method (_SRS, 1, NotSerialized) \ - { \ - CreateDWordField (Arg0, 0x05, TMP) \ - Store (TMP, reg) \ - } \ +#define define_link(link, uid, reg) \ + Device(link) { \ + Name(_HID, EISAID("PNP0C0F")) \ + Name(_UID, uid) \ + Name(_PRS, ResourceTemplate() { \ + Interrupt(, Level, ActiveHigh, Shared) { \ + 5, 10, 11 \ + } \ + }) \ + Method(_STA, 0, NotSerialized) { \ + Store(0x0B, Local0) \ + If (And(0x80, reg, Local1)) { \ + Store(0x09, Local0) \ + } \ + Return (Local0) \ + } \ + Method(_DIS, 0, NotSerialized) { \ + Or(reg, 0x80, reg) \ + } \ + Method(_CRS, 0, NotSerialized) { \ + Name(PRR0, ResourceTemplate() { \ + Interrupt(, Level, ActiveHigh, Shared) { \ + 1 \ + } \ + }) \ + CreateDWordField(PRR0, 0x05, TMP) \ + And(reg, 0x0F, Local0) \ + Store(Local0, TMP) \ + Return (PRR0) \ + } \ + Method(_SRS, 1, NotSerialized) { \ + CreateDWordField(Arg0, 0x05, TMP) \ + Store(TMP, reg) \ + } \ }
define_link(LNKA, 0, _SB.PCI0.ISA.PRQA) @@ -375,25 +347,26 @@ DefinitionBlock ( define_link(LNKG, 6, _SB.PCI0.ISA.PRQG) define_link(LNKH, 7, _SB.PCI0.ISA.PRQH)
-#define define_gsi_link(link, uid, gsi) \ - Device(link){ \ - Name(_HID, EISAID("PNP0C0F")) \ - Name(_UID, uid) \ - Name(_PRS, ResourceTemplate() { \ - Interrupt (, Level, ActiveHigh, \ - Shared) \ - { gsi } \ - }) \ - Method (_CRS, 0, NotSerialized) \ - { \ - Return (ResourceTemplate () { \ - Interrupt (, Level, ActiveHigh, \ - Shared) \ - { gsi } \ - }) \ - } \ - Method (_SRS, 1, NotSerialized) { } \ - } \ +#define define_gsi_link(link, uid, gsi) \ + Device(link) { \ + Name(_HID, EISAID("PNP0C0F")) \ + Name(_UID, uid) \ + Name(_PRS, ResourceTemplate() { \ + Interrupt(, Level, ActiveHigh, Shared) { \ + gsi \ + } \ + }) \ + Method(_CRS, 0, NotSerialized) \ + { \ + Return (ResourceTemplate() { \ + Interrupt(, Level, ActiveHigh, Shared) { \ + gsi \ + } \ + }) \ + } \ + Method(_SRS, 1, NotSerialized) { \ + } \ + }
define_gsi_link(GSIA, 0, 0x10) define_gsi_link(GSIB, 0, 0x11) @@ -407,58 +380,57 @@ DefinitionBlock (
#include "acpi-dsdt-cpu-hotplug.dsl"
- Scope (_GPE) - { + Scope(_GPE) { Name(_HID, "ACPI0006")
Method(_L00) { - Return(0x01) + Return (0x01) } Method(_L01) { - // CPU hotplug event - _SB.PRSC() + // CPU hotplug event + _SB.PRSC() } Method(_L02) { - Return(0x01) + Return (0x01) } Method(_L03) { - Return(0x01) + Return (0x01) } Method(_L04) { - Return(0x01) + Return (0x01) } Method(_L05) { - Return(0x01) + Return (0x01) } Method(_L06) { - Return(0x01) + Return (0x01) } Method(_L07) { - Return(0x01) + Return (0x01) } Method(_L08) { - Return(0x01) + Return (0x01) } Method(_L09) { - Return(0x01) + Return (0x01) } Method(_L0A) { - Return(0x01) + Return (0x01) } Method(_L0B) { - Return(0x01) + Return (0x01) } Method(_L0C) { - Return(0x01) + Return (0x01) } Method(_L0D) { - Return(0x01) + Return (0x01) } Method(_L0E) { - Return(0x01) + Return (0x01) } Method(_L0F) { - Return(0x01) + Return (0x01) } } } diff --git a/src/ssdt-pcihp.dsl b/src/ssdt-pcihp.dsl index cd66b83..67e485f 100644 --- a/src/ssdt-pcihp.dsl +++ b/src/ssdt-pcihp.dsl @@ -8,8 +8,8 @@ DefinitionBlock ("ssdt-pcihp.aml", "SSDT", 0x01, "BXPC", "BXSSDTPCIHP", 0x1) ****************************************************************/
/* Objects supplied by DSDT */ - External (_SB.PCI0, DeviceObj) - External (_SB.PCI0.PCEJ, MethodObj) + External(_SB.PCI0, DeviceObj) + External(_SB.PCI0.PCEJ, MethodObj)
Scope(_SB.PCI0) {
@@ -22,13 +22,15 @@ DefinitionBlock ("ssdt-pcihp.aml", "SSDT", 0x01, "BXPC", "BXSSDTPCIHP", 0x1) // at runtime, if the slot is detected to not support hotplug. // Extract the offset of the address dword and the // _EJ0 name to allow this patching. - Device (SAA) { - ACPI_EXTRACT_NAME_BYTE_CONST ssdt_pcihp_id - Name (_SUN, 0xAA) - ACPI_EXTRACT_NAME_DWORD_CONST ssdt_pcihp_adr - Name (_ADR, 0xAA0000) - ACPI_EXTRACT_METHOD_STRING ssdt_pcihp_ej0 - Method (_EJ0, 1) { Return(PCEJ(_SUN)) } + Device(SAA) { + ACPI_EXTRACT_NAME_BYTE_CONST ssdt_pcihp_id + Name(_SUN, 0xAA) + ACPI_EXTRACT_NAME_DWORD_CONST ssdt_pcihp_adr + Name(_ADR, 0xAA0000) + ACPI_EXTRACT_METHOD_STRING ssdt_pcihp_ej0 + Method(_EJ0, 1) { + Return (PCEJ(_SUN)) + } } } } diff --git a/src/ssdt-proc.dsl b/src/ssdt-proc.dsl index 0339422..407d61e 100644 --- a/src/ssdt-proc.dsl +++ b/src/ssdt-proc.dsl @@ -22,26 +22,26 @@ DefinitionBlock ("ssdt-proc.aml", "SSDT", 0x01, "BXPC", "BXSSDT", 0x1) ACPI_EXTRACT_PROCESSOR_START ssdt_proc_start ACPI_EXTRACT_PROCESSOR_END ssdt_proc_end ACPI_EXTRACT_PROCESSOR_STRING ssdt_proc_name - Processor (CPAA, 0xAA, 0x0000b010, 0x06) { + Processor(CPAA, 0xAA, 0x0000b010, 0x06) { ACPI_EXTRACT_NAME_BYTE_CONST ssdt_proc_id - Name (ID, 0xAA) + Name(ID, 0xAA) /* * The src/acpi.c code requires the above ACP_EXTRACT tags so that it can update * CPAA and 0xAA with the appropriate CPU id (see * SD_OFFSET_CPUHEX/CPUID1/CPUID2). Don't change the above without * also updating the C code. */ - Name (_HID, "ACPI0007") + Name(_HID, "ACPI0007") External(CPMA, MethodObj) External(CPST, MethodObj) External(CPEJ, MethodObj) Method(_MAT, 0) { - Return(CPMA(ID)) + Return (CPMA(ID)) } - Method (_STA, 0) { - Return(CPST(ID)) + Method(_STA, 0) { + Return (CPST(ID)) } - Method (_EJ0, 1, NotSerialized) { + Method(_EJ0, 1, NotSerialized) { CPEJ(ID, Arg0) } } diff --git a/src/ssdt-susp.dsl b/src/ssdt-susp.dsl index 0b3fa08..ca9428f 100644 --- a/src/ssdt-susp.dsl +++ b/src/ssdt-susp.dsl @@ -14,8 +14,7 @@ DefinitionBlock ("ssdt-susp.aml", "SSDT", 0x01, "BXPC", "BXSSDTSUSP", 0x1) */
ACPI_EXTRACT_NAME_STRING acpi_s3_name - Name (_S3, Package (0x04) - { + Name(_S3, Package(0x04) { One, /* PM1a_CNT.SLP_TYP */ One, /* PM1b_CNT.SLP_TYP */ Zero, /* reserved */ @@ -23,15 +22,13 @@ DefinitionBlock ("ssdt-susp.aml", "SSDT", 0x01, "BXPC", "BXSSDTSUSP", 0x1) }) ACPI_EXTRACT_NAME_STRING acpi_s4_name ACPI_EXTRACT_PKG_START acpi_s4_pkg - Name (_S4, Package (0x04) - { + Name(_S4, Package(0x04) { 0x2, /* PM1a_CNT.SLP_TYP */ 0x2, /* PM1b_CNT.SLP_TYP */ Zero, /* reserved */ Zero /* reserved */ }) - Name (_S5, Package (0x04) - { + Name(_S5, Package(0x04) { Zero, /* PM1a_CNT.SLP_TYP */ Zero, /* PM1b_CNT.SLP_TYP */ Zero, /* reserved */
On 12/02/12 07:46, Kevin O'Connor wrote:
This patch is purely cosmetic - no code changes should be observed.
Whole series looks good to me and survived a quick smoke test on both piix and q35.
cheers, Gerd
-
Gerd Hoffmann -
Kevin O'Connor