[PATCH V4 0/2] hw/pci: reserve IO and mem for pci-2-pci bridges with no devices attached

[Marcel Apfelbaum]

v3 -> v4:
 - Addressed Kevin O'Connor's comments:
   - Refactored a for loop in patch 1/2.
 - Addressed Michael S. Tsirkin's comments (patch 2/2):
   - Removed not needed method
   - Test only base registers (dropped limits tests)
   - Renamed a helper method
   - Used 0xFF to test if the memory is reserved
   - Simplified code in pci_bridge_has_region
 - I did keep the code that restores base's address as I don't want
   to modify the registers in a 'query' method. (as replied on the mail thread)

v2 -> v3:
 - Addressed Michael S. Tsirkin's comments:
   - I/O and Prefetchable Memory are optional. Do not allocate ranges
     if they are not implemented (2/2).
 - Note that 2/2 patch can be seen as a separate fix. However, it
   is related to ranges reservation.

v1 -> v2:
 - Thanks Gerd Hoffmann for the review.
 - Addressed Michael S. Tsirkin's comments:
   - Limit capabilities query to 256 iterations, to make sure we
     don't get into an infinite loop with a broken device.

If a pci-2-pci bridge supports hot-plug functionality but there are no devices
connected to it, reserve IO/mem in order to be able to attach devices
later. Do not waste space, use minimum allowed.

Marcel Apfelbaum (2):
  hw/pci: reserve IO and mem for pci-2-pci bridges with no devices
    attached
  hw/pci: check if pci2pci bridges implement optional limit registers

src/fw/pciinit.c | 12 +++++-------
 src/hw/pci.c     | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 src/hw/pci.h     | 10 ++++++++++
 3 files changed, 68 insertions(+), 7 deletions(-)

[Qemu-devel] [PATCH V4 1/2] hw/pci: reserve IO and mem for pci-2-pci bridges with no devices attached

[Marcel Apfelbaum]

If a pci-2-pci bridge supports hot-plug functionality but there are no devices
connected to it, reserve IO/mem in order to be able to attach devices
later. Do not waste space, use minimum allowed.

Reviewed-by: Michael S. Tsirkin 
Signed-off-by: Marcel Apfelbaum 
---
 src/fw/pciinit.c |  3 +++
 src/hw/pci.c     | 19 +++++++++++++++++++
 src/hw/pci.h     |  1 +
 3 files changed, 23 insertions(+)

diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
index 64f1d41..9b5d7ad 100644
--- a/src/fw/pciinit.c
+++ b/src/fw/pciinit.c
@@ -677,12 +677,15 @@ static int pci_bios_check_devices(struct pci_bus *busses)
             continue;
         struct pci_bus *parent = &busses[pci_bdf_to_bus(s->bus_dev->bdf)];
         int type;
+        u8 shpc_cap = pci_find_capability(s->bus_dev, PCI_CAP_ID_SHPC);
         for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) {
             u64 align = (type == PCI_REGION_TYPE_IO) ?
                 PCI_BRIDGE_IO_MIN : PCI_BRIDGE_MEM_MIN;
             if (pci_region_align(&s->r[type]) > align)
                  align = pci_region_align(&s->r[type]);
             u64 sum = pci_region_sum(&s->r[type]);
+            if (!sum && shpc_cap)
+                sum = align; /* reserve min size for hot-plug */
             u64 size = ALIGN(sum, align);
             int is64 = pci_bios_bridge_region_is64(&s->r[type],
                                             s->bus_dev, type);
diff --git a/src/hw/pci.c b/src/hw/pci.c
index caf9265..77cdba2 100644
--- a/src/hw/pci.c
+++ b/src/hw/pci.c
@@ -225,6 +225,25 @@ pci_find_init_device(const struct pci_device_id *ids, void *arg)
     return NULL;
 }

+u8 pci_find_capability(struct pci_device *pci, u8 cap_id)
+{
+    int i;
+    u8 cap;
+    u16 status = pci_config_readw(pci->bdf, PCI_STATUS);
+
+    if (!(status & PCI_STATUS_CAP_LIST))
+        return 0;
+
+    cap = pci_config_readb(pci->bdf, PCI_CAPABILITY_LIST);
+    for (i = 0; cap && i <= 0xff; i++) {
+        if (pci_config_readb(pci->bdf, cap + PCI_CAP_LIST_ID) == cap_id)
+            return cap;
+        cap = pci_config_readb(pci->bdf, cap + PCI_CAP_LIST_NEXT);
+    }
+
+    return 0;
+}
+
 void
 pci_reboot(void)
 {
diff --git a/src/hw/pci.h b/src/hw/pci.h
index 167a027..e828225 100644
--- a/src/hw/pci.h
+++ b/src/hw/pci.h
@@ -116,6 +116,7 @@ int pci_init_device(const struct pci_device_id *ids
                     , struct pci_device *pci, void *arg);
 struct pci_device *pci_find_init_device(const struct pci_device_id *ids
                                         , void *arg);
+u8 pci_find_capability(struct pci_device *pci, u8 cap_id);
 void pci_reboot(void);

#endif

[Qemu-devel] [PATCH V4 2/2] hw/pci: check if pci2pci bridges implement optional limit registers

[Marcel Apfelbaum]

<I/O Base Register, I/O Limit Register> pair and
<Prefetchable Memory Base Register, Prefetchable Memory Limit Register> pair
are both optional.
Do not reserve ranges if the above registers are not implemented.

Signed-off-by: Marcel Apfelbaum 
---
 src/fw/pciinit.c |  9 ++-------
 src/hw/pci.c     | 34 ++++++++++++++++++++++++++++++++++
 src/hw/pci.h     |  9 +++++++++
 3 files changed, 45 insertions(+), 7 deletions(-)

diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
index 9b5d7ad..bbaecd6 100644
--- a/src/fw/pciinit.c
+++ b/src/fw/pciinit.c
@@ -26,13 +26,6 @@
 #define PCI_BRIDGE_MEM_MIN    (1<<21)  // 2M == hugepage size
 #define PCI_BRIDGE_IO_MIN      0x1000  // mandated by pci bridge spec

-enum pci_region_type {
-    PCI_REGION_TYPE_IO,
-    PCI_REGION_TYPE_MEM,
-    PCI_REGION_TYPE_PREFMEM,
-    PCI_REGION_TYPE_COUNT,
-};
-
 static const char *region_type_name[] = {
     [ PCI_REGION_TYPE_IO ]      = "io",
     [ PCI_REGION_TYPE_MEM ]     = "mem",
@@ -681,6 +674,8 @@ static int pci_bios_check_devices(struct pci_bus *busses)
         for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) {
             u64 align = (type == PCI_REGION_TYPE_IO) ?
                 PCI_BRIDGE_IO_MIN : PCI_BRIDGE_MEM_MIN;
+            if (!pci_bridge_has_region(s->bus_dev, type))
+                continue;
             if (pci_region_align(&s->r[type]) > align)
                  align = pci_region_align(&s->r[type]);
             u64 sum = pci_region_sum(&s->r[type]);
diff --git a/src/hw/pci.c b/src/hw/pci.c
index 77cdba2..d5979af 100644
--- a/src/hw/pci.c
+++ b/src/hw/pci.c
@@ -244,6 +244,40 @@ u8 pci_find_capability(struct pci_device *pci, u8 cap_id)
     return 0;
 }

+static int pci_config_is_reserved(struct pci_device *pci, u32 addr)
+{
+    u8 val;
+
+    val = pci_config_readb(pci->bdf, addr);
+    pci_config_writeb(pci->bdf, addr, 0xFF);
+
+    if (!(pci_config_readb(pci->bdf, addr)))
+        return 1;
+
+    pci_config_writeb(pci->bdf, addr, val);
+    return 0;
+}
+
+int pci_bridge_has_region(struct pci_device *pci,
+                          enum pci_region_type region_type)
+{
+    u8 base;
+
+    switch (region_type) {
+    case PCI_REGION_TYPE_IO:
+        base = PCI_IO_BASE;
+        break;
+    case PCI_REGION_TYPE_PREFMEM:
+        base = PCI_PREF_MEMORY_BASE;
+        break;
+    default:
+        /* Regular memory support is mandatory */
+        return 1;
+    }
+
+    return !pci_config_is_reserved(pci, base);
+}
+
 void
 pci_reboot(void)
 {
diff --git a/src/hw/pci.h b/src/hw/pci.h
index e828225..0aaa84c 100644
--- a/src/hw/pci.h
+++ b/src/hw/pci.h
@@ -12,6 +12,13 @@
 #define PCI_NUM_REGIONS 7
 #define PCI_BRIDGE_NUM_REGIONS 2

+enum pci_region_type {
+    PCI_REGION_TYPE_IO,
+    PCI_REGION_TYPE_MEM,
+    PCI_REGION_TYPE_PREFMEM,
+    PCI_REGION_TYPE_COUNT,
+};
+
 static inline u8 pci_bdf_to_bus(u16 bdf) {
     return bdf >> 8;
 }
@@ -117,6 +124,8 @@ int pci_init_device(const struct pci_device_id *ids
 struct pci_device *pci_find_init_device(const struct pci_device_id *ids
                                         , void *arg);
 u8 pci_find_capability(struct pci_device *pci, u8 cap_id);
+int pci_bridge_has_region(struct pci_device *pci,
+                          enum pci_region_type region_type);
 void pci_reboot(void);

#endif

[PATCH V4 2/2] hw/pci: check if pci2pci bridges implement optional limit registers

[Michael S. Tsirkin]

On Thu, Apr 10, 2014 at 08:44:18PM +0300, Marcel Apfelbaum wrote:
> <I/O Base Register, I/O Limit Register> pair and
> <Prefetchable Memory Base Register, Prefetchable Memory Limit Register> pair
> are both optional.
> Do not reserve ranges if the above registers are not implemented.
> Signed-off-by: Marcel Apfelbaum
>
> src/fw/pciinit.c |  9 ++-------
>  src/hw/pci.c     | 34 ++++++++++++++++++++++++++++++++++
>  src/hw/pci.h     |  9 +++++++++
>  3 files changed, 45 insertions(+), 7 deletions(-)
>
> diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
> index 9b5d7ad..bbaecd6 100644
> --- a/src/fw/pciinit.c
> +++ b/src/fw/pciinit.c
> @@ -26,13 +26,6 @@
>  #define PCI_BRIDGE_MEM_MIN    (1<<21)  // 2M == hugepage size
>  #define PCI_BRIDGE_IO_MIN      0x1000  // mandated by pci bridge spec
>
> -enum pci_region_type {
> PCI_REGION_TYPE_IO,
> PCI_REGION_TYPE_MEM,
> PCI_REGION_TYPE_PREFMEM,
> PCI_REGION_TYPE_COUNT,
>
> -};
>
> static const char *region_type_name[] = {
>      [ PCI_REGION_TYPE_IO ]      = "io",
>      [ PCI_REGION_TYPE_MEM ]     = "mem",
> @@ -681,6 +674,8 @@ static int pci_bios_check_devices(struct pci_bus *busses)
>          for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) {
>              u64 align = (type == PCI_REGION_TYPE_IO) ?
>                  PCI_BRIDGE_IO_MIN : PCI_BRIDGE_MEM_MIN;
>        if (!pci_bridge_has_region(s->bus_dev, type))
>            continue;
>        if (pci_region_align(&s->r[type]) > align)
>             align = pci_region_align(&s->r[type]);
>        u64 sum = pci_region_sum(&s->r[type]);
>
> diff --git a/src/hw/pci.c b/src/hw/pci.c
> index 77cdba2..d5979af 100644
> --- a/src/hw/pci.c
> +++ b/src/hw/pci.c
> @@ -244,6 +244,40 @@ u8 pci_find_capability(struct pci_device *pci, u8 cap_id)
>      return 0;
>  }
>
> +static int pci_config_is_reserved(struct pci_device *pci, u32 addr)

Why u32? It's u8 isn't it?
> +{
> u8 val;
> val = pci_config_readb(pci->bdf, addr);
> pci_config_writeb(pci->bdf, addr, 0xFF);
> if (!(pci_config_readb(pci->bdf, addr)))

() not needed after !
>    return 1;
> pci_config_writeb(pci->bdf, addr, val);
> return 0;
>
> +}

Above read simply saves the register value, write now restores it.
It really should have a comment explaning what each stage does.

But I don't see why we still waste cycles on this save/restore
dance. This is simply the result of making the API too generic.
Open-code it below, and add a comment:

/* Test whether bridge support forwarding of transactions
 * of a specific type.
 * Note: disables bridge's window registers as a side effect.
 */
int pci_bridge_has_region(struct pci_device *pci,
                          enum pci_region_type region_type)
{
    u8 base;

switch (region_type) {
    case PCI_REGION_TYPE_IO:
        base = PCI_IO_BASE;
        break;
    case PCI_REGION_TYPE_PREFMEM:
        base = PCI_PREF_MEMORY_BASE;
        break;
    default:
        /* Regular memory support is mandatory */
        return 1;
    }

pci_config_writeb(pci->bdf, addr, 0xFF);

return pci_config_readb(pci->bdf, addr) != 0;
}
> void
>  pci_reboot(void)
>  {
> diff --git a/src/hw/pci.h b/src/hw/pci.h
> index e828225..0aaa84c 100644
> --- a/src/hw/pci.h
> +++ b/src/hw/pci.h
> @@ -12,6 +12,13 @@
>  #define PCI_NUM_REGIONS 7
>  #define PCI_BRIDGE_NUM_REGIONS 2
>
> +enum pci_region_type {
> PCI_REGION_TYPE_IO,
> PCI_REGION_TYPE_MEM,
> PCI_REGION_TYPE_PREFMEM,
> PCI_REGION_TYPE_COUNT,
>
> +};
>
> static inline u8 pci_bdf_to_bus(u16 bdf) {
>      return bdf >> 8;
>  }
> @@ -117,6 +124,8 @@ int pci_init_device(const struct pci_device_id *ids
>  struct pci_device *pci_find_init_device(const struct pci_device_id *ids
>                                          , void *arg);
>  u8 pci_find_capability(struct pci_device *pci, u8 cap_id);
> +int pci_bridge_has_region(struct pci_device *pci,
>                      enum pci_region_type region_type);
>
> void pci_reboot(void);
> #endif
>
> 1.8.3.1

[PATCH V4 2/2] hw/pci: check if pci2pci bridges implement optional limit registers

[Michael S. Tsirkin]

On Thu, Apr 10, 2014 at 09:07:00PM +0300, Michael S. Tsirkin wrote:
> On Thu, Apr 10, 2014 at 08:44:18PM +0300, Marcel Apfelbaum wrote:
> > <I/O Base Register, I/O Limit Register> pair and
> > <Prefetchable Memory Base Register, Prefetchable Memory Limit Register> pair
> > are both optional.
> > Do not reserve ranges if the above registers are not implemented.
> > Signed-off-by: Marcel Apfelbaum
> >
> > src/fw/pciinit.c |  9 ++-------
> >  src/hw/pci.c     | 34 ++++++++++++++++++++++++++++++++++
> >  src/hw/pci.h     |  9 +++++++++
> >  3 files changed, 45 insertions(+), 7 deletions(-)
> >
> > diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
> > index 9b5d7ad..bbaecd6 100644
> > --- a/src/fw/pciinit.c
> > +++ b/src/fw/pciinit.c
> > @@ -26,13 +26,6 @@
> >  #define PCI_BRIDGE_MEM_MIN    (1<<21)  // 2M == hugepage size
> >  #define PCI_BRIDGE_IO_MIN      0x1000  // mandated by pci bridge spec
> >
> > -enum pci_region_type {
> > PCI_REGION_TYPE_IO,
> > PCI_REGION_TYPE_MEM,
> > PCI_REGION_TYPE_PREFMEM,
> > PCI_REGION_TYPE_COUNT,
> >
> > -};
> >
> > static const char *region_type_name[] = {
> >      [ PCI_REGION_TYPE_IO ]      = "io",
> >      [ PCI_REGION_TYPE_MEM ]     = "mem",
> > @@ -681,6 +674,8 @@ static int pci_bios_check_devices(struct pci_bus *busses)
> >          for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) {
> >              u64 align = (type == PCI_REGION_TYPE_IO) ?
> >                  PCI_BRIDGE_IO_MIN : PCI_BRIDGE_MEM_MIN;
> >        if (!pci_bridge_has_region(s->bus_dev, type))
> >            continue;
> >        if (pci_region_align(&s->r[type]) > align)
> >             align = pci_region_align(&s->r[type]);
> >        u64 sum = pci_region_sum(&s->r[type]);
> >
> > diff --git a/src/hw/pci.c b/src/hw/pci.c
> > index 77cdba2..d5979af 100644
> > --- a/src/hw/pci.c
> > +++ b/src/hw/pci.c
> > @@ -244,6 +244,40 @@ u8 pci_find_capability(struct pci_device *pci, u8 cap_id)
> >      return 0;
> >  }
> >
> > +static int pci_config_is_reserved(struct pci_device *pci, u32 addr)
>
> Why u32? It's u8 isn't it?
> > +{
> > u8 val;
> > val = pci_config_readb(pci->bdf, addr);
> > pci_config_writeb(pci->bdf, addr, 0xFF);
> > if (!(pci_config_readb(pci->bdf, addr)))
>
> () not needed after !
> >    return 1;
> > pci_config_writeb(pci->bdf, addr, val);
> > return 0;
> >
> > +}
>
> Above read simply saves the register value, write now restores it.
> It really should have a comment explaning what each stage does.
>
> But I don't see why we still waste cycles on this save/restore
> dance. This is simply the result of making the API too generic.
> Open-code it below, and add a comment:
>
> /* Test whether bridge support forwarding of transactions
> of a specific type.
> Note: disables bridge's window registers as a side effect.
>
> */
> int pci_bridge_has_region(struct pci_device *pci,
>                           enum pci_region_type region_type)
> {
>     u8 base;
> switch (region_type) {
> case PCI_REGION_TYPE_IO:
>     base = PCI_IO_BASE;
>     break;
> case PCI_REGION_TYPE_PREFMEM:
>     base = PCI_PREF_MEMORY_BASE;
>     break;
> default:
>     /* Regular memory support is mandatory */
>     return 1;
> }
>
> pci_config_writeb(pci->bdf, addr, 0xFF);
>
> return pci_config_readb(pci->bdf, addr) != 0;
>
> }
> > void
> >  pci_reboot(void)
> >  {
> > diff --git a/src/hw/pci.h b/src/hw/pci.h
> > index e828225..0aaa84c 100644
> > --- a/src/hw/pci.h
> > +++ b/src/hw/pci.h
> > @@ -12,6 +12,13 @@
> >  #define PCI_NUM_REGIONS 7
> >  #define PCI_BRIDGE_NUM_REGIONS 2
> >
> > +enum pci_region_type {
> > PCI_REGION_TYPE_IO,
> > PCI_REGION_TYPE_MEM,
> > PCI_REGION_TYPE_PREFMEM,
> > PCI_REGION_TYPE_COUNT,
> >
> > +};
> >
> > static inline u8 pci_bdf_to_bus(u16 bdf) {
> >      return bdf >> 8;
> >  }
> > @@ -117,6 +124,8 @@ int pci_init_device(const struct pci_device_id *ids
> >  struct pci_device *pci_find_init_device(const struct pci_device_id *ids
> >                                          , void *arg);
> >  u8 pci_find_capability(struct pci_device *pci, u8 cap_id);
> > +int pci_bridge_has_region(struct pci_device *pci,
> >                      enum pci_region_type region_type);
> >
> > void pci_reboot(void);
> > #endif
> >
> > 1.8.3.1

And of course these are all nitpicks, would be better to fix
but the patch is otherwise correct.