Thanks a lot for your mail,
On Wed, Feb 16, 2011 at 3:33 PM, Gerd Hoffmann <kraxel(a)redhat.com> wrote:
The current PCI memory space is limited to 236MB.
It would be good to
increase it to at-least 512MB. KVM supports for device assignment to
the VM. For most of the PCI devices the 236MB memory might be enough,
but when you pass-through a graphics device, this memory is very
I don't know if the PCI memory space can be dynamically expanded, but
it would be good to increase the PCI memory space to 512MB at-least.
There is one problem with that: The bochs bios vesa interface expects the
linear framebuffer for the graphics card at the magic address 0xe0000000,
size 8 (qemu) or 16 (qemu-kvm) megabytes. So the area from 0xe0000000 ->
0xe1000000 might be in use even though this isn't noted anythere.
In the upcoming 0.14 qemu release this has been fixed finally, the vgabios
looks up the framebuffer address in pci config space instead of using the
hard-coded 0xe0000000 address, and by default the mapping isn't present any
more. When starting qemu 0.14 with '-M pc-$olderversion' the mapping is
still there for live migration compatibility reasons though.
Also for large virtual machines qemu maps 3.5 MB (0 -> 0xe0000000) to low
memory. This is visible in the e820 map though so it can easily be checked
for by seabios. Changing the way qemu maps memory (to free up some address
space) will break live migration too, so this can't be done easily.
Bottom line: Extending the pci memory space to start at 0xe1000000 (giving a
little less than 512MB) should be doable without major trouble (from qemu
point of view). Giving more address space to PCI will be tricky.
Yes l know this is going to be complicated, when I mailed last time
"Isaku Yamahata" mentioned about the complications.
I am neither expert in QEMU nor in SeaBIOS. I just wanted to mention
the problem I am facing. I think, extending the pci memory space to
start from 0xe1000000, will also help. Atleast some of the GPU devices
can still be pass-through to with this increased PCI memory space.
There is one related problem that "Isaku Yamahata" mentioned. SeaBIOS
is allocates memory BARs as it discovers a device, if the memory
regions can be sorted according to the size (high to low), we can
better use the available PCI memory space. This will need two PCI
passes first to discover the size and sort PCI regions according to
size and second for actual BAR registration.
If this feature is worth adding and imposes no new problems, I can work on this.
Thanks and Regards,