On Sun, Feb 25, 2018 at 10:38:09PM +0200, Nikolay Nikolov wrote:
This ensures that we safely receive the IRQ even if the floppy controller manages to be faster than our code and sends the IRQ before our code enters floppy_wait_irq(). Although unlikely, this is possible to happen on emulators (which emulate floppy operations extremely fast) as well as real hardware (during reset).
This doesn't look correct to me. The SeaBIOS C code always runs with interrupts disabled. The FRS_IRQ flag is only set from the handle_0e() hardware interrupt handler. So, I don't think there is a race condition with the clearing and checking of that flag.
-Kevin