This allows the device to work properly with an emulated IOMMU.
Signed-off-by: Eduard - Gabriel Munteanu eduard.munteanu@linux360.ro --- hw/usb-uhci.c | 26 ++++++++++++++------------ 1 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c index b9b822f..01b7f8b 100644 --- a/hw/usb-uhci.c +++ b/hw/usb-uhci.c @@ -705,7 +705,7 @@ static int uhci_complete_td(UHCIState *s, UHCI_TD *td, UHCIAsync *async, uint32_
if (len > 0) { /* write the data back */ - cpu_physical_memory_write(td->buffer, async->buffer, len); + dma_memory_write(&s->dev.dma, td->buffer, async->buffer, len); }
if ((td->ctrl & TD_CTRL_SPD) && len < max_len) { @@ -823,7 +823,7 @@ static int uhci_handle_td(UHCIState *s, uint32_t addr, UHCI_TD *td, uint32_t *in switch(pid) { case USB_TOKEN_OUT: case USB_TOKEN_SETUP: - cpu_physical_memory_read(td->buffer, async->buffer, max_len); + dma_memory_read(&s->dev.dma, td->buffer, async->buffer, max_len); len = uhci_broadcast_packet(s, &async->packet); if (len >= 0) len = max_len; @@ -866,7 +866,7 @@ static void uhci_async_complete(USBPacket *packet, void *opaque) uint32_t link = async->td; uint32_t int_mask = 0, val;
- cpu_physical_memory_read(link & ~0xf, (uint8_t *) &td, sizeof(td)); + dma_memory_read(&s->dev.dma, link & ~0xf, (uint8_t *) &td, sizeof(td)); le32_to_cpus(&td.link); le32_to_cpus(&td.ctrl); le32_to_cpus(&td.token); @@ -878,8 +878,8 @@ static void uhci_async_complete(USBPacket *packet, void *opaque)
/* update the status bits of the TD */ val = cpu_to_le32(td.ctrl); - cpu_physical_memory_write((link & ~0xf) + 4, - (const uint8_t *)&val, sizeof(val)); + dma_memory_write(&s->dev.dma, (link & ~0xf) + 4, + (const uint8_t *)&val, sizeof(val)); uhci_async_free(s, async); } else { async->done = 1; @@ -942,7 +942,7 @@ static void uhci_process_frame(UHCIState *s)
DPRINTF("uhci: processing frame %d addr 0x%x\n" , s->frnum, frame_addr);
- cpu_physical_memory_read(frame_addr, (uint8_t *)&link, 4); + dma_memory_read(&s->dev.dma, frame_addr, (uint8_t *)&link, 4); le32_to_cpus(&link);
int_mask = 0; @@ -966,7 +966,8 @@ static void uhci_process_frame(UHCIState *s) break; }
- cpu_physical_memory_read(link & ~0xf, (uint8_t *) &qh, sizeof(qh)); + dma_memory_read(&s->dev.dma, + link & ~0xf, (uint8_t *) &qh, sizeof(qh)); le32_to_cpus(&qh.link); le32_to_cpus(&qh.el_link);
@@ -986,7 +987,8 @@ static void uhci_process_frame(UHCIState *s) }
/* TD */ - cpu_physical_memory_read(link & ~0xf, (uint8_t *) &td, sizeof(td)); + dma_memory_read(&s->dev.dma, + link & ~0xf, (uint8_t *) &td, sizeof(td)); le32_to_cpus(&td.link); le32_to_cpus(&td.ctrl); le32_to_cpus(&td.token); @@ -1000,8 +1002,8 @@ static void uhci_process_frame(UHCIState *s) if (old_td_ctrl != td.ctrl) { /* update the status bits of the TD */ val = cpu_to_le32(td.ctrl); - cpu_physical_memory_write((link & ~0xf) + 4, - (const uint8_t *)&val, sizeof(val)); + dma_memory_write(&s->dev.dma, (link & ~0xf) + 4, + (const uint8_t *)&val, sizeof(val)); }
if (ret < 0) { @@ -1029,8 +1031,8 @@ static void uhci_process_frame(UHCIState *s) /* update QH element link */ qh.el_link = link; val = cpu_to_le32(qh.el_link); - cpu_physical_memory_write((curr_qh & ~0xf) + 4, - (const uint8_t *)&val, sizeof(val)); + dma_memory_write(&s->dev.dma, (curr_qh & ~0xf) + 4, + (const uint8_t *)&val, sizeof(val));
if (!depth_first(link)) { /* done with this QH */