On PCI init PCI bridge devices may need some extra info about bus number to reserve, IO, memory and prefetchable memory limits. QEMU can provide this with special vendor-specific PCI capability.
This capability is intended to be used only for Red Hat PCI bridges, i.e. QEMU cooperation.
Sizes of limits match ones from PCI Type 1 Configuration Space Header, number of buses to reserve occupies only 1 byte since it is the size of Subordinate Bus Number register.
Signed-off-by: Aleksandr Bezzubikov zuban32s@gmail.com --- src/hw/pci_cap.h | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 src/hw/pci_cap.h
diff --git a/src/hw/pci_cap.h b/src/hw/pci_cap.h new file mode 100644 index 0000000..1382b0b --- /dev/null +++ b/src/hw/pci_cap.h @@ -0,0 +1,23 @@ +#ifndef _PCI_CAP_H +#define _PCI_CAP_H + +#include "types.h" + +struct vendor_pci_cap { + u8 id; + u8 next; + u8 len; +}; + +struct redhat_pci_bridge_cap { + struct vendor_pci_cap hdr; + u8 bus_res; + u32 pref_lim_upper; + u16 pref_lim; + u16 mem_lim; + u16 io_lim_upper; + u8 io_lim; + u8 padd; +}; + +#endif /* _PCI_CAP_H */