As a result, we can't use the hard coded IO port 0x3f8 in SeaBIOS for debugging. Instead, we need read the port base address from the pci uart's BAR, either an IO BAR, or a 32bit memory BAR.
Ok, but ...
depends on DEBUG_SERIAL_PCI_IO || DEBUG_SERIAL_PCI_MEM32
hex "Serial port PCI bus/device/function"
... hardcoding the BDF instead isn't that great either. Can't we just find the device while scanning for pci devices?
There might be multiple pci uart devices.
Which I doubt is actually the case. My guess would be you have a virtual serial device emulated by ME or something similar for serial-over-lan console access. And there is exactly one of these per machine.
So hardcoding the BDF seems to be a only solution.
Why? Just use the first device you find by default. Offering the option to specify the preferred device in case multiple devices exist is fine, but I doubt this is needed.
Actually this solution is similar to the port based uart( hard coding the port) and mmio based uart(hard coding the mmio address). Here we hard code the pci BDF.
Well, there is no way to reliable discover classic ioport uarts which are located behind a isa/lpc bridge, so we have to hardcode the port. There is no other option.
PCI devices are discoverable, so we can do better than hardcoding the bdf. And given that seabios scans the pci bus anyway I think we should do that. This also allows to specify the preferred device by other means than the bdf, you could use the PCI ID instead for example.