* Kevin O'Connor (kevin@koconnor.net) wrote:
On Wed, Feb 15, 2017 at 11:07:05AM +0000, Dr. David Alan Gilbert wrote:
In the principal of removing our quirks, the following seems to work for me, Kevin, do you agree it's the right behaviour?
I ran some quick tests with your patch and I can confirm it fixes the first problem. However, looking at the wikipedia article on old 286 mode switches: https://en.wikipedia.org/wiki/Protected_mode#Entering_and_exiting_protected_... it appears a triple fault was a common way of mode switching. I confirmed your patch would break that in SeaBIOS.
So your patch may be the "right" thing to do, but it would be a lot more work and would have higher risk. (If it is the right thing to do, seabios would then have to detect the ancient mode switch condition and then return the pam registers back to their prior state all without touching any ram (ie, no stack).)
Oh I see, hmm - yes that's a pain - the actual PAM register reset was simple enough in my patch and actually left us with a nice known state after reset.
Were you able to confirm the SeaBIOS patch I sent out earlier (see below) passes your tests?
Yes it seems to. One worry is that if we ever fix the qemu triple-fault so it really does what you're describing and only resets the CPU, then I'm not sure your int3 is the right choice.
The other question is whether that protected-mode exit switch works in practice on qemu; it's going to come back with a lot of it's devices reset.
Dave
-Kevin
--- a/src/fw/shadow.c +++ b/src/fw/shadow.c @@ -187,4 +187,8 @@ qemu_prep_reset(void) memcpy(hrp + 4, hrp + 4 + BIOS_SRC_OFFSET, cend - (hrp + 4)); barrier(); HaveRunPost = 0;
- barrier();
- // Force QEMU reboot
- asm volatile("int3");
}
-- Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK