Do I do that in addition to, or instead of, my patch?
1) Replace my patch with your change
or
2) Add your change on top of my change
I'm guessing it's #1, but please confirm and I'll have that tested.
On 05/05/2025 09:46, Gerd Hoffmann via SeaBIOS wrote:
On Sat, May 03, 2025 at 03:50:22PM +0100, Leah Rowe via SeaBIOS wrote:
Hello SeaBIOS community,
Please look at the patch I've attached to this email. It fixes a regression recently introduced in SeaBIOS, introduced by SeaBIOS git commit ID 8863cbbd. I request that this patch by merged, and I will now explain why.
A recent SeaBIOS patch (commit 8863cbbd) adds AHCI controller reset prior to enablement, as a way to make SeaBIOS's AHCI driver work correctly on CSM-based setups.
However, that commit (commit 8863cbbd) broke AHCI initialisation on the Lenovo ThinkPad T420 when testing SeaBIOS as a coreboot payload. It caused an AHCI timeout. I tried to include these logs on the mailing list but it came back telling me my message was too big.
Hmm, maybe we should better carry over the old control bits over the reset. Does this work for you (and if so, what does the added printk print) ?
pci_enable_busmaster(pci);
- u32 val = ahci_ctrl_readl(ctrl, HOST_CTL);
- dprintf(1, "AHCI host ctl 0x%x\n", val); ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_RESET);
- ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_AHCI_EN);
ahci_ctrl_writel(ctrl, HOST_CTL, val | HOST_CTL_AHCI_EN);
ctrl->caps = ahci_ctrl_readl(ctrl, HOST_CAP); ctrl->ports = ahci_ctrl_readl(ctrl, HOST_PORTS_IMPL);
If that does not help I'd rather try to do the controller reset on qemu only where we know it works.
take care, Gerd
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