[SeaBIOS] [PATCH 2/4] smp: refactor present CPU APIC ID detection and counting

[Igor Mammedov]

From: Kevin O'Connor

Signed-off-by: "Kevin O'Connor" 
Signed-off-by: Igor Mammedov 
---
 src/fw/smp.c | 31 ++++++++++++++++++-------------
 1 file changed, 18 insertions(+), 13 deletions(-)

diff --git a/src/fw/smp.c b/src/fw/smp.c
index 579acdb..ad98a5f 100644
--- a/src/fw/smp.c
+++ b/src/fw/smp.c
@@ -46,27 +46,34 @@ int apic_id_is_present(u8 apic_id)
     return !!(FoundAPICIDs[apic_id/32] & (1ul << (apic_id % 32)));
 }

+static int
+count_cpu(void)
+{
+    CountCPUs++;
+
+    // Track found apic id for use in legacy internal bios tables
+    u32 eax, ebx, ecx, cpuid_features;
+    cpuid(1, &eax, &ebx, &ecx, &cpuid_features);
+    u8 apic_id = ebx>>24;
+    FoundAPICIDs[apic_id/32] |= 1 << (apic_id % 32);
+
+    return apic_id;
+}
+
 void VISIBLE32FLAT
 handle_smp(void)
 {
     if (!CONFIG_QEMU)
         return;

-    // Detect apic_id
-    u32 eax, ebx, ecx, cpuid_features;
-    cpuid(1, &eax, &ebx, &ecx, &cpuid_features);
-    u8 apic_id = ebx>>24;
+    // Track this CPU and detect the apic_id
+    int apic_id = count_cpu();
     dprintf(DEBUG_HDL_smp, "handle_smp: apic_id=%d\n", apic_id);

// MTRR setup
     int i;
     for (i=0; i<smp_mtrr_count; i++)
         wrmsr(smp_mtrr[i].index, smp_mtrr[i].val);
-
-    // Set bit on FoundAPICIDs
-    FoundAPICIDs[apic_id/32] |= (1 << (apic_id % 32));
-
-    CountCPUs++;
 }

// Atomic lock for shared stack across processors.
@@ -91,10 +98,8 @@ smp_setup(void)
         return;
     }

-    // mark the BSP initial APIC ID as found, too:
-    u8 apic_id = ebx>>24;
-    FoundAPICIDs[apic_id/32] |= (1 << (apic_id % 32));
-    CountCPUs = 1;
+    // Detect initial boot cpu
+    count_cpu();

// Setup jump trampoline to counter code.
     u64 old = *(u64*)BUILD_AP_BOOT_ADDR;