On 07/31/17 20:55, Michael S. Tsirkin wrote:
On Mon, Jul 31, 2017 at 08:16:49PM +0200, Laszlo Ersek wrote:
OK. If the proposed solution with the r/o mem base/limit registers is rooted in the spec (and I think it indeed must be; apparently this would be the same as what we're already planning for IO disablement), then that's a strong argument for PciBusDxe to accommodate this probing in the platform hook.
Thanks Laszlo
Do you mean making base/limit read-only?
Yes, I do. (Perhaps writing "r/o" was too terse.)
Thanks Laszlo