On Sat, Mar 17, 2018 at 09:49:11PM -0400, Jean Lucas wrote:
This enables the keyboard on some Chromebooks after a hard reset.
Tested on an Acer C720 and a Dell Inspiron 660s.
Signed-off-by: Jean Lucas jean@4ray.co
src/hw/ps2port.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/hw/ps2port.c b/src/hw/ps2port.c index 88b1059..ac409de 100644 --- a/src/hw/ps2port.c +++ b/src/hw/ps2port.c @@ -475,6 +475,11 @@ ps2_keyboard_setup(void *data) return; }
- // Keyboard write command
- ret = i8042_command(I8042_CMD_CTL_WCTR, NULL);
- if (ret)
return;
Thanks, but this doesn't look right - the I8042_CMD_CTL_WCTR command should always takes a parameter. By passing NULL as the parameter, the code will read the first byte from address 0 (which is I suspect going to be 0x53). It's also unclear to me why this would help as the first ps2_kbd_command() call will explicitly set the ps2 port CTR bits.
// Controller keyboard test. ret = i8042_command(I8042_CMD_KBD_TEST, param); if (ret)
@@ -505,11 +510,6 @@ ps2_keyboard_setup(void *data) return; }
- /* Disable keyboard */
- ret = ps2_kbd_command(ATKBD_CMD_RESET_DIS, NULL);
- if (ret)
return;
Removing this code would cause it to not reset the keyboard. I don't think that's right.
If you're having a keyboard failure on reboot, could you flash an unmodified version of SeaBIOS (with debug level set to 7) and provide the log (via cbmem)?
-Kevin