Re: [SeaBIOS] [PATCH v2 3/3] pci: recognize RH PCI legacy bridge resource

[Zihan Yang]

> Enable the firmware recognizing RedHat legacy PCI bridge device ID,
> so QEMU can reserve additional PCI bridge resource capability.
> Signed-off-by: Jing Liu
>
> src/fw/pciinit.c | 50 +++++++++++++++++++++++++++++---------------------
>  src/hw/pci_ids.h |  1 +
>  2 files changed, 30 insertions(+), 21 deletions(-)
>
> diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
> index 62a32f1..795d84a 100644
> --- a/src/fw/pciinit.c
> +++ b/src/fw/pciinit.c
> @@ -525,30 +525,38 @@ static void pci_bios_init_platform(void)
>
> static u8 pci_find_resource_reserve_capability(u16 bdf)
>  {
> if (pci_config_readw(bdf, PCI_VENDOR_ID) == PCI_VENDOR_ID_REDHAT &&
>    pci_config_readw(bdf, PCI_DEVICE_ID) ==
>            PCI_DEVICE_ID_REDHAT_ROOT_PORT) {
>    u8 cap = 0;
>    do {
>        cap = pci_find_capability(bdf, PCI_CAP_ID_VNDR, cap);
>    } while (cap &&
>             pci_config_readb(bdf, cap + PCI_CAP_REDHAT_TYPE_OFFSET) !=
>                    REDHAT_CAP_RESOURCE_RESERVE);
>    if (cap) {
>        u8 cap_len = pci_config_readb(bdf, cap + PCI_CAP_FLAGS);
>        if (cap_len < RES_RESERVE_CAP_SIZE) {
>            dprintf(1, "PCI: QEMU resource reserve cap length %d is invalid\n",
>                    cap_len);
>            return 0;
>        }
>    } else {
>        dprintf(1, "PCI: QEMU resource reserve cap not found\n");
> u16 device_id;
> if (pci_config_readw(bdf, PCI_VENDOR_ID) != PCI_VENDOR_ID_REDHAT) {
>    dprintf(1, "PCI: QEMU resource reserve cap vendor ID doesn't match.\n");
>    return 0;
> }
> device_id = pci_config_readw(bdf, PCI_DEVICE_ID);
> if (device_id != PCI_DEVICE_ID_REDHAT_ROOT_PORT &&
>    device_id != PCI_DEVICE_ID_REDHAT_BRIDGE) {

I think PCI_DEVICE_ID_REDHAT_PCIE_BRIDGE shoud be added too, in case we put
a pcie_pci_bridge at the host bus.
>    dprintf(1, "PCI: QEMU resource reserve cap device ID doesn't match.\n");
>    return 0;
> }
> u8 cap = 0;
> do {
>    cap = pci_find_capability(bdf, PCI_CAP_ID_VNDR, cap);
> } while (cap &&
>         pci_config_readb(bdf, cap + PCI_CAP_REDHAT_TYPE_OFFSET) !=
>                          REDHAT_CAP_RESOURCE_RESERVE);
> if (cap) {
>    u8 cap_len = pci_config_readb(bdf, cap + PCI_CAP_FLAGS);
>    if (cap_len < RES_RESERVE_CAP_SIZE) {
>        dprintf(1, "PCI: QEMU resource reserve cap length %d is invalid\n",
>                cap_len);
>        return 0;
>    }
>    return cap;
> } else {
>    dprintf(1, "PCI: QEMU resource reserve cap VID or DID doesn't match.\n");
>    return 0;
>    dprintf(1, "PCI: QEMU resource reserve cap not found\n");
> }
> return cap;
>
> }
>
> /****************************************************************
> diff --git a/src/hw/pci_ids.h b/src/hw/pci_ids.h
> index 38fa2ca..1096461 100644
> --- a/src/hw/pci_ids.h
> +++ b/src/hw/pci_ids.h
> @@ -2265,6 +2265,7 @@
>
> #define PCI_VENDOR_ID_REDHAT           0x1b36
>  #define PCI_DEVICE_ID_REDHAT_ROOT_PORT 0x000C
> +#define PCI_DEVICE_ID_REDHAT_BRIDGE    0x0001
>
> #define PCI_VENDOR_ID_TEKRAM           0x1de1
> #define PCI_DEVICE_ID_TEKRAM_DC290     0xdc29
>
> 1.8.3.1