Re: [SeaBIOS] [Qemu-devel] [PATCH v5 for-2.3 12/28] hw/acpi: add _CRS method for extra root busses

[Michael S. Tsirkin]

Comment from [e-mail] not addressed yet I think.

On Tue, Mar 10, 2015 at 05:31:58PM +0200, Marcel Apfelbaum wrote:
> Save the IO/mem/bus numbers ranges assigned to the extra root busses
> to be removed from the root bus 0 range.
> Signed-off-by: Marcel Apfelbaum
>
> hw/i386/acpi-build.c | 152 +++++++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 152 insertions(+)
>
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 513fd6b..5a00f14 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -716,6 +716,151 @@ static Aml *build_prt(void)
>      return method;
>  }
>
> +typedef struct CrsRangeEntry {
> QLIST_ENTRY(CrsRangeEntry) entry;
> uint64_t base;
> uint64_t limit;
>
> +} CrsRangeEntry;
>
> +typedef QLIST_HEAD(CrsRangeQ, CrsRangeEntry) CrsRangeQ;
>
> +static void crs_range_insert(CrsRangeQ *list, uint64_t base, uint64_t limit)
> +{
> CrsRangeEntry *entry, *next, *e;
> if (!base) {
>    return;
> }
> e = g_malloc(sizeof(*entry));
> e->base = base;
> e->limit = limit;
> if (QLIST_EMPTY(list)) {
>    QLIST_INSERT_HEAD(list, e, entry);
> } else {
>    QLIST_FOREACH_SAFE(entry, list, entry, next) {
>        if (base < entry->base) {
>            QLIST_INSERT_BEFORE(entry, e, entry);
>            break;
>        } else if (!next) {
>            QLIST_INSERT_AFTER(entry, e, entry);
>            break;
>        }
>    }
> }
>
> +}
>
> +static void crs_range_list_free(CrsRangeQ *list)
> +{
> CrsRangeEntry *entry, *next;
> QLIST_FOREACH_SAFE(entry, list, entry, next) {
>    QLIST_REMOVE(entry, entry);
>    g_free(entry);
> }
>
> +}
>
> +static Aml *build_crs(PcPciInfo *pci, PciInfo *bus_info,
>                  CrsRangeQ *io_ranges, CrsRangeQ *mem_ranges)
>
> +{
> PciDeviceInfoList *dev_list;
> uint64_t range_base, range_limit;
> uint8_t max_bus;
> Aml *crs;
> crs = aml_resource_template();
> max_bus = bus_info->bus;
> for (dev_list = bus_info->devices; dev_list; dev_list = dev_list->next) {
>    PciMemoryRegionList *region;
>    for (region = dev_list->value->regions; region; region = region->next) {
>        range_base = region->value->address;
>        range_limit = region->value->address + region->value->size - 1;
>        if (!strcmp(region->value->type, "io")) {
>            aml_append(crs,
>                aml_word_io(aml_min_fixed, aml_max_fixed,
>                            aml_pos_decode, aml_entire_range,
>                            0,
>                            range_base,
>                            range_limit,
>                            0,
>                            range_limit - range_base + 1));
>            crs_range_insert(io_ranges, range_base, range_limit);
>        } else { /* "memory" */
>            aml_append(crs,
>                aml_dword_memory(aml_pos_decode, aml_min_fixed,
>                                 aml_max_fixed, aml_non_cacheable,
>                                 aml_ReadWrite,
>                                 0,
>                                 range_base,
>                                 range_limit,
>                                 0,
>                                 range_limit - range_base + 1));
>            crs_range_insert(mem_ranges, range_base, range_limit);
>        }
>    }
>    if (dev_list->value->has_pci_bridge) {
>        PciBridgeInfo *bridge_info = dev_list->value->pci_bridge;
>        if (bridge_info->bus.subordinate > max_bus) {
>            max_bus = bridge_info->bus.subordinate;
>        }
>        range_base = bridge_info->bus.io_range->base;
>        range_limit = bridge_info->bus.io_range->limit;
>        aml_append(crs,
>            aml_word_io(aml_min_fixed, aml_max_fixed,
>                        aml_pos_decode, aml_entire_range,
>                        0,
>                        range_base,
>                        range_limit,
>                        0,
>                        range_limit - range_base + 1));
>        crs_range_insert(io_ranges, range_base, range_limit);
>        range_base = bridge_info->bus.memory_range->base;
>        range_limit = bridge_info->bus.memory_range->limit;
>         aml_append(crs,
>            aml_dword_memory(aml_pos_decode, aml_min_fixed,
>                             aml_max_fixed, aml_non_cacheable,
>                             aml_ReadWrite,
>                             0,
>                             range_base,
>                             range_limit,
>                             0,
>                             range_limit - range_base + 1));
>        crs_range_insert(mem_ranges, range_base, range_limit);
>        range_base = bridge_info->bus.prefetchable_range->base;
>        range_limit = bridge_info->bus.prefetchable_range->limit;
>        aml_append(crs,
>            aml_dword_memory(aml_pos_decode, aml_min_fixed,
>                             aml_max_fixed, aml_non_cacheable,
>                             aml_ReadWrite,
>                             0,
>                             range_base,
>                             range_limit,
>                             0,
>                             range_limit - range_base + 1));
>        crs_range_insert(mem_ranges, range_base, range_limit);
>    }
> }
> aml_append(crs,
>    aml_word_bus_number(aml_min_fixed, aml_max_fixed, aml_pos_decode,
>                        0,
>                        bus_info->bus,
>                        max_bus,
>                        0,
>                        max_bus - bus_info->bus + 1));
> return crs;
>
> +}
>
> static void
>  build_ssdt(GArray *table_data, GArray *linker,
>             AcpiCpuInfo *cpu, AcpiPmInfo *pm, AcpiMiscInfo *misc,
> @@ -725,6 +870,8 @@ build_ssdt(GArray *table_data, GArray *linker,
>      uint32_t nr_mem = machine->ram_slots;
>      unsigned acpi_cpus = guest_info->apic_id_limit;
>      Aml *ssdt, *sb_scope, *scope, *pkg, *dev, *method, *crs, *field, *ifctx;
>
> CrsRangeQ io_ranges = QLIST_HEAD_INITIALIZER(io_ranges);
>
> CrsRangeQ mem_ranges = QLIST_HEAD_INITIALIZER(mem_ranges);
> int i;
>
> ssdt = init_aml_allocator();
>
> @@ -761,9 +908,14 @@ build_ssdt(GArray *table_data, GArray *linker,
>              aml_append(dev,
>                  aml_name_decl("_BBN", aml_int((uint8_t)bus_info->bus)));
>              aml_append(dev, build_prt());
>        crs = build_crs(pci, bus_info, &io_ranges, &mem_ranges);
>        aml_append(dev, aml_name_decl("_CRS", crs));
>        aml_append(scope, dev);
>        aml_append(ssdt, scope);
>    }
>    crs_range_list_free(&io_ranges);
>    crs_range_list_free(&mem_ranges);
>    qapi_free_PciInfoList(info_list);
> }