Signed-off-by: Kevin O'Connor kevin@koconnor.net --- vgasrc/bochsvga.c | 171 +++++++++++++++++++++++++---------------------------- vgasrc/bochsvga.h | 1 + vgasrc/clext.c | 63 ++++++++++--------- vgasrc/clext.h | 1 + vgasrc/vgahw.h | 4 + 5 files changed, 120 insertions(+), 120 deletions(-)
diff --git a/vgasrc/bochsvga.c b/vgasrc/bochsvga.c index 6652c2e..d1919ec 100644 --- a/vgasrc/bochsvga.c +++ b/vgasrc/bochsvga.c @@ -6,78 +6,74 @@ #include "biosvar.h" // SET_BDA #include "stdvga.h" // VGAREG_SEQU_ADDRESS
-static struct mode +static struct bochsvga_mode { u16 mode; - u8 memmodel; - u16 width; - u16 height; - u8 depth; + struct vgamode_s info; } bochsvga_modes[] VAR16 = { /* standard modes */ - { 0x100, MM_PACKED, 640, 400, 8 }, - { 0x101, MM_PACKED, 640, 480, 8 }, - { 0x102, MM_PLANAR, 800, 600, 4 }, - { 0x103, MM_PACKED, 800, 600, 8 }, - { 0x104, MM_PLANAR, 1024, 768, 4 }, - { 0x105, MM_PACKED, 1024, 768, 8 }, - { 0x106, MM_PLANAR, 1280, 1024, 4 }, - { 0x107, MM_PACKED, 1280, 1024, 8 }, - { 0x10D, MM_DIRECT, 320, 200, 15 }, - { 0x10E, MM_DIRECT, 320, 200, 16 }, - { 0x10F, MM_DIRECT, 320, 200, 24 }, - { 0x110, MM_DIRECT, 640, 480, 15 }, - { 0x111, MM_DIRECT, 640, 480, 16 }, - { 0x112, MM_DIRECT, 640, 480, 24 }, - { 0x113, MM_DIRECT, 800, 600, 15 }, - { 0x114, MM_DIRECT, 800, 600, 16 }, - { 0x115, MM_DIRECT, 800, 600, 24 }, - { 0x116, MM_DIRECT, 1024, 768, 15 }, - { 0x117, MM_DIRECT, 1024, 768, 16 }, - { 0x118, MM_DIRECT, 1024, 768, 24 }, - { 0x119, MM_DIRECT, 1280, 1024, 15 }, - { 0x11A, MM_DIRECT, 1280, 1024, 16 }, - { 0x11B, MM_DIRECT, 1280, 1024, 24 }, - { 0x11C, MM_PACKED, 1600, 1200, 8 }, - { 0x11D, MM_DIRECT, 1600, 1200, 15 }, - { 0x11E, MM_DIRECT, 1600, 1200, 16 }, - { 0x11F, MM_DIRECT, 1600, 1200, 24 }, + { 0x100, { MM_PACKED, 640, 400, 8 } }, + { 0x101, { MM_PACKED, 640, 480, 8 } }, + { 0x102, { MM_PLANAR, 800, 600, 4 } }, + { 0x103, { MM_PACKED, 800, 600, 8 } }, + { 0x104, { MM_PLANAR, 1024, 768, 4 } }, + { 0x105, { MM_PACKED, 1024, 768, 8 } }, + { 0x106, { MM_PLANAR, 1280, 1024, 4 } }, + { 0x107, { MM_PACKED, 1280, 1024, 8 } }, + { 0x10D, { MM_DIRECT, 320, 200, 15 } }, + { 0x10E, { MM_DIRECT, 320, 200, 16 } }, + { 0x10F, { MM_DIRECT, 320, 200, 24 } }, + { 0x110, { MM_DIRECT, 640, 480, 15 } }, + { 0x111, { MM_DIRECT, 640, 480, 16 } }, + { 0x112, { MM_DIRECT, 640, 480, 24 } }, + { 0x113, { MM_DIRECT, 800, 600, 15 } }, + { 0x114, { MM_DIRECT, 800, 600, 16 } }, + { 0x115, { MM_DIRECT, 800, 600, 24 } }, + { 0x116, { MM_DIRECT, 1024, 768, 15 } }, + { 0x117, { MM_DIRECT, 1024, 768, 16 } }, + { 0x118, { MM_DIRECT, 1024, 768, 24 } }, + { 0x119, { MM_DIRECT, 1280, 1024, 15 } }, + { 0x11A, { MM_DIRECT, 1280, 1024, 16 } }, + { 0x11B, { MM_DIRECT, 1280, 1024, 24 } }, + { 0x11C, { MM_PACKED, 1600, 1200, 8 } }, + { 0x11D, { MM_DIRECT, 1600, 1200, 15 } }, + { 0x11E, { MM_DIRECT, 1600, 1200, 16 } }, + { 0x11F, { MM_DIRECT, 1600, 1200, 24 } }, /* BOCHS modes */ - { 0x140, MM_DIRECT, 320, 200, 32 }, - { 0x141, MM_DIRECT, 640, 400, 32 }, - { 0x142, MM_DIRECT, 640, 480, 32 }, - { 0x143, MM_DIRECT, 800, 600, 32 }, - { 0x144, MM_DIRECT, 1024, 768, 32 }, - { 0x145, MM_DIRECT, 1280, 1024, 32 }, - { 0x146, MM_PACKED, 320, 200, 8 }, - { 0x147, MM_DIRECT, 1600, 1200, 32 }, - { 0x148, MM_PACKED, 1152, 864, 8 }, - { 0x149, MM_DIRECT, 1152, 864, 15 }, - { 0x14a, MM_DIRECT, 1152, 864, 16 }, - { 0x14b, MM_DIRECT, 1152, 864, 24 }, - { 0x14c, MM_DIRECT, 1152, 864, 32 }, - { 0x178, MM_DIRECT, 1280, 800, 16 }, - { 0x179, MM_DIRECT, 1280, 800, 24 }, - { 0x17a, MM_DIRECT, 1280, 800, 32 }, - { 0x17b, MM_DIRECT, 1280, 960, 16 }, - { 0x17c, MM_DIRECT, 1280, 960, 24 }, - { 0x17d, MM_DIRECT, 1280, 960, 32 }, - { 0x17e, MM_DIRECT, 1440, 900, 16 }, - { 0x17f, MM_DIRECT, 1440, 900, 24 }, - { 0x180, MM_DIRECT, 1440, 900, 32 }, - { 0x181, MM_DIRECT, 1400, 1050, 16 }, - { 0x182, MM_DIRECT, 1400, 1050, 24 }, - { 0x183, MM_DIRECT, 1400, 1050, 32 }, - { 0x184, MM_DIRECT, 1680, 1050, 16 }, - { 0x185, MM_DIRECT, 1680, 1050, 24 }, - { 0x186, MM_DIRECT, 1680, 1050, 32 }, - { 0x187, MM_DIRECT, 1920, 1200, 16 }, - { 0x188, MM_DIRECT, 1920, 1200, 24 }, - { 0x189, MM_DIRECT, 1920, 1200, 32 }, - { 0x18a, MM_DIRECT, 2560, 1600, 16 }, - { 0x18b, MM_DIRECT, 2560, 1600, 24 }, - { 0x18c, MM_DIRECT, 2560, 1600, 32 }, - { 0, }, + { 0x140, { MM_DIRECT, 320, 200, 32 } }, + { 0x141, { MM_DIRECT, 640, 400, 32 } }, + { 0x142, { MM_DIRECT, 640, 480, 32 } }, + { 0x143, { MM_DIRECT, 800, 600, 32 } }, + { 0x144, { MM_DIRECT, 1024, 768, 32 } }, + { 0x145, { MM_DIRECT, 1280, 1024, 32 } }, + { 0x146, { MM_PACKED, 320, 200, 8 } }, + { 0x147, { MM_DIRECT, 1600, 1200, 32 } }, + { 0x148, { MM_PACKED, 1152, 864, 8 } }, + { 0x149, { MM_DIRECT, 1152, 864, 15 } }, + { 0x14a, { MM_DIRECT, 1152, 864, 16 } }, + { 0x14b, { MM_DIRECT, 1152, 864, 24 } }, + { 0x14c, { MM_DIRECT, 1152, 864, 32 } }, + { 0x178, { MM_DIRECT, 1280, 800, 16 } }, + { 0x179, { MM_DIRECT, 1280, 800, 24 } }, + { 0x17a, { MM_DIRECT, 1280, 800, 32 } }, + { 0x17b, { MM_DIRECT, 1280, 960, 16 } }, + { 0x17c, { MM_DIRECT, 1280, 960, 24 } }, + { 0x17d, { MM_DIRECT, 1280, 960, 32 } }, + { 0x17e, { MM_DIRECT, 1440, 900, 16 } }, + { 0x17f, { MM_DIRECT, 1440, 900, 24 } }, + { 0x180, { MM_DIRECT, 1440, 900, 32 } }, + { 0x181, { MM_DIRECT, 1400, 1050, 16 } }, + { 0x182, { MM_DIRECT, 1400, 1050, 24 } }, + { 0x183, { MM_DIRECT, 1400, 1050, 32 } }, + { 0x184, { MM_DIRECT, 1680, 1050, 16 } }, + { 0x185, { MM_DIRECT, 1680, 1050, 24 } }, + { 0x186, { MM_DIRECT, 1680, 1050, 32 } }, + { 0x187, { MM_DIRECT, 1920, 1200, 16 } }, + { 0x188, { MM_DIRECT, 1920, 1200, 24 } }, + { 0x189, { MM_DIRECT, 1920, 1200, 32 } }, + { 0x18a, { MM_DIRECT, 2560, 1600, 16 } }, + { 0x18b, { MM_DIRECT, 2560, 1600, 24 } }, + { 0x18c, { MM_DIRECT, 2560, 1600, 32 } }, };
#define BYTES_PER_PIXEL(m) ((GET_GLOBAL((m)->depth) + 7) / 8) @@ -177,29 +173,26 @@ bochsvga_total_mem(void) return dispi_read(VBE_DISPI_INDEX_VIDEO_MEMORY_64K); }
-static struct mode *find_mode_entry(u16 mode) +struct vgamode_s *bochsvga_find_mode(int mode) { - struct mode *m; - - for (m = bochsvga_modes; GET_GLOBAL(m->mode); m++) { + struct bochsvga_mode *m = bochsvga_modes; + for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)]; m++) if (GET_GLOBAL(m->mode) == mode) - return m; - } - - return NULL; + return &m->info; + return stdvga_find_mode(mode); }
-static int mode_valid(struct mode *m) +static int mode_valid(struct vgamode_s *vmode_g) { u16 max_xres = dispi_get_max_xres(); u16 max_bpp = dispi_get_max_bpp(); u32 max_mem = bochsvga_total_mem() * 64 * 1024;
- u32 mem = GET_GLOBAL(m->width) * GET_GLOBAL(m->height) * - BYTES_PER_PIXEL(m); + u32 mem = GET_GLOBAL(vmode_g->width) * GET_GLOBAL(vmode_g->height) * + BYTES_PER_PIXEL(vmode_g);
- if (GET_GLOBAL(m->width) > max_xres || - GET_GLOBAL(m->depth) > max_bpp || + if (GET_GLOBAL(vmode_g->width) > max_xres || + GET_GLOBAL(vmode_g->depth) > max_bpp || mem > max_mem) return 0;
@@ -211,10 +204,10 @@ bochsvga_list_modes(u16 seg, u16 ptr) { int count = 0; u16 *dest = (u16 *)(u32)ptr; - struct mode *m;
- for (m = bochsvga_modes; GET_GLOBAL(m->mode); m++) { - if (!mode_valid(m)) + struct bochsvga_mode *m = bochsvga_modes; + for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)]; m++) { + if (!mode_valid(&m->info)) continue;
dprintf(1, "VBE found mode %x valid.\n", GET_GLOBAL(m->mode)); @@ -231,15 +224,13 @@ bochsvga_list_modes(u16 seg, u16 ptr) int bochsvga_mode_info(u16 mode, struct vbe_modeinfo *info) { - struct mode *m; - - m = find_mode_entry(mode); - if (!m || !mode_valid(m)) + struct vgamode_s *vmode_g = bochsvga_find_mode(mode); + if (!vmode_g || !mode_valid(vmode_g)) return -1;
- info->width = GET_GLOBAL(m->width); - info->height = GET_GLOBAL(m->height); - info->depth = GET_GLOBAL(m->depth); + info->width = GET_GLOBAL(vmode_g->width); + info->height = GET_GLOBAL(vmode_g->height); + info->depth = GET_GLOBAL(vmode_g->depth);
info->linesize = info->width * ((info->depth + 7) / 8); info->phys_base = GET_GLOBAL(pci_lfb_addr); diff --git a/vgasrc/bochsvga.h b/vgasrc/bochsvga.h index 32554d5..963b0d3 100644 --- a/vgasrc/bochsvga.h +++ b/vgasrc/bochsvga.h @@ -59,6 +59,7 @@ int bochsvga_list_modes(u16 seg, u16 ptr); struct vbe_modeinfo; int bochsvga_mode_info(u16 mode, struct vbe_modeinfo *info); void bochsvga_hires_enable(int enable); +struct vgamode_s *bochsvga_find_mode(int mode); int bochsvga_set_mode(int mode, int flags); void bochsvga_clear_scr(void); int bochsvga_hires_enabled(void); diff --git a/vgasrc/clext.c b/vgasrc/clext.c index ec0380f..90d7924 100644 --- a/vgasrc/clext.c +++ b/vgasrc/clext.c @@ -19,18 +19,13 @@ ****************************************************************/
struct cirrus_mode_s { - /* + 0 */ u16 mode; - u8 memmodel; - u16 width; - u16 height; - u16 depth; - /* + 8 */ + struct vgamode_s info; + u16 hidden_dac; /* 0x3c6 */ u16 *seq; /* 0x3c4 */ u16 *graph; /* 0x3ce */ u16 *crtc; /* 0x3d4 */ - /* +16 */ u8 bitsperpixel; u8 vesaredmask; u8 vesaredpos; @@ -38,7 +33,6 @@ struct cirrus_mode_s { u8 vesagreenpos; u8 vesabluemask; u8 vesabluepos; - /* +24 */ u8 vesareservedmask; u8 vesareservedpos; }; @@ -240,63 +234,63 @@ static u16 ccrtc_1600x1200x8[] VAR16 = { };
static struct cirrus_mode_s cirrus_modes[] VAR16 = { - {0x5f,MM_PACKED,640,480,8,0x00, + {0x5f,{MM_PACKED,640,480,8},0x00, cseq_640x480x8,cgraph_svgacolor,ccrtc_640x480x8,8, 0,0,0,0,0,0,0,0}, - {0x64,MM_DIRECT,640,480,16,0xe1, + {0x64,{MM_DIRECT,640,480,16},0xe1, cseq_640x480x16,cgraph_svgacolor,ccrtc_640x480x16,16, 5,11,6,5,5,0,0,0}, - {0x66,MM_DIRECT,640,480,15,0xf0, + {0x66,{MM_DIRECT,640,480,15},0xf0, cseq_640x480x16,cgraph_svgacolor,ccrtc_640x480x16,16, 5,10,5,5,5,0,1,15}, - {0x71,MM_DIRECT,640,480,24,0xe5, + {0x71,{MM_DIRECT,640,480,24},0xe5, cseq_640x480x24,cgraph_svgacolor,ccrtc_640x480x24,24, 8,16,8,8,8,0,0,0},
- {0x5c,MM_PACKED,800,600,8,0x00, + {0x5c,{MM_PACKED,800,600,8},0x00, cseq_800x600x8,cgraph_svgacolor,ccrtc_800x600x8,8, 0,0,0,0,0,0,0,0}, - {0x65,MM_DIRECT,800,600,16,0xe1, + {0x65,{MM_DIRECT,800,600,16},0xe1, cseq_800x600x16,cgraph_svgacolor,ccrtc_800x600x16,16, 5,11,6,5,5,0,0,0}, - {0x67,MM_DIRECT,800,600,15,0xf0, + {0x67,{MM_DIRECT,800,600,15},0xf0, cseq_800x600x16,cgraph_svgacolor,ccrtc_800x600x16,16, 5,10,5,5,5,0,1,15},
- {0x60,MM_PACKED,1024,768,8,0x00, + {0x60,{MM_PACKED,1024,768,8},0x00, cseq_1024x768x8,cgraph_svgacolor,ccrtc_1024x768x8,8, 0,0,0,0,0,0,0,0}, - {0x74,MM_DIRECT,1024,768,16,0xe1, + {0x74,{MM_DIRECT,1024,768,16},0xe1, cseq_1024x768x16,cgraph_svgacolor,ccrtc_1024x768x16,16, 5,11,6,5,5,0,0,0}, - {0x68,MM_DIRECT,1024,768,15,0xf0, + {0x68,{MM_DIRECT,1024,768,15},0xf0, cseq_1024x768x16,cgraph_svgacolor,ccrtc_1024x768x16,16, 5,10,5,5,5,0,1,15},
- {0x78,MM_DIRECT,800,600,24,0xe5, + {0x78,{MM_DIRECT,800,600,24},0xe5, cseq_800x600x24,cgraph_svgacolor,ccrtc_800x600x24,24, 8,16,8,8,8,0,0,0}, - {0x79,MM_DIRECT,1024,768,24,0xe5, + {0x79,{MM_DIRECT,1024,768,24},0xe5, cseq_1024x768x24,cgraph_svgacolor,ccrtc_1024x768x24,24, 8,16,8,8,8,0,0,0},
- {0x6d,MM_PACKED,1280,1024,8,0x00, + {0x6d,{MM_PACKED,1280,1024,8},0x00, cseq_1280x1024x8,cgraph_svgacolor,ccrtc_1280x1024x8,8, 0,0,0,0,0,0,0,0}, - {0x69,MM_DIRECT,1280,1024,15,0xf0, + {0x69,{MM_DIRECT,1280,1024,15},0xf0, cseq_1280x1024x16,cgraph_svgacolor,ccrtc_1280x1024x16,16, 5,10,5,5,5,0,1,15}, - {0x75,MM_DIRECT,1280,1024,16,0xe1, + {0x75,{MM_DIRECT,1280,1024,16},0xe1, cseq_1280x1024x16,cgraph_svgacolor,ccrtc_1280x1024x16,16, 5,11,6,5,5,0,0,0},
- {0x7b,MM_PACKED,1600,1200,8,0x00, + {0x7b,{MM_PACKED,1600,1200,8},0x00, cseq_1600x1200x8,cgraph_svgacolor,ccrtc_1600x1200x8,8, 0,0,0,0,0,0,0,0}, };
static struct cirrus_mode_s mode_switchback VAR16 = - {0xfe,0xff,0,0,0,0,cseq_vga,cgraph_vga,ccrtc_vga,0, + {0xfe,{0xff,0,0,0},0,cseq_vga,cgraph_vga,ccrtc_vga,0, 0,0,0,0,0,0,0,0};
@@ -317,6 +311,15 @@ cirrus_get_modeentry(u8 mode) return NULL; }
+struct vgamode_s * +clext_find_mode(int mode) +{ + struct cirrus_mode_s *table_g = cirrus_get_modeentry(mode); + if (table_g) + return &table_g->info; + return stdvga_find_mode(mode); +} + static void cirrus_switch_mode_setregs(u16 *data, u16 port) { @@ -346,7 +349,7 @@ cirrus_switch_mode(struct cirrus_mode_s *table) outb(GET_GLOBAL(table->hidden_dac), VGAREG_PEL_MASK); outb(0xff, VGAREG_PEL_MASK);
- u8 memmodel = GET_GLOBAL(table->memmodel); + u8 memmodel = GET_GLOBAL(table->info.memmodel); u8 v = stdvga_get_single_palette_reg(0x10) & 0xfe; if (memmodel == MM_PLANAR) v |= 0x41; @@ -744,15 +747,15 @@ cirrus_vesa_01h(struct bregs *regs) SET_FARVAR(seg, info->win_func_ptr.segoff, 0x0); // XXX u16 linesize = cirrus_get_line_offset_entry(table_g); SET_FARVAR(seg, info->bytes_per_scanline, linesize); - SET_FARVAR(seg, info->xres, GET_GLOBAL(table_g->width)); - u16 height = GET_GLOBAL(table_g->height); + SET_FARVAR(seg, info->xres, GET_GLOBAL(table_g->info.width)); + u16 height = GET_GLOBAL(table_g->info.height); SET_FARVAR(seg, info->yres, height); SET_FARVAR(seg, info->xcharsize, 8); SET_FARVAR(seg, info->ycharsize, 16); SET_FARVAR(seg, info->planes, 1); - SET_FARVAR(seg, info->bits_per_pixel, GET_GLOBAL(table_g->depth)); + SET_FARVAR(seg, info->bits_per_pixel, GET_GLOBAL(table_g->info.depth)); SET_FARVAR(seg, info->banks, 1); - SET_FARVAR(seg, info->mem_model, GET_GLOBAL(table_g->memmodel)); + SET_FARVAR(seg, info->mem_model, GET_GLOBAL(table_g->info.memmodel)); SET_FARVAR(seg, info->bank_size, 0);
int pages = (cirrus_get_memsize() * 64 * 1024) / (height * linesize); diff --git a/vgasrc/clext.h b/vgasrc/clext.h index 6fd0a58..e344639 100644 --- a/vgasrc/clext.h +++ b/vgasrc/clext.h @@ -3,6 +3,7 @@
#include "types.h" // u8
+struct vgamode_s *clext_find_mode(int mode); int clext_set_mode(int mode, int flags); int clext_init(void);
diff --git a/vgasrc/vgahw.h b/vgasrc/vgahw.h index 55e3bc4..9d8a067 100644 --- a/vgasrc/vgahw.h +++ b/vgasrc/vgahw.h @@ -10,6 +10,10 @@ #include "geodevga.h" // geodevga_init
static inline struct vgamode_s *vgahw_find_mode(int mode) { + if (CONFIG_VGA_CIRRUS) + return clext_find_mode(mode); + if (CONFIG_VGA_BOCHS) + return bochsvga_find_mode(mode); return stdvga_find_mode(mode); }