On Sat, Jul 09, 2011 at 07:23:23PM -0400, Kevin O'Connor wrote:
On Sat, Jul 09, 2011 at 07:01:00PM -0400, Kevin O'Connor wrote:
I also noticed coreboot enables the uart fifos. This is not beneficial because the simple polling logic used by coreboot and SeaBIOS cannot utilize the transmit fifo.
Could the fifos being enabled be the cause of the slow down even after the SeaBIOS serial polling fix?
I ran a quick test with the fifos disabled. Unfortunately, I still get a slower transmit rate - off by about 8us per character on my e350m1 - even with the seabios patch I sent separately. Weird.
Bleh - that was really dumb. I had:
while ((inb(CONFIG_DEBUG_SERIAL_PORT+SEROFF_LSR) & 0x40) != 0x40)
instead of:
while ((inb(CONFIG_DEBUG_SERIAL_PORT+SEROFF_LSR) & 0x20) != 0x20)
That bit error led me down a wrong path.. It's odd that Linux seems to have the same issue.
-Kevin