[SeaBIOS] Re: Large 32 bit BAR's

[Wannes Bouwen (Nokia)]

Hello,

Thanks for the answers. We'll indeed investigate if we can use a 64-bit BAR.

Kind regards,

Wannes

-----Original Message-----
From: Gerd Hoffmann  
Sent: Wednesday, April 12, 2023 10:04 AM
To: Wannes Bouwen (Nokia) 
Cc: [e-mail]
Subject: Re: [SeaBIOS] Large 32 bit BAR's

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Hi,
> I'm running a x86 QEMU with Ubuntu. On this system we want to emulate 
> a PCIe device which contains a large 32-bit BAR (2 GiB). This is not 
> working and I get following error:

Why a 32-bit bar, not a 64-bit bar?

A 2G 32-bit bar simply can't be mapped anywhere on x86.  It must be below 4G, and it must be 2G-aligned.  Which leaves exactly two options:
0G -> 2G or 2G -> 4G.  Both overlap with resources critical for x86 boot, the former with the real mode address space (0-1M) and the latter with lapic, ioapic, hpet, tpm etc just below 4G.

take care,
  Gerd