Re: [SeaBIOS] varlow/extrastack vs code

[Dr. David Alan Gilbert]

* Kevin O'Connor ([e-mail]) wrote:
> On Tue, Feb 14, 2017 at 07:04:05PM +0100, Laszlo Ersek wrote:
> > On 02/14/17 18:16, Kevin O'Connor wrote:
> > > Also, the PAM registers on real hardware support a mode where reads to
> > > 0xf0000 return the pristine copy of the bios while writes update
> > > memory.  I didn't think there was any interest in implementing that on
> > > QEMU (nor do I think it would be particularly helpful to have).
> >
> > Hmmm, I thought this was implemented with the four modes visible in
> > init_pam() and switched by pam_update(), in "hw/pci-host/pam.c".
> >
> > Based on the remaining "XXX" comments though, and the wording of commit
> > 175f099b30d47 ("pam: partly fix write-only mode"), it seems that the
> > emulation is not complete just yet?...
> >
> > Perhaps this helps Dave identify what should be fixed in QEMU...
>
> I don't think anything in QEMU needs to be "fixed" - the bug is
> definitely in SeaBIOS.  The QEMU pam stuff is definitely quirky, but
> even if we updated qemu we'd still have to fix seabios for old
> versions of qemu.

Still, we probably should fix QEMU, especially if it's pretty
easy, and resetting those registers sounds like it is, I'll try it.
> Just for historical perspective - the reason I think qemu didn't
> implement the pam "read from rom and write to memory" mode is that I
> don't think there's a good way to emulate that with page tables (and
> the range needs to be executable so just making it all device memory
> isn't practical).  Even if it were implemented, though, I doubt it
> would help much.

Anyway, the diagnosis seems right; in that the following hack seems to have
survived 51 reboots:

diff -urN seabios-1.9.1-ref-kevinschanges/src/hw/pci.c seabios-1.9.1/src/hw/pci.c
--- seabios-1.9.1-ref-kevinschanges/src/hw/pci.c	2016-01-18 05:13:20.000000000 -0500
+++ seabios-1.9.1/src/hw/pci.c	2017-02-14 13:09:39.760330263 -0500
@@ -276,7 +276,5 @@
 {
     u8 v = inb(PORT_PCI_REBOOT) & ~6;
     outb(v|2, PORT_PCI_REBOOT); /* Request hard reset */
-    udelay(50);
     outb(v|6, PORT_PCI_REBOOT); /* Actually do the reset */
-    udelay(50);
 }
diff -urN seabios-1.9.1-ref-kevinschanges/src/resume.c seabios-1.9.1/src/resume.c
--- seabios-1.9.1-ref-kevinschanges/src/resume.c	2017-02-14 13:03:19.281943262 -0500
+++ seabios-1.9.1/src/resume.c	2017-02-14 13:09:27.456511775 -0500
@@ -123,15 +123,15 @@
     // Setup for reset on qemu.
     qemu_prep_reset();

+    // Try PCI 0xcf9 reboot
+    pci_reboot();
+
     // Reboot using ACPI RESET_REG
     acpi_reboot();

// Try keyboard controller reboot.
     i8042_reboot();

-    // Try PCI 0xcf9 reboot
-    pci_reboot();
-
     // Try triple fault
     asm volatile("int3");

I went for pci_reboot since it was easier to hack the delay out of.
It's survived, still rebooting and hasn't thrown any KVM-shutdowns.

Dave
> -Kevin