- Replace some arbitrarily hardcoded fields with proper "n/a" or "unknown" values; - Use QEMU-supplied default manufacturer and version strings; - Count CPUs starting with 0 instead of 1, to maintain uniformity with other multiple-instance items.
Signed-off-by: Gabriel Somlo somlo@cmu.edu --- hw/i386/smbios.c | 24 +++++++++--------------- 1 file changed, 9 insertions(+), 15 deletions(-)
diff --git a/hw/i386/smbios.c b/hw/i386/smbios.c index f7a9a92..999c400 100644 --- a/hw/i386/smbios.c +++ b/hw/i386/smbios.c @@ -492,8 +492,8 @@ static void smbios_build_type_4_table(unsigned instance) SMBIOS_TABLE_SET_STR(4, processor_version_str, type4.version); t->voltage = 0; t->external_clock = 0; /* Unknown */ - t->max_speed = 2000; /* hardcoded in SeaBIOS (use 0/Unknown instead ?) */ - t->current_speed = 2000; /* hardcoded in SeaBIOS (use 0/Unknown ?) */ + t->max_speed = 0; /* Unknown */ + t->current_speed = 0; /* Unknown */ t->status = 0x41; /* Socket populated, CPU enabled */ t->processor_upgrade = 0x01; /* Other */ t->l1_cache_handle = 0xFFFF; /* N/A */ @@ -541,9 +541,9 @@ static void smbios_build_type_17_table(unsigned instance, ram_addr_t size) SMBIOS_BUILD_TABLE_PRE(17, 0x1100 + instance, true); /* required */
t->physical_memory_array_handle = 0x1000; /* Type 16 (Phys. Mem. Array) */ - t->memory_error_information_handle = 0; /* SeaBIOS, should be 0xFFFE(N/A) */ - t->total_width = 64; /* hardcoded in SeaBIOS */ - t->data_width = 64; /* hardcoded in SeaBIOS */ + t->memory_error_information_handle = 0xFFFE; /* Not provided */ + t->total_width = 0xFFFF; /* Unknown */ + t->data_width = 0xFFFF; /* Unknown */ size_mb = QEMU_ALIGN_UP(size, ONE_MB) / ONE_MB; if (size_mb < 0x7FFF) { t->size = size_mb; @@ -559,7 +559,7 @@ static void smbios_build_type_17_table(unsigned instance, ram_addr_t size) SMBIOS_TABLE_SET_STR(17, device_locator_str, loc_str); SMBIOS_TABLE_SET_STR(17, bank_locator_str, type17.bank); t->memory_type = 0x07; /* RAM */ - t->type_detail = 0; /* hardcoded in SeaBIOS */ + t->type_detail = 0x02; /* Other */ t->speed = 0; /* Unknown */ SMBIOS_TABLE_SET_STR(17, manufacturer_str, type17.manufacturer); SMBIOS_TABLE_SET_STR(17, serial_number_str, type17.serial); @@ -655,7 +655,6 @@ void smbios_set_defaults(const char *manufacturer, ram_addr_t below_4g_mem_size, ram_addr_t above_4g_mem_size) { - const char *manufacturer_compat = "Bochs"; /* SeaBIOS compatibility */ smbios_have_defaults = true;
assert(ram_size == below_4g_mem_size + above_4g_mem_size); @@ -671,15 +670,11 @@ void smbios_set_defaults(const char *manufacturer, SMBIOS_SET_DEFAULT(type2.manufacturer, manufacturer); SMBIOS_SET_DEFAULT(type2.product, product); SMBIOS_SET_DEFAULT(type2.version, version); - SMBIOS_SET_DEFAULT(type3.manufacturer, manufacturer_compat); - /* not set in SeaBIOS + SMBIOS_SET_DEFAULT(type3.manufacturer, manufacturer); SMBIOS_SET_DEFAULT(type3.version, version); - */ SMBIOS_SET_DEFAULT(type4.sock_pfx, "CPU"); - SMBIOS_SET_DEFAULT(type4.manufacturer, manufacturer_compat); - /* not set in SeaBIOS + SMBIOS_SET_DEFAULT(type4.manufacturer, manufacturer); SMBIOS_SET_DEFAULT(type4.version, version); - */ SMBIOS_SET_DEFAULT(type17.loc_pfx, "DIMM"); SMBIOS_SET_DEFAULT(type17.manufacturer, manufacturer); } @@ -694,8 +689,7 @@ uint8_t *smbios_get_table(size_t *length) smbios_build_type_2_table(); smbios_build_type_3_table(); for (i = 0; i < smp_cpus; i++) { - /* count CPUs starting with 1, to minimize diff vs. SeaBIOS */ - smbios_build_type_4_table(i + 1); + smbios_build_type_4_table(i); }
/* SeaBIOS expects tables compliant to smbios v2.4;