PCI setup is one of the main things, the interrupt routing in particular is different which has knock on effects on chipset setup (e.g. legacy PCI ISA IRQ routing) and the BIOS tables (e.g. ACPI _PRT entries). This strikes me as being highly "mainboard" specific, IOW the stuff I would expect to find in coreboot rather than SeaBIOS.
There is q35 emulation support in for qemu in the pipeline, which has simliar requirements, especially it needs a different dsdt table too. So a solution is needed here anyway. One option is to just pass the table from qemu, another one is to have multiple tables compiled in and have seabios pick one at runtime depending on the hardware it detects.
Another difference is that the existing hvmloader tables are ACPI 2.0 while SeaBIOS only creates 1.0 tables, I'm not sure that strictly speaking counts as a incompleteness in SeaBIOS since it's not obvious that Xen actually needs/uses any of the functionality of 2.0. Also it might be something SeaBIOS would like to grow in any case.
Indeed, I don't see that as a xen specific thing.