From: Matt DeVillier matt.devillier@gmail.com Date: Fri, 12 Aug 2016 14:21:58 -0500
PS/2 keyboards on Chromebooks with upstream coreboot + SeaBIOS often fail to init properly / register keystrokes. Modify ps2port init to match that of TianoCore, which doesn't have said issues.
Signed-off-by: Matt DeVillier matt.devillier@gmail.com Signed-off-by: Paul Menzel pmenzel@molgen.mpg.de --- Upstream from https://github.com/MrChromebox/SeaBIOS/
src/hw/ps2port.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/src/hw/ps2port.c b/src/hw/ps2port.c index 88b1059..2c334c0 100644 --- a/src/hw/ps2port.c +++ b/src/hw/ps2port.c @@ -465,6 +465,14 @@ ps2_keyboard_setup(void *data) if (ret) return;
+ // Disable KB/mouse interfaces + ret = i8042_command(I8042_CMD_KBD_DISABLE, NULL); + if (ret) + return; + ret = i8042_command(I8042_CMD_AUX_DISABLE, NULL); + if (ret) + return; + // Controller self-test. u8 param[2]; ret = i8042_command(I8042_CMD_CTL_TEST, param); @@ -475,6 +483,11 @@ ps2_keyboard_setup(void *data) return; }
+ // KB write CMD + ret = i8042_command(I8042_CMD_CTL_WCTR, NULL); + if (ret) + return; + // Controller keyboard test. ret = i8042_command(I8042_CMD_KBD_TEST, param); if (ret) @@ -505,11 +518,6 @@ ps2_keyboard_setup(void *data) return; }
- /* Disable keyboard */ - ret = ps2_kbd_command(ATKBD_CMD_RESET_DIS, NULL); - if (ret) - return; - // Set scancode command (mode 2) param[0] = 0x02; ret = ps2_kbd_command(ATKBD_CMD_SSCANSET, param);