On 05/31/2011 06:38 PM, Eduard - Gabriel Munteanu wrote:
Hi,
Again, sorry for taking so long, but I just don't send stuff without looking through it. This is meant to go into Michael's PCI branch, if it does.
Some of the changes include: - some fixes (one thanks to David Gibson) and cleanups - macro magic for exporting clones of the DMA interface (e.g. pci_memory_read()); I hope it isn't too much a stretch - we use pci_memory_*() in most places where PCI devices are involved now - luckily we don't need unaligned accesses anymore - some attempt at signaling target aborts, but it doesn't seem like that stuff is completely implemented in the PCI layer / devices - PCI ids are defined in hw/amd_iommu.c until they get merged into Linux
Also, I can't answer every request that the API is extended for doing this and that more comfortably. I understand there may be corner cases, but may I suggest merging it (maybe into a separate branch related to mst's pci) so that everybody can deal with it? This is still labeled RFC, but if you think it's ready it can be merged.
I hope most of the important issues have been dealt with. I'll post the SeaBIOS patches soon (though I think you can give it a spin with the old ones, if you need). I'll also take care of submitting PCI ids to be merged into Linux.
In any case, let me know what you think. I hope I didn't forget to Cc someone.
In order to move the discussion along productively, please have a look at
git://repo.or.cz/qemu/rth.git axp-iommu-1
which is based on your previous patch set.
There's stuff in there that's not 100% relevant to the discussion, but these two commits:
0652a74 target-alpha: Implement iommu translation for Typhoon. db50b11 DMA: Use an void* opaque value, rather than upcasting from qdev.
are exactly what I'm interested in discussing.
r~