[SeaBIOS] [PATCH] limit address space used for pci devices, part two

[Gerd Hoffmann]

This patch changes the logic added by commit a6ed6b701f0a ("limit
address space used for pci devices.") a bit.  Further testing showed
that the limit of 46 phys-bits applies to x86_64 kernels only, for i386
kernels the limit is 44.  So change the limit from 46 to 44 for better
compatibility with i386 guests.

Also add one more condition to refine the configuration heuristic:
Apply the limit only in case the guest has less than 1 TB of memory
installed, so huge guests run without address space limits.

Signed-off-by: Gerd Hoffmann 
---
 src/fw/pciinit.c | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
index bb44dc296047..b3e359d7fe62 100644
--- a/src/fw/pciinit.c
+++ b/src/fw/pciinit.c
@@ -1189,11 +1189,16 @@ pci_setup(void)

if (CPUPhysBits) {
         pci_mem64_top = 1LL << CPUPhysBits;
-        if (CPUPhysBits > 46) {
-            // Old linux kernels have trouble dealing with more than 46
-            // phys-bits, so avoid that for now.  Seems to be a bug in the
-            // virtio-pci driver.  Reported: centos-7, ubuntu-18.04
-            pci_mem64_top = 1LL << 46;
+        if (CPUPhysBits > 44) {
+            // Old linux kernels have trouble dealing with more than 44 (i386
+            // kernels) or 46 (x86_64 kernels) phys-bits. Seems to be a bug in
+            // the virtio-pci driver.
+            // Reported: centos-7, ubuntu-18.04
+            // Limit the used address space to mitigate the bug, except we are
+            // running in a huge guest with more than 1TB of memory installed.
+            if (RamSizeOver4G < (1LL << 40)) {
+                pci_mem64_top = 1LL << 44;
+            }
         }
     }