On Mon, Dec 02, 2013 at 04:02:59PM +0000, David Woodhouse wrote:
We expect to use the space between the top of option ROMs and the bottom of our own BIOS code as a stack. OVMF was previously marking the whole region from 0xC0000 to 0xFFFFF read-only before invoking our Legacy16Boot method. Read-only stack considered harmful.
Version 0.98 of the CSM spec adds the UmaAddress and UmaSize fields, which allow the CSM to specify a memory region that needs to be writable.
Excellent!
--- a/src/fw/csm.c +++ b/src/fw/csm.c @@ -34,6 +34,8 @@ EFI_COMPATIBILITY16_TABLE csm_compat_table VARFSEG __aligned(16) = { .Compatibility16CallOffset = 0 /* Filled in by checkrom.py */, .OemIdStringPointer = (u32)"SeaBIOS", .AcpiRsdPtrPointer = (u32)&csm_rsdp,
- .UmaAddress = 0xe0000,
- .UmaSize = 0x10000,
I think we can be a little more accurate here. See the incremental patch (untested) below and let me know if I've missed anything.
-Kevin
diff --git a/src/fw/csm.c b/src/fw/csm.c index b7a4211..ae3a786 100644 --- a/src/fw/csm.c +++ b/src/fw/csm.c @@ -34,8 +34,10 @@ EFI_COMPATIBILITY16_TABLE csm_compat_table VARFSEG __aligned(16) = { .Compatibility16CallOffset = 0 /* Filled in by checkrom.py */, .OemIdStringPointer = (u32)"SeaBIOS", .AcpiRsdPtrPointer = (u32)&csm_rsdp, - .UmaAddress = 0xe0000, +#if CONFIG_MALLOC_UPPERMEMORY + .UmaAddress = (u32)zonelow_base, .UmaSize = 0x10000, +#endif };
EFI_TO_COMPATIBILITY16_INIT_TABLE *csm_init_table; @@ -48,11 +50,12 @@ extern void __csm_return(struct bregs *regs) __noreturn; static void csm_return(struct bregs *regs) { - u32 top = rom_get_max(); - PICMask = pic_irqmask_read(); - csm_compat_table.UmaAddress = top; - csm_compat_table.UmaSize = 0xf0000 - top; + if (CONFIG_MALLOC_UPPERMEMORY) { + u32 top = rom_get_max(); + csm_compat_table.UmaAddress = top; + csm_compat_table.UmaSize = (u32)zonelow_base + 0x10000 - top; + } __csm_return(regs); }