On Tue, Nov 23, 2010 at 09:38:58AM +0200, Avi Kivity wrote:
On 11/23/2010 09:08 AM, Gleb Natapov wrote:
Correct. Note, it's likely that we have almost everything covered already, so it's mostly testing (beyond implementing SMM entry/exit).
Do we? What about support for remapping of 0xa0000 address from framebuffer to RAM during SMM. If our reading of spec is correct it should be done per vcpu. Currently memory slots are shared between vcpus.
Yes. We could define a set of alternate memory slots to be used when SMM is active. The mmu is already prepared (like we support vcpus with different paging modes simultaneously).
But memory slots resides below mmu. The responsible of mmu is to translate gva to gpa. After that memory slots are used to translate gpa into hva and at this point it is not per vcpu. With SMM one vcpu can generate MMIO access and another one memory access with the same gpa.