Dr. David Alan Gilbert dgilbert@redhat.com 于2018年9月28日周五 上午1:53写道：
- Zihan Yang (whois.zihan.yang@gmail.com) wrote:
HI Laszlo Laszlo Ersek lersek@redhat.com 于2018年9月26日周三 上午1:17写道：
On 09/25/18 17:38, Kevin O'Connor wrote:
On Mon, Sep 17, 2018 at 11:02:59PM +0800, Zihan Yang wrote:
To support multiple pci domains of pxb-pcie device in qemu, we need to setup mcfg range in seabios. We use [0x80000000, 0xb0000000) to hold new domain mcfg table for now, and we need to retrieve the desired mcfg size of each pxb-pcie from a hidden bar because they may not need the whole 256 busses, which also enables us to support more domains within a limited range (768MB)
At a highlevel, this looks okay to me. I'd like to see additional reviews from others more familiar with the QEMU PCI code, though.
Is the plan to do the same thing for OVMF?
I remain entirely unconvinced that this feature is useful. (I've stated so before.)
I believe the latest QEMU RFC posting (v5) is here:
[Qemu-devel] [RFC v5 0/6] pci_expander_brdige: support separate pci domain for pxb-pcie
http://mid.mail-archive.com/1537196258-12581-1-git-send-email-whois.zihan.ya...
First, I fail to see the use case where ~256 PCI bus numbers aren't enough. If I strain myself, perhaps I can imagine using ~200 PCIe root ports on Q35 (each of which requires a separate bus number), so that we can independently hot-plug 200 devices then. And that's supposedly not enough, because we want... 300? 400? A thousand? Doesn't sound realistic to me. (This is not meant to be a strawman argument, I really have no idea what the feature would be useful for.)
It might not be very intuitive, but it indeed exists. The very beginning discussion about 4 months ago has mentioned a possible use case, and I paste it here
- We have Ray from Intel trying to use 1000 virtio-net devices
why that many?
I think I'll cc Marcel for the details but I remember that he is not aware of Intel's purpose either. A guess would be that Intel has NFV, DPDK projects, maybe they are playing some magic on the network? I wish I knew, but I doubt whether Intel would let us know their internal projects.
- We may have a VM managing some backups (tapes), we may have a lot of these.
I'm curious; what does tape backup have to do with the number of PCI slots/busses?
I'm not very clear about how tape works in qemu, but the problem is pcie devices under q35. The pcie topology requires one device per bus, therefore the 256 bus might not be enough if we have many pcie devices. Current pxb-pcie still resides in domain 0, and is limited by the number 256. I think he means these tape devices would consume all the available busses we have in domain 0.
Thanks Zihan