On Fri, Dec 06, 2019 at 08:05:22PM -0800, Your Real Name wrote:
On Thu, Dec 05, 2019 at 06:52:46AM +0100, Gerd Hoffmann wrote:
Hi,
I'm ok to use Base-Class/Sub-Class = 0x07/0x00 to filter out the PCI serial devices and choose the first one as the debug port. However, debug port needs to be enabled early, before seabios scans PCI bus. I think we don't want to scan the pci bus by ourself in src/hw/serialio.c, but it's too late to wait for seabios to scan the bus for us. Please advice a feasible solution.
You've mentioned elsewhere in the thread that the serial port is mapped to the legacy 0x3f8 ioport initially. So can we just use that before the PCI scan happens?
The transition from 0x3f8 to an other IO address happened in EDK2 based BIOS, during the transition from PEI to DXE where the PCI bus is scanned resources are allocated. The first time BIOS calls to SeaBIOS, the IO address has already been changed to a non-0x3f8 one.
So seabios will never see the iobase move. Reading the iobase from config space for each char printed should not be needed then. Also: Can't you just set CONFIG_DEBUG_SERIAL_PORT?
Failing that: I'd suggest to create a variable for the serial port iobase, defaulting to CONFIG_DEBUG_SERIAL_PORT. Add a serial_debuf_pci_init(int bdf) helper function to read the iobase from pci config space and set that variable.
That helper can then be hooked into pci scan, or called with a hardcoded bdf for early debug output, or both.
cheers, Gerd