SeaBIOS

seabios@seabios.org

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Re: [SeaBIOS] [Qemu-devel] SeaBIOS booting time optimization
by Stefan Hajnoczi 16 Nov '18

16 Nov '18

On Fri, Nov 16, 2018 at 4:21 PM Stefano Garzarella <sgarzare(a)redhat.com> wrote: > I'm investigating the SeaBIOS booting time, to understand if we can reduce > the boot time in some cases (e.g. legacy hardware is not needed). I think > this > can be interesting also for NEMU developers. Questions for NEMU folks: qboot isn't part of the virt-x86 NEMU tree and is only mentioned in one or two places. Is NEMU focussing exclusively on OVMF guest firmware instead of qboot? Are there other boot time optimizations in NEMU that are a candidate for upstreaming? Stefan

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SeaBIOS booting time optimization
by Stefano Garzarella 16 Nov '18

16 Nov '18

Hi, I'm investigating the SeaBIOS booting time, to understand if we can reduce the boot time in some cases (e.g. legacy hardware is not needed). I think this can be interesting also for NEMU developers. Following this thread ( https://mail.coreboot.org/pipermail/seabios/2015-July/009497.html), I'm using qboot (https://github.com/bonzini/qboot) to compare the SeaBIOS booting time. As Paolo did in qboot, I manually add small debug port writes in SeaBIOS and linuxboot_dma.c (QEMU) to trace the events with perf (kvm_pio events) The goal is to have only one image of SeaBIOS configurable at runtime to reduce the boot time, avoiding unnecessary initialization. Any pointers or suggestions would be helpful. Following I put some preliminary measurements that I obtained: I used this QEMU command line: ./qemu-system-x86_64 -bios $BIOS -m 1G -cpu host -M accel=kvm \ -kernel /boot/vmlinuz-4.18.18-300.fc29.x86_64 -append 'console=ttyS0' \ -nographic -serial mon:stdio For each test, I measured these times (in milliseconds) relative to the "sched_process_exec" event: - qemu_init_end: first kvm_entry (i.e. QEMU initialized has finished) - fw_start: first entry of the BIOS - fw_do_boot: after the BIOS initialization (e.g. PCI setup, etc.) - linux_start_boot: before the jump to the Linux kernel # qboot BIOS=/home/stefano/repos/qboot/bios.bin qemu_init_end: 40.561234 fw_start: 40.721729 (+0.160495) fw_do_boot: 47.025591 (+6.303862) linux_start_boot: 48.874112 (+1.848521) # SeaBIOS with default configuration BIOS=/home/stefano/repos/seabios/out_default/bios.bin qemu_init_end: 40.419451 fw_start: 40.639967 (+0.220516) fw_do_boot: 886.668828 (+846.028861) linux_start_boot: 889.723547 (+3.054719) # SeaBIOS with Kevin's configuration # (https://mail.coreboot.org/pipermail/seabios/2015-July/009508.html) # Note: this SeaBIOS setup is so stripped down that it can't actually boot an OS BIOS=/home/stefano/repos/seabios/out_kevin/bios.bin qemu_init_end: 40.676412 fw_start: 40.755757 (+0.079345) fw_do_boot: 56.427023 (+15.671266) I did the same tests also with NEMU (without using -M virt) and I have approximately the same results. As the next step, I'll start from Kevin's configuration to have a minimal SeaBIOS image ables to boot a Linux kernel. Thanks, Stefano -- Stefano Garzarella Red Hat

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Re: [SeaBIOS] [PATCH] ramdisk: search for all available floppy images instead of one
by Kevin O'Connor 10 Nov '18

10 Nov '18

On Fri, Nov 02, 2018 at 01:07:20AM +0300, Mike Banon wrote: > All the floppy images available at CBFS will be found and listed in a > boot menu, instead of the first found. Could be highly valuable if you > are participating in a hobby OS development - would like to test > multiple versions of your floppy in the same coreboot image, to reduce > the amount of re-flashes and accelerate the development at bare metal > - or simply would like to access multiple floppies as a coreboot user; > for example: KolibriOS (nice assembly OS with GUI), FreeDOS, Visopsys > and memtest (coreboot's own memtest version is a bit buggy, e.g. > external USB keyboard isn't working there at some laptops) Thanks. However I'm concerned that this would reserve memory for all of the floppy images in the e820 map (and thus the final OS would not be able to use that memory). I think if multiple floppy support was desired then we'd want to delay memory reservation until after a particular image was selected in the boot menu. -Kevin

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[PATCH] coreboot: update memory table before handling execution to payload/system
by Krystian Hebel 10 Nov '18

10 Nov '18

SeaBIOS modifies its internal e820 structure, but does not propagate these changes back to coreboot tables. This resulted in multiple errors in MemTest86 when run on 2 GB platforms, probably because of some memory-mapped devices. This patch copies back modified e820 tables before booting an OS or a payload. Change-Id: I16a3f059695717daedb1e997ce4e62018c7e02b3 Signed-off-by: Krystian Hebel <krystian.hebel(a)3mdeb.com> --- src/e820map.c | 2 ++ src/e820map.h | 2 ++ src/fw/coreboot.c | 50 +++++++++++++++++++++++++++++++++++++++++++---- 3 files changed, 50 insertions(+), 4 deletions(-) diff --git a/src/e820map.c b/src/e820map.c index 39445cf6399d..2d2de6094b14 100644 --- a/src/e820map.c +++ b/src/e820map.c @@ -148,5 +148,7 @@ e820_remove(u64 start, u64 size) void e820_prepboot(void) { + // Synchronize memory maps. + coreboot_update_memtable(); dump_map(); } diff --git a/src/e820map.h b/src/e820map.h index de8b523003c5..78bf1ce76572 100644 --- a/src/e820map.h +++ b/src/e820map.h @@ -23,4 +23,6 @@ void e820_prepboot(void); extern struct e820entry e820_list[]; extern int e820_count; +extern void coreboot_update_memtable(void); + #endif // e820map.h diff --git a/src/fw/coreboot.c b/src/fw/coreboot.c index 7c0954b5398c..aa07baad3a7f 100644 --- a/src/fw/coreboot.c +++ b/src/fw/coreboot.c @@ -189,10 +189,6 @@ coreboot_preinit(void) e820_add(m->start, m->size, type); } - // Ughh - coreboot likes to set a map at 0x0000-0x1000, but this - // confuses grub. So, override it. - e820_add(0, 16*1024, E820_RAM); - struct cb_cbmem_ref *cbref = find_cb_subtable(cbh, CB_TAG_CBMEM_CONSOLE); if (cbref) { cbcon = (void*)(u32)cbref->cbmem_addr; @@ -567,3 +563,49 @@ cbfs_payload_setup(void) boot_add_cbfs(cfile->fhdr, desc, bootprio_find_named_rom(filename, 0)); } } + +// Mirror changes done on e820 to coreboot tables. +void +coreboot_update_memtable(void) +{ + if (!CONFIG_COREBOOT) + return; + + // Find coreboot table. + struct cb_header *cbh = find_cb_table(); + if (!cbh) { + dprintf(1, "Unable to find coreboot table!\n"); + return; + } + char *end = (char *)cbh + sizeof(*cbh) + cbh->table_bytes; + dprintf(3, "Now attempting to find coreboot memory map\n"); + struct cb_memory *dst = find_cb_subtable(cbh, CB_TAG_MEMORY); + if (!dst) { + dprintf(1, "Unable to find coreboot memory table!\n"); + return; + } + + // Remove old memory table, overwriting it with following subtables + // and append an updated memory table to the end. + u32 old_size = dst->size; + char *src = (char *)dst + old_size; + memcpy(dst, src, (end - src)); + dst = (struct cb_memory *)(end - old_size); + u32 new_size = e820_count * sizeof(struct e820entry); + dst->tag = CB_TAG_MEMORY; + // Tables are binary compatible, except that CB_MEM_TABLE became + // E820_RESERVED. + memcpy((char*)dst + sizeof(struct cb_memory), e820_list, new_size); + new_size += sizeof(struct cb_memory); + dst->size = new_size; + + // Update header fields (size and checksum). + cbh->table_bytes += new_size - old_size; + cbh->table_checksum = ipchksum((char*)cbh + sizeof(*cbh), cbh->table_bytes); + cbh->header_checksum = 0; + cbh->header_checksum = ipchksum((char*)cbh, sizeof(*cbh)); + + // Ughh - coreboot likes to set a map at 0x0000-0x1000, but this + // confuses grub. So, override it in e820 only. + e820_add(0, 16*1024, E820_RAM); +} -- 2.17.1

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[PATCH] shadow: Rework bios copy code to prevent gcc array-bounds warning
by Kevin O'Connor 10 Nov '18

10 Nov '18

Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/fw/shadow.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/src/fw/shadow.c b/src/fw/shadow.c index 987eaf4..4c627a8 100644 --- a/src/fw/shadow.c +++ b/src/fw/shadow.c @@ -173,9 +173,9 @@ qemu_reboot(void) return; // QEMU doesn't map 0xc0000-0xfffff back to the original rom on a // reset, so do that manually before invoking a hard reset. - void *cstart = VSYMBOL(code32flat_start), *cend = VSYMBOL(code32flat_end); - void *hrp = &HaveRunPost; - if (readl(hrp + BIOS_SRC_OFFSET)) { + void *flash = (void*)BIOS_SRC_OFFSET; + u32 hrp = (u32)&HaveRunPost; + if (readl(flash + hrp)) { // There isn't a pristine copy of the BIOS at 0xffff0000 to copy if (HaveRunPost == 3) { // In a reboot loop. Try to shutdown the machine instead. @@ -187,8 +187,9 @@ qemu_reboot(void) } else { // Copy the BIOS making sure to only reset HaveRunPost at end make_bios_writable(); - memcpy(cstart, cstart + BIOS_SRC_OFFSET, hrp - cstart); - memcpy(hrp + 4, hrp + 4 + BIOS_SRC_OFFSET, cend - (hrp + 4)); + u32 cstart = SYMBOL(code32flat_start), cend = SYMBOL(code32flat_end); + memcpy((void*)cstart, flash + cstart, hrp - cstart); + memcpy((void*)hrp + 4, flash + hrp + 4, cend - (hrp + 4)); barrier(); HaveRunPost = 0; barrier(); -- 2.17.2

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[PATCH] pvscsi: Scan all 64 possible targets
by Shmuel Eiderman 10 Nov '18

10 Nov '18

The max number of targets per PVSCSI controller is 64, not 7. This can easily be seen in QEMU PVSCSI emulation code (hw/scsi/vmw_pvscsi.c) as PVSCSI_MAX_DEVS, which defines the number of targets, have value of 64. Fixes: 83d60b3c474b ("Add pvscsi boot support") Reviewed-by: Liran Alon <liran.alon(a)oracle.com> Reviewed-by: Mark Kanda <mark.kanda(a)oracle.com> Signed-off-by: Shmuel Eiderman <shmuel.eiderman(a)oracle.com> --- src/hw/pvscsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/hw/pvscsi.c b/src/hw/pvscsi.c index d62d0a0..e0ea33c 100644 --- a/src/hw/pvscsi.c +++ b/src/hw/pvscsi.c @@ -310,7 +310,7 @@ init_pvscsi(void *data) struct pvscsi_ring_dsc_s *ring_dsc = NULL; pvscsi_init_rings(iobase, &ring_dsc); int i; - for (i = 0; i < 7; i++) + for (i = 0; i < 64; i++) pvscsi_scan_target(pci, iobase, ring_dsc, i); } -- 2.16.1

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[PATCH] ramdisk: search for all available floppy images instead of one
by Mike Banon 01 Nov '18

01 Nov '18

All the floppy images available at CBFS will be found and listed in a boot menu, instead of the first found. Could be highly valuable if you are participating in a hobby OS development - would like to test multiple versions of your floppy in the same coreboot image, to reduce the amount of re-flashes and accelerate the development at bare metal - or simply would like to access multiple floppies as a coreboot user; for example: KolibriOS (nice assembly OS with GUI), FreeDOS, Visopsys and memtest (coreboot's own memtest version is a bit buggy, e.g. external USB keyboard isn't working there at some laptops) Shortened patch description message: All the available floppy images will be found and listed in a boot menu, instead of the first found. Useful if you are participating in a hobby OS development or would like to access multiple floppies as a coreboot user. Signed-off-by: Mike Banon <mikebdp2(a)gmail.com> --- diff --git a/src/hw/ramdisk.c b/src/hw/ramdisk.c index b9e9baa..0cd8470 100644 --- a/src/hw/ramdisk.c +++ b/src/hw/ramdisk.c @@ -23,40 +23,51 @@ ramdisk_setup(void) if (!CONFIG_FLASH_FLOPPY) return; + struct romfile_s *file = NULL; + char *filename, *desc; + u32 size; + int ftype, ret; + void *pos; + struct drive_s *drive; + + for (;;) { + - // Find image. - struct romfile_s *file = romfile_findprefix("floppyimg/", NULL); - if (!file) - return; + // Find the next image. + file = romfile_findprefix("floppyimg/", file); + if (!file) + return; - const char *filename = file->name; - u32 size = file->size; - dprintf(3, "Found floppy file %s of size %d\n", filename, size); - int ftype = find_floppy_type(size); - if (ftype < 0) { - dprintf(3, "No floppy type found for ramdisk size\n"); - return; - } + filename = file->name; + size = file->size; + dprintf(3, "Found floppy file %s of size %d\n", filename, size); + ftype = find_floppy_type(size); + if (ftype < 0) { + dprintf(3, "No floppy type found for ramdisk size\n"); + return; + } - // Allocate ram for image. - void *pos = memalign_tmphigh(PAGE_SIZE, size); - if (!pos) { - warn_noalloc(); - return; - } - e820_add((u32)pos, size, E820_RESERVED); + // Allocate ram for image. + pos = memalign_tmphigh(PAGE_SIZE, size); + if (!pos) { + warn_noalloc(); + return; + } + e820_add((u32)pos, size, E820_RESERVED); - // Copy image into ram. - int ret = file->copy(file, pos, size); - if (ret < 0) - return; + // Copy image into ram. + ret = file->copy(file, pos, size); + if (ret < 0) + return; - // Setup driver. - struct drive_s *drive = init_floppy((u32)pos, ftype); - if (!drive) - return; + // Setup driver. + drive = init_floppy((u32)pos, ftype); + if (!drive) + return; - drive->type = DTYPE_RAMDISK; - dprintf(1, "Mapping floppy %s to addr %p\n", filename, pos); - char *desc = znprintf(MAXDESCSIZE, "Ramdisk [%s]", &filename[10]); - boot_add_floppy(drive, desc, bootprio_find_named_rom(filename, 0)); + drive->type = DTYPE_RAMDISK; + dprintf(1, "Mapping floppy %s to addr %p\n", filename, pos); + desc = znprintf(MAXDESCSIZE, "Ramdisk [%s]", &filename[10]); + boot_add_floppy(drive, desc, bootprio_find_named_rom(filename, 0)); + + } } static int

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Use SeaBIOS as UEFI CSM
by Paul Menzel 31 Oct '18

31 Oct '18

Dear SeaBIOS folks, Colleagues from another institute have the problem, that the PC vendors started to remove the CSM (legacy BIOS) option from their UEFI firmware. A lot of organizations still use the CSM (legcacy BIOS) option to deploy their systems. I’d like to recommend SeaBIOS to them, but I only found instruction for doing that with OVMF [1]. Do you know of a how-to for UEFI firmware, which is shipped on hardware? From that iPXE should be started. Kind regards, Paul [1]: https://www.seabios.org/Build_overview#Build_as_a_UEFI_Compatibility_Suppor…

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Re: [SeaBIOS] Seabios blocked at running option rom at c000:0003
by Kevin O'Connor 19 Oct '18

19 Oct '18

On Sun, Oct 14, 2018 at 03:32:22PM +0800, Acewind wrote: > Dear All, > These days I'm working on Intel IGD passthrough by qemu+vfio. > Success on i3-6100, but failed on i3-6100U. [...] > Found 2 cpu(s) max supported 2 cpu(s) > Copying PIR from 0x7ffbfca0 to 0x000f1c40 > Copying MPTABLE from 0x00006e90/7ffa8e80 to 0x000f1b10 > Copying SMBIOS entry point from 0x00006e90 to 0x000f1930 > Scan for VGA option rom > Running option rom at c000:0003 > > Now seabios stops and monitor shows no signal. > I have install win10 directly on the host and it works well. Does it means > the vga rom image is ok? What can I do for further debug? Thanks! The "Running option rom at c000:0003" indicates a video card option rom was found and SeaBIOS started executing it. The likely reason for the failure is that the video option rom itself crashed. It's difficult to debug these types of failures because it is rare to have access to the video rom code. -Kevin

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Seabios blocked at running option rom at c000:0003
by Acewind 14 Oct '18

14 Oct '18

Dear All, These days I'm working on Intel IGD passthrough by qemu+vfio. Success on i3-6100, but failed on i3-6100U. The two cpus are both SkyLake arch. I have successed to passthrough IGD device to Win7/Win10 on an i3-6100 machine with Fedora 25. I use legacy mode and set x-igd-gms=1 on qemu command line. When I work on another machine of i3-6100U with the same solution. CPU: Intel(R) Core(TM) i3-6100U CPU @ 2.30GHz VGA: 00:02.0 VGA compatible controller: Intel Corporation HD Graphics 520 (rev 07) [root localhost ~]# dmesg | grep IOMMU [ 0.000000] DMAR: IOMMU enabled [ 0.067707] DMAR-IR: IOAPIC id 2 under DRHD base 0xfed91000 IOMMU 1 [root localhost ~]# cat /proc/cmdline BOOT_IMAGE=/vmlinuz-4.8.6-300.fc25.x86_64 root=/dev/mapper/fedora-root ro rd.lvm.lv=fedora/root rd.lvm.lv=fedora/swap rhgb quiet intel_iommu=on iommu=pt After virsh create command, nothing displays on the screen, there's always no signal. No other graphic and video devices, only passthrough hostdev: <hostdev mode='subsystem' type='pci' managed='yes'> <driver name='vfio'/> <source> <address domain='0x0000' bus='0x00' slot='0x02' function='0x0'/> </source> <alias name='hostdev0'/> <address type='pci' domain='0x0000' bus='0x00' slot='0x02' function='0x0'/> </hostdev> [root localhost ~]# ps -elf | grep qemu 6 S qemu 1541 1 99 80 0 - 804613 poll_s 17:34 ? 00:04:22 /usr/bin/qemu-system-x86_64 -machine accel=kvm -name guest=cn_windows_10_enterprise_version_1703_updated_july_2017_x64_dvd_10925390,debug-threads=on -S -object secret,id=masterKey0,format=raw,file=/var/lib/libvirt/qemu/domain-2-cn_windows_10_enterp/master-key.aes -machine pc-i440fx-2.7,accel=kvm,usb=off -cpu Skylake-Client,hv_time,hv_relaxed,hv_vapic,hv_spinlocks=0x1fff -m 2048 -realtime mlock=off -smp 2,sockets=2,cores=1,threads=1 -uuid 128589da-017e-412d-b807-92de81ca7a29 -display none -no-user-config -nodefaults -chardev socket,id=charmonitor,path=/var/lib/libvirt/qemu/domain-2-cn_windows_10_enterp/monitor.sock,server,nowait -mon chardev=charmonitor,id=monitor,mode=control -rtc base=localtime,driftfix=slew -global kvm-pit.lost_tick_policy=discard -no-hpet -no-shutdown -global PIIX4_PM.disable_s3=1 -global PIIX4_PM.disable_s4=1 -boot strict=on -device ich9-usb-ehci1,id=usb,bus=pci.0,addr=0x5.0x7 -device ich9-usb-uhci1,masterbus=usb.0,firstport=0,bus=pci.0,multifunction=on,addr=0x5 -device ich9-usb-uhci2,masterbus=usb.0,firstport=2,bus=pci.0,addr=0x5.0x1 -device ich9-usb-uhci3,masterbus=usb.0,firstport=4,bus=pci.0,addr=0x5.0x2 -drive file=/home/zwj/cn_windows_10_enterprise_version_1703_updated_july_2017_x64_dvd_10925390.qcow2,format=qcow2,if=none,id=drive-ide0-0-0 -device ide-hd,bus=ide.0,unit=0,drive=drive-ide0-0-0,id=ide0-0-0,bootindex=1 -netdev tap,fd=26,id=hostnet0 -device rtl8139,netdev=hostnet0,id=net0,mac=52:54:00:86:04:cc,bus=pci.0,addr=0x3 -chardev pty,id=charserial0 -device isa-serial,chardev=charserial0,id=serial0 -device usb-tablet,id=input0,bus=usb.0,port=1 -device vfio-pci,host=00:02.0,id=hostdev0,bus=pci.0,addr=0x2 -device virtio-balloon-pci,id=balloon0,bus=pci.0,addr=0x4 -bios /usr/share/seabios/bios.bin -chardev file,id=seabios,path=/tmp/bios.log -device isa-debugcon,iobase=0x402,chardev=seabios -set device.hostdev0.x-igd-opregion=on -set device.hostdev0.x-igd-gms=1 -msg timestamp=on dmesg has an error: [五 10月 12 17:34:21 2018] Console: switching to colour dummy device 80x25 [五 10月 12 17:34:21 2018] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem [五 10月 12 17:34:21 2018] virbr0: port 2(vnet0) entered blocking state [五 10月 12 17:34:21 2018] virbr0: port 2(vnet0) entered disabled state [五 10月 12 17:34:21 2018] device vnet0 entered promiscuous mode [五 10月 12 17:34:21 2018] virbr0: port 2(vnet0) entered blocking state [五 10月 12 17:34:21 2018] virbr0: port 2(vnet0) entered listening state [五 10月 12 17:34:22 2018] DMAR: DRHD: handling fault status reg 2 [五 10月 12 17:34:22 2018] DMAR: [DMA Write] Request device [00:02.0] fault addr 0 [fault reason 02] Present bit in context entry is clear [五 10月 12 17:34:22 2018] vfio_ecap_init: 0000:00:02.0 hiding ecap 0x1b 0x100 [五 10月 12 17:34:23 2018] virbr0: port 2(vnet0) entered learning state [五 10月 12 17:34:25 2018] virbr0: port 2(vnet0) entered forwarding state [五 10月 12 17:34:25 2018] virbr0: topology change detected, propagating Below is log of SeaBIOS, it stops at running rom: [root localhost ~]# cat /tmp/bios.log SeaBIOS (version 1.9.3-1.fc25) BUILD: gcc: (GCC) 6.1.1 20160621 (Red Hat Cross 6.1.1-2) binutils: version 2.26.1-1.fc25 RamSize: 0x80000000 [cmos] Relocating init from 0x000e4080 to 0x7ffb2320 (size 56384) Found QEMU fw_cfg QEMU fw_cfg DMA interface supported RamBlock: addr 0x0000000000000000 len 0x0000000080000000 [e820] Moving pm_base to 0x600 boot order: 1: /pci i0cf8/ide 1,1/drive 0/disk 0 2: HALT === PCI bus & bridge init === PCI: pci_bios_init_bus_rec bus = 0x0 === PCI device probing === Found 12 PCI devices (max PCI bus is 00) === PCI new allocation pass #1 === PCI: check devices === PCI new allocation pass #2 === PCI: IO: c000 - c1cf PCI: 32: 0000000080000000 - 00000000fec00000 PCI: map device bdf=00:03.0 bar 0, addr 0000c000, size 00000100 [io] PCI: map device bdf=00:02.0 bar 4, addr 0000c100, size 00000040 [io] PCI: map device bdf=00:04.0 bar 0, addr 0000c140, size 00000020 [io] PCI: map device bdf=00:05.0 bar 4, addr 0000c160, size 00000020 [io] PCI: map device bdf=00:05.1 bar 4, addr 0000c180, size 00000020 [io] PCI: map device bdf=00:05.2 bar 4, addr 0000c1a0, size 00000020 [io] PCI: map device bdf=00:01.1 bar 4, addr 0000c1c0, size 00000010 [io] PCI: map device bdf=00:02.0 bar 0, addr fd000000, size 01000000 [mem] PCI: map device bdf=00:03.0 bar 6, addr fe000000, size 00040000 [mem] PCI: map device bdf=00:02.0 bar 6, addr fe040000, size 00020000 [mem] PCI: map device bdf=00:03.0 bar 1, addr fe060000, size 00001000 [mem] PCI: map device bdf=00:05.7 bar 0, addr fe061000, size 00001000 [mem] PCI: map device bdf=00:02.0 bar 2, addr e0000000, size 10000000 [prefmem] PCI: map device bdf=00:04.0 bar 4, addr f0000000, size 00800000 [prefmem] PCI: init bdf=00:00.0 id=8086:1237 PCI: init bdf=00:01.0 id=8086:7000 PIIX3/PIIX4 init: elcr=00 0c PCI: init bdf=00:01.1 id=8086:7010 PCI: init bdf=00:01.3 id=8086:7113 Using pmtimer, ioport 0x608 PCI: init bdf=00:02.0 id=8086:1916 Intel IGD OpRegion enabled at 0x7fffe000, size 8KB, dev 00:02.0 Intel IGD BDSM enabled at 0x7d700000, size 40MB, dev 00:02.0 PCI: init bdf=00:03.0 id=10ec:8139 PCI: init bdf=00:04.0 id=1af4:1002 PCI: init bdf=00:05.0 id=8086:2934 PCI: init bdf=00:05.1 id=8086:2935 PCI: init bdf=00:05.2 id=8086:2936 PCI: init bdf=00:05.7 id=8086:293a PCI: init bdf=00:1f.0 id=8086:9d48 PCI: Using 00:02.0 for primary VGA handle_smp: apic_id=1 Found 2 cpu(s) max supported 2 cpu(s) Copying PIR from 0x7ffbfca0 to 0x000f1c40 Copying MPTABLE from 0x00006e90/7ffa8e80 to 0x000f1b10 Copying SMBIOS entry point from 0x00006e90 to 0x000f1930 Scan for VGA option rom Running option rom at c000:0003 Now seabios stops and monitor shows no signal. I have install win10 directly on the host and it works well. Does it means the vga rom image is ok? What can I do for further debug? Thanks!

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