SeaBIOS

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3774 discussions

Re: [SeaBIOS] Proper support for PCI-based option rom loading (was Re: [Qemu-devel] Re: qdev property bug?)
by Kevin O'Connor 16 Dec '09

16 Dec '09

On Mon, Dec 14, 2009 at 08:37:44PM -0600, Anthony Liguori wrote: > Okay, I think I've figured out how this is supposed to work. With these > two patches to SeaBIOS and the patch to qemu, I can run: I'm not sure why "Do not guard qemu shadow ram work around in CONFIG_OPTIONROMS_DEPLOYED" patch is needed. The code today is: if (CONFIG_OPTIONROMS_DEPLOYED) { int reg = pci_config_readb(bdf, 0x5a + i); if ((reg & 0x11) != 0x11) { // Need to copy optionroms to work around qemu implementation void *mem = (void*)(BUILD_ROM_START + i * 32*1024); memcpy((void*)BUILD_BIOS_TMP_ADDR, mem, 32*1024); pci_config_writeb(bdf, 0x5a + i, 0x33); memcpy(mem, (void*)BUILD_BIOS_TMP_ADDR, 32*1024); clear = 1; } else { pci_config_writeb(bdf, 0x5a + i, 0x33); } } else { pci_config_writeb(bdf, 0x5a + i, 0x33); } So, in the non CONFIG_OPTIONROMS_DEPLOYED case, SeaBIOS will just do the write enable call (pci_config_writeb(bdf, 0x5a + i, 0x33)). The CONFIG_OPTIONROMS_DEPLOYED case should just be to copy the roms qemu has deployed. If SeaBIOS is filling in the 0xc0000-0xf0000 space, it shouldn't matter if the contents of that space is lost during the write enable. Let me know if I've missed something. -Kevin

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Welcome to SeaBIOS
by Kevin O'Connor 13 Dec '09

13 Dec '09

Welcome to the SeaBIOS mailing list.

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[PATCH] Fix PkgLength calculation for the SSDT.
by Magnus Christensson 25 Nov '09

25 Nov '09

Signed-off-by: Magnus Christensson <mch(a)virtutech.com> --- src/acpi.c | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) diff --git a/src/acpi.c b/src/acpi.c index f613b03..244536a 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -429,10 +429,12 @@ build_ssdt(void) // build processor scope header *(ssdt_ptr++) = 0x10; // ScopeOp if (cpu_length <= 0x3e) { + /* Handle 1-4 CPUs with one byte encoding */ *(ssdt_ptr++) = cpu_length + 1; } else { - *(ssdt_ptr++) = 0x7F; - *(ssdt_ptr++) = (cpu_length + 2) >> 6; + /* Handle 5-314 CPUs with two byte encoding */ + *(ssdt_ptr++) = 0x40 | ((cpu_length + 2) & 0xf); + *(ssdt_ptr++) = (cpu_length + 2) >> 4; } *(ssdt_ptr++) = '_'; // Name *(ssdt_ptr++) = 'P'; -- 1.6.2.5 --------------010908080004080305080203--

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[PATCH 01/12] Read APIC version from APIC instead of using a hard-coded value.
by Magnus Christensson 23 Nov '09

23 Nov '09

Signed-off-by: Magnus Christensson <mch(a)virtutech.com> --- src/mptable.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/src/mptable.c b/src/mptable.c index f65bbeb..5357c03 100644 --- a/src/mptable.c +++ b/src/mptable.c @@ -36,6 +36,7 @@ mptable_init(void) // Detect cpu info u32 cpuid_signature, ebx, ecx, cpuid_features; cpuid(1, &cpuid_signature, &ebx, &ecx, &cpuid_features); + u8 apic_version = readl((u8*)BUILD_APIC_ADDR + 0x30) & 0xff; int pkgcpus = 1; if (cpuid_features & (1 << 28)) { /* Only populate the MPS tables with the first logical CPU in @@ -51,7 +52,7 @@ mptable_init(void) memset(cpu, 0, sizeof(*cpu)); cpu->type = MPT_TYPE_CPU; cpu->apicid = i; - cpu->apicver = 0x11; + cpu->apicver = apic_version; /* cpu flags: enabled, bootstrap cpu */ cpu->cpuflag = (i < CountCPUs) | ((i == 0) << 1); if (cpuid_signature) { -- 1.6.2.5 --------------020907050102080101050605--

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