SeaBIOS

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[PATCH] Replace CONFIG_THREAD_OPTIONROMS with a runtime config setting.
by Kevin O'Connor 07 Apr '14

07 Apr '14

Replace the CONFIG_THREAD_OPTIONROMS option with the CBFS (or fw_cfg) file "etc/threads". This allows for the "threads during optionrom" capability to be enabled/disabled without requiring SeaBIOS to be recompiled. A value of "2" in this file will enable threads to run during option rom execution. This change also allows for all threads to be disabled via the same runtime config file. Setting the file to a value of "0" will cause SeaBIOS to perform all hardware initialization serially. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/Kconfig | 11 ----------- src/post.c | 7 ++++--- src/stacks.c | 29 ++++++++++++++++++++++++----- src/stacks.h | 2 ++ 4 files changed, 30 insertions(+), 19 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index cce3ad8..a863866 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -46,17 +46,6 @@ endchoice default y help Support running hardware initialization in parallel. - config THREAD_OPTIONROMS - depends on THREADS && !CSM - bool "Hardware init during option ROM execution" - default n - help - Allow hardware init to run in parallel with optionrom execution. - - This can reduce boot time, but can cause some timing - variations during option ROM code execution. It is not - known if all option ROMs will behave properly with this - option. config RELOCATE_INIT bool "Copy init code to high memory" diff --git a/src/post.c b/src/post.c index b5cbdb8..5fc1968 100644 --- a/src/post.c +++ b/src/post.c @@ -122,6 +122,7 @@ interface_init(void) bda_init(); // Other interfaces + thread_init(); boot_init(); bios32_init(); pmm_init(); @@ -212,15 +213,15 @@ maininit(void) // Setup platform devices. platform_hardware_setup(); - // Start hardware initialization (if optionrom threading) - if (CONFIG_THREAD_OPTIONROMS) + // Start hardware initialization (if threads allowed during optionroms) + if (threads_during_optionroms()) device_hardware_setup(); // Run vga option rom vgarom_setup(); // Do hardware initialization (if running synchronously) - if (!CONFIG_THREAD_OPTIONROMS) { + if (!threads_during_optionroms()) { device_hardware_setup(); wait_threads(); } diff --git a/src/stacks.c b/src/stacks.c index de71c1d..6bcb319 100644 --- a/src/stacks.c +++ b/src/stacks.c @@ -10,6 +10,7 @@ #include "list.h" // hlist_node #include "malloc.h" // free #include "output.h" // dprintf +#include "romfile.h" // romfile_loadint #include "stacks.h" // struct mutex_s #include "util.h" // useRTC @@ -271,6 +272,24 @@ getCurThread(void) return (void*)ALIGN_DOWN(esp, THREADSTACKSIZE); } +static int ThreadControl; + +// Initialize the support for internal threads. +void +thread_init(void) +{ + if (! CONFIG_THREADS) + return; + ThreadControl = romfile_loadint("etc/threads", 1); +} + +// Should hardware initialization threads run during optionrom execution. +int +threads_during_optionroms(void) +{ + return CONFIG_THREADS && ThreadControl == 2; +} + // Switch to next thread stack. static void switch_next(struct thread_info *cur) @@ -309,7 +328,7 @@ void run_thread(void (*func)(void*), void *data) { ASSERT32FLAT(); - if (! CONFIG_THREADS) + if (! CONFIG_THREADS || ! ThreadControl) goto fail; struct thread_info *thread; thread = memalign_tmphigh(THREADSTACKSIZE, THREADSTACKSIZE); @@ -452,7 +471,7 @@ static u32 PreemptCount; void start_preempt(void) { - if (! CONFIG_THREAD_OPTIONROMS) + if (! threads_during_optionroms()) return; CanPreempt = 1; PreemptCount = 0; @@ -463,7 +482,7 @@ start_preempt(void) void finish_preempt(void) { - if (! CONFIG_THREAD_OPTIONROMS) { + if (! threads_during_optionroms()) { yield(); return; } @@ -477,7 +496,7 @@ finish_preempt(void) int wait_preempt(void) { - if (MODESEGMENT || !CONFIG_THREAD_OPTIONROMS || !CanPreempt + if (MODESEGMENT || !CONFIG_THREADS || !CanPreempt || getesp() < MAIN_STACK_MAX) return 0; while (CanPreempt) @@ -498,7 +517,7 @@ void check_preempt(void) { extern void _cfunc32flat_yield_preempt(void); - if (CONFIG_THREAD_OPTIONROMS && GET_GLOBAL(CanPreempt) && have_threads()) + if (CONFIG_THREADS && GET_GLOBAL(CanPreempt) && have_threads()) call32(_cfunc32flat_yield_preempt, 0, 0); } diff --git a/src/stacks.h b/src/stacks.h index 9fe8761..d8584f2 100644 --- a/src/stacks.h +++ b/src/stacks.h @@ -21,6 +21,8 @@ extern struct thread_info MainThread; struct thread_info *getCurThread(void); void yield(void); void yield_toirq(void); +void thread_init(void); +int threads_during_optionroms(void); void run_thread(void (*func)(void*), void *data); void wait_threads(void); struct mutex_s { u32 isLocked; }; -- 1.9.0

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[PATCH V2] hw/pci: reserve IO and mem for pci-2-pci bridges with no devices attached
by Marcel Apfelbaum 07 Apr '14

07 Apr '14

If a pci-2-pci bridge supports hot-plug functionality but there are no devices connected to it, reserve IO/mem in order to be able to attach devices later. Do not waste space, use minimum allowed. Signed-off-by: Marcel Apfelbaum <marcel.a(a)redhat.com> --- - Thanks Gerd Hoffmann for the review. v1 -> v2: - Addressed Michael S. Tsirkin's comments: - Limit capabilities query to 256 iterations, to make sure we don't get into an infinite loop with a broken device. src/fw/pciinit.c | 3 +++ src/hw/pci.c | 19 +++++++++++++++++++ src/hw/pci.h | 1 + 3 files changed, 23 insertions(+) diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index 64f1d41..9b5d7ad 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -677,12 +677,15 @@ static int pci_bios_check_devices(struct pci_bus *busses) continue; struct pci_bus *parent = &busses[pci_bdf_to_bus(s->bus_dev->bdf)]; int type; + u8 shpc_cap = pci_find_capability(s->bus_dev, PCI_CAP_ID_SHPC); for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) { u64 align = (type == PCI_REGION_TYPE_IO) ? PCI_BRIDGE_IO_MIN : PCI_BRIDGE_MEM_MIN; if (pci_region_align(&s->r[type]) > align) align = pci_region_align(&s->r[type]); u64 sum = pci_region_sum(&s->r[type]); + if (!sum && shpc_cap) + sum = align; /* reserve min size for hot-plug */ u64 size = ALIGN(sum, align); int is64 = pci_bios_bridge_region_is64(&s->r[type], s->bus_dev, type); diff --git a/src/hw/pci.c b/src/hw/pci.c index caf9265..055353d 100644 --- a/src/hw/pci.c +++ b/src/hw/pci.c @@ -225,6 +225,25 @@ pci_find_init_device(const struct pci_device_id *ids, void *arg) return NULL; } +u8 pci_find_capability(struct pci_device *pci, u8 cap_id) +{ + int i; + u8 cap; + u16 status = pci_config_readw(pci->bdf, PCI_STATUS); + + if (!(status & PCI_STATUS_CAP_LIST)) + return 0; + + for (i = 0, cap = pci_config_readb(pci->bdf, PCI_CAPABILITY_LIST); + (i <= 0xff) && cap; + i++, cap = pci_config_readb(pci->bdf, cap + PCI_CAP_LIST_NEXT)) + if (pci_config_readb(pci->bdf, cap + PCI_CAP_LIST_ID) == cap_id) + return cap; + + return 0; +} + + void pci_reboot(void) { diff --git a/src/hw/pci.h b/src/hw/pci.h index 167a027..e828225 100644 --- a/src/hw/pci.h +++ b/src/hw/pci.h @@ -116,6 +116,7 @@ int pci_init_device(const struct pci_device_id *ids , struct pci_device *pci, void *arg); struct pci_device *pci_find_init_device(const struct pci_device_id *ids , void *arg); +u8 pci_find_capability(struct pci_device *pci, u8 cap_id); void pci_reboot(void); #endif -- 1.8.3.1

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[PATCH 2/2] vgabios: Initial support for coreboot native vga vgabios.
by Kevin O'Connor 07 Apr '14

07 Apr '14

Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- Makefile | 3 +- vgasrc/Kconfig | 10 ++- vgasrc/cbvga.c | 189 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ vgasrc/cbvga.h | 20 ++++++ vgasrc/vgabios.h | 2 + vgasrc/vgafb.c | 4 +- vgasrc/vgahw.h | 27 ++++++++ 7 files changed, 251 insertions(+), 4 deletions(-) create mode 100644 vgasrc/cbvga.c create mode 100644 vgasrc/cbvga.h diff --git a/Makefile b/Makefile index 488bd04..e567ba1 100644 --- a/Makefile +++ b/Makefile @@ -204,7 +204,8 @@ SRCVGA=src/output.c src/string.c src/hw/pci.c src/hw/serialio.c \ vgasrc/vgainit.c vgasrc/vgabios.c vgasrc/vgafb.c \ vgasrc/vgafonts.c vgasrc/vbe.c \ vgasrc/stdvga.c vgasrc/stdvgamodes.c vgasrc/stdvgaio.c \ - vgasrc/clext.c vgasrc/bochsvga.c vgasrc/geodevga.c + vgasrc/clext.c vgasrc/bochsvga.c vgasrc/geodevga.c \ + src/fw/coreboot.c vgasrc/cbvga.c CFLAGS16VGA = $(CFLAGS16INC) -Isrc diff --git a/vgasrc/Kconfig b/vgasrc/Kconfig index f04fca7..951240c 100644 --- a/vgasrc/Kconfig +++ b/vgasrc/Kconfig @@ -46,6 +46,14 @@ menu "VGA ROM" select VGA_STDVGA_PORTS help Build support for Geode LX vga. + + config VGA_COREBOOT + depends on COREBOOT + bool "coreboot linear framebuffer" + help + Build support for a vgabios wrapper around video + devices initialized using coreboot native vga init. + endchoice choice @@ -98,7 +106,7 @@ menu "VGA ROM" Support VBE. config VGA_PCI - depends on BUILD_VGABIOS + depends on BUILD_VGABIOS && !VGA_COREBOOT bool "PCI ROM Headers" default y help diff --git a/vgasrc/cbvga.c b/vgasrc/cbvga.c new file mode 100644 index 0000000..a9c6d3a --- /dev/null +++ b/vgasrc/cbvga.c @@ -0,0 +1,189 @@ +// Simple framebuffer vgabios for use with coreboot native vga init. +// +// Copyright (C) 2014 Kevin O'Connor <kevin(a)koconnor.net> +// +// This file may be distributed under the terms of the GNU LGPLv3 license. + +#include "biosvar.h" // GET_BDA +#include "cbvga.h" // cbvga_setup +#include "output.h" // dprintf +#include "stdvga.h" // SEG_CTEXT +#include "string.h" // memset16_far +#include "util.h" // find_cb_table +#include "vgabios.h" // VGAREG_* + +static int CBmode VAR16; +static struct vgamode_s CBmodeinfo VAR16; +static u32 CBlinelength VAR16; + +struct vgamode_s *cbvga_find_mode(int mode) +{ + if (mode == GET_GLOBAL(CBmode)) + return &CBmodeinfo; + return NULL; +} + +void +cbvga_list_modes(u16 seg, u16 *dest, u16 *last) +{ + if (dest<last) { + SET_FARVAR(seg, *dest, GET_GLOBAL(CBmode)); + dest++; + } + SET_FARVAR(seg, *dest, 0xffff); +} + +int +cbvga_get_window(struct vgamode_s *vmode_g, int window) +{ + return -1; +} + +int +cbvga_set_window(struct vgamode_s *vmode_g, int window, int val) +{ + return -1; +} + +int +cbvga_get_linelength(struct vgamode_s *vmode_g) +{ + return GET_GLOBAL(CBlinelength); +} + +int +cbvga_set_linelength(struct vgamode_s *vmode_g, int val) +{ + return -1; +} + +int +cbvga_get_displaystart(struct vgamode_s *vmode_g) +{ + return 0; +} + +int +cbvga_set_displaystart(struct vgamode_s *vmode_g, int val) +{ + return -1; +} + +int +cbvga_get_dacformat(struct vgamode_s *vmode_g) +{ + return -1; +} + +int +cbvga_set_dacformat(struct vgamode_s *vmode_g, int val) +{ + return -1; +} + +int +cbvga_save_restore(int cmd, u16 seg, void *data) +{ + if (cmd & (SR_HARDWARE|SR_DAC|SR_REGISTERS)) + return -1; + return bda_save_restore(cmd, seg, data); +} + +int +cbvga_set_mode(struct vgamode_s *vmode_g, int flags) +{ + if (!(flags & MF_NOCLEARMEM)) { + if (GET_GLOBAL(CBmodeinfo.memmodel) == MM_TEXT) { + memset16_far(SEG_CTEXT, (void*)0, 0x0720, 80*25*2); + return 0; + } + struct gfx_op op; + init_gfx_op(&op, vmode_g); + op.x = op.y = 0; + op.xlen = GET_GLOBAL(CBmodeinfo.width); + op.ylen = GET_GLOBAL(CBmodeinfo.height); + op.op = GO_MEMSET; + handle_gfx_op(&op); + } + return 0; +} + +#define CB_TAG_FRAMEBUFFER 0x0012 +struct cb_framebuffer { + u32 tag; + u32 size; + + u64 physical_address; + u32 x_resolution; + u32 y_resolution; + u32 bytes_per_line; + u8 bits_per_pixel; + u8 red_mask_pos; + u8 red_mask_size; + u8 green_mask_pos; + u8 green_mask_size; + u8 blue_mask_pos; + u8 blue_mask_size; + u8 reserved_mask_pos; + u8 reserved_mask_size; +}; + +int +cbvga_setup(void) +{ + dprintf(1, "coreboot vga init\n"); + + if (GET_GLOBAL(HaveRunInit)) + return 0; + + struct cb_header *cbh = find_cb_table(); + if (!cbh) { + dprintf(1, "Unable to find coreboot table\n"); + return -1; + } + struct cb_framebuffer *cbfb = find_cb_subtable(cbh, CB_TAG_FRAMEBUFFER); + if (!cbfb) { + // Assume there is an EGA text framebuffer. + dprintf(1, "Did not find coreboot framebuffer - assuming EGA text\n"); + SET_VGA(CBmode, 0x03); + SET_VGA(CBlinelength, 80*2); + SET_VGA(CBmodeinfo.memmodel, MM_TEXT); + SET_VGA(CBmodeinfo.width, 80); + SET_VGA(CBmodeinfo.height, 25); + SET_VGA(CBmodeinfo.depth, 4); + SET_VGA(CBmodeinfo.cwidth, 9); + SET_VGA(CBmodeinfo.cheight, 16); + SET_VGA(CBmodeinfo.sstart, SEG_CTEXT); + return 0; + } + + u64 addr = GET_FARVAR(0, cbfb->physical_address); + u8 bpp = GET_FARVAR(0, cbfb->bits_per_pixel); + u32 xlines = GET_FARVAR(0, cbfb->x_resolution); + u32 ylines = GET_FARVAR(0, cbfb->y_resolution); + u32 linelength = GET_FARVAR(0, cbfb->bytes_per_line); + dprintf(1, "Found FB @ %llx %dx%d with %d bpp (%d stride)\n" + , addr, xlines, ylines, bpp, linelength); + + if (!addr || addr > 0xffffffff + || (bpp != 15 && bpp != 16 && bpp != 24 && bpp != 32)) { + dprintf(1, "Unable to use FB\n"); + return -1; + } + + SET_VGA(CBmode, 0x140); + SET_VGA(VBE_framebuffer, addr); + SET_VGA(VBE_total_memory, linelength * ylines); + SET_VGA(CBlinelength, linelength); + SET_VGA(CBmodeinfo.memmodel, MM_DIRECT); + SET_VGA(CBmodeinfo.width, xlines); + SET_VGA(CBmodeinfo.height, ylines); + SET_VGA(CBmodeinfo.depth, bpp); + SET_VGA(CBmodeinfo.cwidth, 8); + SET_VGA(CBmodeinfo.cheight, 16); + + // Setup BDA and clear screen. + vga_set_mode(GET_GLOBAL(CBmode), 0); + + return 0; +} diff --git a/vgasrc/cbvga.h b/vgasrc/cbvga.h new file mode 100644 index 0000000..fb892c8 --- /dev/null +++ b/vgasrc/cbvga.h @@ -0,0 +1,20 @@ +#ifndef __CBVGA_H +#define __CBVGA_H + +#include "types.h" // u16 + +struct vgamode_s *cbvga_find_mode(int mode); +void cbvga_list_modes(u16 seg, u16 *dest, u16 *last); +int cbvga_get_window(struct vgamode_s *vmode_g, int window); +int cbvga_set_window(struct vgamode_s *vmode_g, int window, int val); +int cbvga_get_linelength(struct vgamode_s *vmode_g); +int cbvga_set_linelength(struct vgamode_s *vmode_g, int val); +int cbvga_get_displaystart(struct vgamode_s *vmode_g); +int cbvga_set_displaystart(struct vgamode_s *vmode_g, int val); +int cbvga_get_dacformat(struct vgamode_s *vmode_g); +int cbvga_set_dacformat(struct vgamode_s *vmode_g, int val); +int cbvga_save_restore(int cmd, u16 seg, void *data); +int cbvga_set_mode(struct vgamode_s *vmode_g, int flags); +int cbvga_setup(void); + +#endif // cbvga.h diff --git a/vgasrc/vgabios.h b/vgasrc/vgabios.h index 8fe65d4..02cf3e3 100644 --- a/vgasrc/vgabios.h +++ b/vgasrc/vgabios.h @@ -106,6 +106,8 @@ struct vgamode_s *get_current_mode(void); int vga_set_mode(int mode, int flags); // vgafb.c +void init_gfx_op(struct gfx_op *op, struct vgamode_s *vmode_g); +void handle_gfx_op(struct gfx_op *op); void *text_address(struct cursorpos cp); void vgafb_move_chars(struct vgamode_s *vmode_g, struct cursorpos dest , struct cursorpos src, struct cursorpos movesize); diff --git a/vgasrc/vgafb.c b/vgasrc/vgafb.c index b90a956..fdc525d 100644 --- a/vgasrc/vgafb.c +++ b/vgasrc/vgafb.c @@ -292,7 +292,7 @@ gfx_direct(struct gfx_op *op) ****************************************************************/ // Prepare a struct gfx_op for use. -static void +void init_gfx_op(struct gfx_op *op, struct vgamode_s *vmode_g) { memset(op, 0, sizeof(*op)); @@ -302,7 +302,7 @@ init_gfx_op(struct gfx_op *op, struct vgamode_s *vmode_g) } // Issue a graphics operation. -static void +void handle_gfx_op(struct gfx_op *op) { switch (GET_GLOBAL(op->vmode_g->memmodel)) { diff --git a/vgasrc/vgahw.h b/vgasrc/vgahw.h index 3e84357..39f818a 100644 --- a/vgasrc/vgahw.h +++ b/vgasrc/vgahw.h @@ -4,6 +4,7 @@ #include "types.h" // u8 #include "config.h" // CONFIG_* +#include "cbvga.h" // cbvga_setup #include "clext.h" // clext_set_mode #include "bochsvga.h" // bochsvga_set_mode #include "stdvga.h" // stdvga_set_mode @@ -14,6 +15,8 @@ static inline struct vgamode_s *vgahw_find_mode(int mode) { return clext_find_mode(mode); if (CONFIG_VGA_BOCHS) return bochsvga_find_mode(mode); + if (CONFIG_VGA_COREBOOT) + return cbvga_find_mode(mode); return stdvga_find_mode(mode); } @@ -22,6 +25,8 @@ static inline int vgahw_set_mode(struct vgamode_s *vmode_g, int flags) { return clext_set_mode(vmode_g, flags); if (CONFIG_VGA_BOCHS) return bochsvga_set_mode(vmode_g, flags); + if (CONFIG_VGA_COREBOOT) + return cbvga_set_mode(vmode_g, flags); return stdvga_set_mode(vmode_g, flags); } @@ -30,6 +35,8 @@ static inline void vgahw_list_modes(u16 seg, u16 *dest, u16 *last) { clext_list_modes(seg, dest, last); else if (CONFIG_VGA_BOCHS) bochsvga_list_modes(seg, dest, last); + else if (CONFIG_VGA_COREBOOT) + cbvga_list_modes(seg, dest, last); else stdvga_list_modes(seg, dest, last); } @@ -41,6 +48,8 @@ static inline int vgahw_setup(void) { return bochsvga_setup(); if (CONFIG_VGA_GEODEGX2 || CONFIG_VGA_GEODELX) return geodevga_setup(); + if (CONFIG_VGA_COREBOOT) + return cbvga_setup(); return stdvga_setup(); } @@ -49,6 +58,8 @@ static inline int vgahw_get_window(struct vgamode_s *vmode_g, int window) { return clext_get_window(vmode_g, window); if (CONFIG_VGA_BOCHS) return bochsvga_get_window(vmode_g, window); + if (CONFIG_VGA_COREBOOT) + return cbvga_get_window(vmode_g, window); return stdvga_get_window(vmode_g, window); } @@ -58,6 +69,8 @@ static inline int vgahw_set_window(struct vgamode_s *vmode_g, int window return clext_set_window(vmode_g, window, val); if (CONFIG_VGA_BOCHS) return bochsvga_set_window(vmode_g, window, val); + if (CONFIG_VGA_COREBOOT) + return cbvga_set_window(vmode_g, window, val); return stdvga_set_window(vmode_g, window, val); } @@ -66,6 +79,8 @@ static inline int vgahw_get_linelength(struct vgamode_s *vmode_g) { return clext_get_linelength(vmode_g); if (CONFIG_VGA_BOCHS) return bochsvga_get_linelength(vmode_g); + if (CONFIG_VGA_COREBOOT) + return cbvga_get_linelength(vmode_g); return stdvga_get_linelength(vmode_g); } @@ -74,6 +89,8 @@ static inline int vgahw_set_linelength(struct vgamode_s *vmode_g, int val) { return clext_set_linelength(vmode_g, val); if (CONFIG_VGA_BOCHS) return bochsvga_set_linelength(vmode_g, val); + if (CONFIG_VGA_COREBOOT) + return cbvga_set_linelength(vmode_g, val); return stdvga_set_linelength(vmode_g, val); } @@ -82,6 +99,8 @@ static inline int vgahw_get_displaystart(struct vgamode_s *vmode_g) { return clext_get_displaystart(vmode_g); if (CONFIG_VGA_BOCHS) return bochsvga_get_displaystart(vmode_g); + if (CONFIG_VGA_COREBOOT) + return cbvga_get_displaystart(vmode_g); return stdvga_get_displaystart(vmode_g); } @@ -90,18 +109,24 @@ static inline int vgahw_set_displaystart(struct vgamode_s *vmode_g, int val) { return clext_set_displaystart(vmode_g, val); if (CONFIG_VGA_BOCHS) return bochsvga_set_displaystart(vmode_g, val); + if (CONFIG_VGA_COREBOOT) + return cbvga_set_displaystart(vmode_g, val); return stdvga_set_displaystart(vmode_g, val); } static inline int vgahw_get_dacformat(struct vgamode_s *vmode_g) { if (CONFIG_VGA_BOCHS) return bochsvga_get_dacformat(vmode_g); + if (CONFIG_VGA_COREBOOT) + return cbvga_get_dacformat(vmode_g); return stdvga_get_dacformat(vmode_g); } static inline int vgahw_set_dacformat(struct vgamode_s *vmode_g, int val) { if (CONFIG_VGA_BOCHS) return bochsvga_set_dacformat(vmode_g, val); + if (CONFIG_VGA_COREBOOT) + return cbvga_set_dacformat(vmode_g, val); return stdvga_set_dacformat(vmode_g, val); } @@ -110,6 +135,8 @@ static inline int vgahw_save_restore(int cmd, u16 seg, void *data) { return clext_save_restore(cmd, seg, data); if (CONFIG_VGA_BOCHS) return bochsvga_save_restore(cmd, seg, data); + if (CONFIG_VGA_COREBOOT) + return cbvga_save_restore(cmd, seg, data); return stdvga_save_restore(cmd, seg, data); } -- 1.9.0

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[PATCH 1/2] coreboot: Make coreboot table searching available to other code.
by Kevin O'Connor 07 Apr '14

07 Apr '14

Make the coreboot table searching code available to code outside coreboot.c, and make it runnable from 16bit mode. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/fw/coreboot.c | 58 +++++++++++++++++++++++++++++++++---------------------- src/util.h | 3 +++ 2 files changed, 38 insertions(+), 23 deletions(-) diff --git a/src/fw/coreboot.c b/src/fw/coreboot.c index 34ad8fd..9de01c2 100644 --- a/src/fw/coreboot.c +++ b/src/fw/coreboot.c @@ -92,11 +92,12 @@ ipchksum(char *buf, int count) u16 *p = (u16*)buf; u32 sum = 0; while (count > 1) { - sum += *p++; + sum += GET_FARVAR(0, *p); + p++; count -= 2; } if (count) - sum += *(u8*)p; + sum += GET_FARVAR(0, *(u8*)p); sum = (sum >> 16) + (sum & 0xffff); sum += (sum >> 16); return ~sum; @@ -104,19 +105,20 @@ ipchksum(char *buf, int count) // Try to locate the coreboot header in a given address range. static struct cb_header * -find_cb_header(char *addr, int len) +find_cb_header(u32 addr, int len) { - char *end = addr + len; + u32 end = addr + len; for (; addr < end; addr += 16) { - struct cb_header *cbh = (struct cb_header *)addr; - if (cbh->signature != CB_SIGNATURE) + struct cb_header *cbh = (void*)addr; + if (GET_FARVAR(0, cbh->signature) != CB_SIGNATURE) continue; - if (! cbh->table_bytes) + u32 tsize = GET_FARVAR(0, cbh->table_bytes); + if (! tsize) continue; - if (ipchksum(addr, sizeof(*cbh)) != 0) + if (ipchksum((void*)addr, sizeof(*cbh)) != 0) continue; - if (ipchksum(addr + sizeof(*cbh), cbh->table_bytes) - != cbh->table_checksum) + if (ipchksum((void*)addr + sizeof(*cbh), tsize) + != GET_FARVAR(0, cbh->table_checksum)) continue; return cbh; } @@ -124,20 +126,37 @@ find_cb_header(char *addr, int len) } // Try to find the coreboot memory table in the given coreboot table. -static void * +void * find_cb_subtable(struct cb_header *cbh, u32 tag) { char *tbl = (char *)cbh + sizeof(*cbh); + u32 count = GET_FARVAR(0, cbh->table_entries); int i; - for (i=0; i<cbh->table_entries; i++) { - struct cb_memory *cbm = (struct cb_memory *)tbl; - tbl += cbm->size; - if (cbm->tag == tag) + for (i=0; i<count; i++) { + struct cb_memory *cbm = (void*)tbl; + tbl += GET_FARVAR(0, cbm->size); + if (GET_FARVAR(0, cbm->tag) == tag) return cbm; } return NULL; } +struct cb_header * +find_cb_table(void) +{ + struct cb_header *cbh = find_cb_header(0, 0x1000); + if (!cbh) + return NULL; + struct cb_forward *cbf = find_cb_subtable(cbh, CB_TAG_FORWARD); + if (cbf) { + dprintf(3, "Found coreboot table forwarder.\n"); + cbh = find_cb_header(GET_FARVAR(0, cbf->forward), 0x100); + if (!cbh) + return NULL; + } + return cbh; +} + static struct cb_memory *CBMemTable; const char *CBvendor = "", *CBpart = ""; @@ -151,16 +170,9 @@ coreboot_preinit(void) dprintf(3, "Attempting to find coreboot table\n"); // Find coreboot table. - struct cb_header *cbh = find_cb_header(0, 0x1000); + struct cb_header *cbh = find_cb_table(); if (!cbh) goto fail; - struct cb_forward *cbf = find_cb_subtable(cbh, CB_TAG_FORWARD); - if (cbf) { - dprintf(3, "Found coreboot table forwarder.\n"); - cbh = find_cb_header((char *)((u32)cbf->forward), 0x100); - if (!cbh) - goto fail; - } dprintf(3, "Now attempting to find coreboot memory map\n"); struct cb_memory *cbm = CBMemTable = find_cb_subtable(cbh, CB_TAG_MEMORY); if (!cbm) diff --git a/src/util.h b/src/util.h index b8acbfa..c2e49cf 100644 --- a/src/util.h +++ b/src/util.h @@ -84,6 +84,9 @@ void coreboot_platform_setup(void); void cbfs_payload_setup(void); void coreboot_preinit(void); void coreboot_cbfs_init(void); +struct cb_header; +void *find_cb_subtable(struct cb_header *cbh, u32 tag); +struct cb_header *find_cb_table(void); // fw/csm.c int csm_bootprio_fdc(struct pci_device *pci, int port, int fdid); -- 1.9.0

1 0

[PATCH] usb: Only disable HID devices if both USB_MOUSE and USB_KEYBOARD are off.
by Kevin O'Connor 05 Apr '14

05 Apr '14

Fix typo in code causing both CONFIG_USB_MOUSE and CONFIG_USB_KEYBOARD to be effectively disabled if either is disabled. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/hw/usb-hid.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/hw/usb-hid.c b/src/hw/usb-hid.c index e94aa16..13f134c 100644 --- a/src/hw/usb-hid.c +++ b/src/hw/usb-hid.c @@ -109,7 +109,7 @@ usb_mouse_setup(struct usbdevice_s *usbdev int usb_hid_setup(struct usbdevice_s *usbdev) { - if (! CONFIG_USB_KEYBOARD || ! CONFIG_USB_MOUSE) + if (! CONFIG_USB_KEYBOARD && ! CONFIG_USB_MOUSE) return -1; dprintf(2, "usb_hid_setup %p\n", usbdev->defpipe); -- 1.9.0

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Re: [SeaBIOS] Compiling SeaBios
by Kevin O'Connor 24 Mar '14

24 Mar '14

On Sun, Mar 23, 2014 at 12:04:32PM +0200, Michael S. Tsirkin wrote: > On Sat, Mar 22, 2014 at 07:35:53AM +0000, Jeff wrote: > > Hello, > > > > Can someone tells me if the compilation went well? I'm worried about: > > > > out/src/fw/ssdt-pcihp.dsl.i 45: Return (PCEJ(_SUN)) > > Warning 3104 - Reserved method should not return a value ^ (_EJ0) > > Yes, it's ok - it's a new warning produced by recent iasl versions in the ssdt. > We moved the ACPI to QEMU so the seabios versions isn't actively > maintained. > But it's easy to fix so maybe the below should be applied. > Or maybe it's better not to touch it ... If it's an obvious bug fix, it's probably better to fix it. Could you send to the mailing list? -Kevin > > > Note: lightly tested with a linux guest only. > > ---> > acpi: fix up iasl warning > > out/src/fw/ssdt-pcihp.dsl.i 45: Return (PCEJ(_SUN)) > Warning 3104 - Reserved method should not return a value ^ (_EJ0) > > Signed-off-by: Michael S. Tsirkin <mst(a)redhat.com> > > --- > > diff --git a/src/fw/ssdt-pcihp.dsl b/src/fw/ssdt-pcihp.dsl > index 67e485f..cb24c11 100644 > --- a/src/fw/ssdt-pcihp.dsl > +++ b/src/fw/ssdt-pcihp.dsl > @@ -29,7 +29,7 @@ DefinitionBlock ("ssdt-pcihp.aml", "SSDT", 0x01, "BXPC", "BXSSDTPCIHP", 0x1) > Name(_ADR, 0xAA0000) > ACPI_EXTRACT_METHOD_STRING ssdt_pcihp_ej0 > Method(_EJ0, 1) { > - Return (PCEJ(_SUN)) > + PCEJ(_SUN) > } > } > }

1 0

Compiling SeaBios
by Jeff 23 Mar '14

23 Mar '14

Hello, Can someone tells me if the compilation went well? I'm worried about: out/src/fw/ssdt-pcihp.dsl.i 45: Return (PCEJ(_SUN)) Warning 3104 - Reserved method should not return a value ^ (_EJ0) Here is the full text: ----------------------------------------------------------- Script started on jeu. 20 mars 2014 19:55:29 UTC Build default config # # configuration written to /home/ubuntu/seabios1.7.4/.config # Build Kconfig config file Compile checking out/src/misc.o Compile checking out/src/stacks.o Compile checking out/src/output.o Compile checking out/src/string.o Compile checking out/src/x86.o Compile checking out/src/block.o Compile checking out/src/cdrom.o Compile checking out/src/mouse.o Compile checking out/src/kbd.o Compile checking out/src/serial.o Compile checking out/src/clock.o Compile checking out/src/resume.o Compile checking out/src/pnpbios.o Compile checking out/src/vgahooks.o Compile checking out/src/pcibios.o Compile checking out/src/apm.o Compile checking out/src/fw/smp.o Compile checking out/src/hw/pci.o Compile checking out/src/hw/timer.o Compile checking out/src/hw/rtc.o Compile checking out/src/hw/dma.o Compile checking out/src/hw/pic.o Compile checking out/src/hw/ps2port.o Compile checking out/src/hw/serialio.o Compile checking out/src/hw/usb.o Compile checking out/src/hw/usb-uhci.o Compile checking out/src/hw/usb-ohci.o Compile checking out/src/hw/usb-ehci.o Compile checking out/src/hw/usb-xhci.o Compile checking out/src/hw/usb-hid.o Compile checking out/src/hw/usb-msc.o Compile checking out/src/hw/usb-uas.o Compile checking out/src/hw/blockcmd.o Compile checking out/src/hw/floppy.o Compile checking out/src/hw/ata.o Compile checking out/src/hw/ramdisk.o Compile checking out/src/hw/virtio-ring.o Compile checking out/src/hw/virtio-pci.o Compile checking out/src/hw/virtio-blk.o Compile checking out/src/hw/virtio-scsi.o Compile checking out/src/hw/lsi-scsi.o Compile checking out/src/hw/esp-scsi.o Compile checking out/src/hw/megasas.o Compile checking out/src/hw/pvscsi.o Compile checking out/src/post.o Compile checking out/src/memmap.o Compile checking out/src/malloc.o Compile checking out/src/pmm.o Compile checking out/src/romfile.o Compile checking out/src/optionroms.o Compile checking out/src/boot.o Compile checking out/src/bootsplash.o Compile checking out/src/jpeg.o Compile checking out/src/bmp.o Compile checking out/src/hw/ahci.o Compile checking out/src/hw/usb-hub.o Compile checking out/src/fw/coreboot.o Compile checking out/src/fw/lzmadecode.o Compile checking out/src/fw/csm.o Compile checking out/src/fw/biostables.o Compile checking out/src/fw/paravirt.o Compile checking out/src/fw/shadow.o Compile checking out/src/fw/pciinit.o Compile checking out/src/fw/smm.o Compile checking out/src/fw/mtrr.o Compile checking out/src/fw/xen.o Compiling IASL out/src/fw/acpi-dsdt.hex ASL Input: out/src/fw/acpi-dsdt.dsl.i - 475 lines, 19178 bytes, 316 keywords AML Output: out/src/fw/acpi-dsdt.aml - 4407 bytes, 159 named objects, 157 executable opcodes Listing File: out/src/fw/acpi-dsdt.lst - 143267 bytes Hex Dump: out/src/fw/acpi-dsdt.hex - 41661 bytes Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 246 Optimizations Compiling IASL out/src/fw/ssdt-proc.hex ASL Input: out/src/fw/ssdt-proc.dsl.i - 35 lines, 762 bytes, 8 keywords AML Output: out/src/fw/ssdt-proc.aml - 120 bytes, 6 named objects, 2 executable opcodes Listing File: out/src/fw/ssdt-proc.lst - 2651 bytes Hex Dump: out/src/fw/ssdt-proc.hex - 1459 bytes Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 0 Optimizations Compiling IASL out/src/fw/ssdt-pcihp.hex out/src/fw/ssdt-pcihp.dsl.i 45: Return (PCEJ(_SUN)) Warning 3104 - Reserved method should not return a value ^ (_EJ0) ASL Input: out/src/fw/ssdt-pcihp.dsl.i - 51 lines, 782 bytes, 6 keywords AML Output: out/src/fw/ssdt-pcihp.aml - 88 bytes, 5 named objects, 1 executable opcodes Listing File: out/src/fw/ssdt-pcihp.lst - 2706 bytes Hex Dump: out/src/fw/ssdt-pcihp.hex - 1160 bytes Compilation complete. 0 Errors, 1 Warnings, 0 Remarks, 0 Optimizations Compiling IASL out/src/fw/ssdt-misc.hex ASL Input: out/src/fw/ssdt-misc.dsl.i - 127 lines, 2593 bytes, 35 keywords AML Output: out/src/fw/ssdt-misc.aml - 354 bytes, 24 named objects, 11 executable opcodes Listing File: out/src/fw/ssdt-misc.lst - 7656 bytes Hex Dump: out/src/fw/ssdt-misc.hex - 3710 bytes Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 2 Optimizations Compiling IASL out/src/fw/q35-acpi-dsdt.hex ASL Input: out/src/fw/q35-acpi-dsdt.dsl.i - 514 lines, 28284 bytes, 413 keywords AML Output: out/src/fw/q35-acpi-dsdt.aml - 7344 bytes, 239 named objects, 174 executable opcodes Listing File: out/src/fw/q35-acpi-dsdt.lst - 255960 bytes Hex Dump: out/src/fw/q35-acpi-dsdt.hex - 69190 bytes Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 445 Optimizations Compile checking out/src/fw/acpi.o Compile checking out/src/fw/mptable.o Compile checking out/src/fw/pirtable.o Compile checking out/src/fw/smbios.o Compile checking out/src/fw/romfile_loader.o Compiling whole program out/ccode32flat.o Compiling whole program out/code32seg.o Compile checking out/src/system.o Compile checking out/src/disk.o Compile checking out/src/font.o Compiling whole program out/ccode16.o Compiling to assembler out/src/asm-offsets.s Generating offset file out/asm-offsets.h Compiling (16bit) out/romlayout.o Building ld scripts Version: 1.7.4-20140320_195558-ubuntu Fixed space: 0xe05b-0x10000 total: 8101 slack: 13 Percent slack: 0.2% 16bit size: 38148 32bit segmented size: 1446 32bit flat size: 21376 32bit flat init size: 70784 Lowmem size: 2160 f-segment var size: 1750 Linking out/rom16.o Stripping out/rom16.strip.o Linking out/rom32seg.o Stripping out/rom32seg.strip.o Linking out/rom.o Prepping out/bios.bin.prep Total size: 138872 Fixed: 62728 Free: 123272 (used 53.0% of 256KiB rom) Creating out/bios.bin Script done on jeu. 20 mars 2014 19:55:59 UTC ------------------------------------------------------------------------------------------ Thanks a lot in advance. Jeff.

2 1

[PATCH 1/2] init_virtio_blk, init_virtio_scsi: reset HBA on error
by Eric Northup 20 Mar '14

20 Mar '14

Extend commit 5f2d17d35b2339526f3b3d580b279ea78e406a25: reset on all error paths, and also for virtio_blk not just virtio_scsi. Signed-off-by: Eric Northup <digitaleric(a)google.com> --- src/hw/virtio-blk.c | 1 + src/hw/virtio-scsi.c | 5 ++--- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/hw/virtio-blk.c b/src/hw/virtio-blk.c index 7b22bf5..e2dbd3c 100644 --- a/src/hw/virtio-blk.c +++ b/src/hw/virtio-blk.c @@ -153,6 +153,7 @@ init_virtio_blk(struct pci_device *pci) return; fail: + vp_reset(ioaddr); free(vdrive->vq); free(vdrive); } diff --git a/src/hw/virtio-scsi.c b/src/hw/virtio-scsi.c index 48fb3e1..8f96687 100644 --- a/src/hw/virtio-scsi.c +++ b/src/hw/virtio-scsi.c @@ -158,14 +158,13 @@ init_virtio_scsi(struct pci_device *pci) for (tot = 0, i = 0; i < 256; i++) tot += virtio_scsi_scan_target(pci, ioaddr, vq, i); - if (!tot) { - vp_reset(ioaddr); + if (!tot) goto fail; - } return; fail: + vp_reset(ioaddr); free(vq); } -- 1.9.0.279.gdc9e3eb

3 3

Re: [SeaBIOS] [PATCH] smbios: Default all values to zero.
by Kevin O'Connor 20 Mar '14

20 Mar '14

On Tue, Mar 11, 2014 at 11:49:29AM -0400, Kevin O'Connor wrote: > Make sure to initialize the entire smbios area to zero so that any > field not explicitly initialized does not have random values. (It was > found that the memory_error_information_handle field in smbios_type_17 > was not being set.) FYI, I have pushed this patch to the master repo. -Kevin

1 0

Re: [SeaBIOS] [Qemu-devel] [ANNOUNCE] QEMU 2.0.0-rc0 is now available
by Andreas Färber 18 Mar '14

18 Mar '14

Hi, Am 14.03.2014 04:19, schrieb Anthony Liguori: > On behalf of the QEMU Team, I'd like to announce the availability of the > first release candidate for the QEMU 2.0 release. This release is meant > for testing purposes and should not be used in a production environment. > > http://wiki.qemu.org/download/qemu-2.0.0-rc0.tar.bz2 I've run into an issue with the SeaBIOS submodule included in the QEMU tarball: The SeaBIOS scripts/buildversion.sh script looks for a .git directory or file and, if absent, goes on to look for a .version file, neither of which the QEMU tarball ships. That means it will fall back to "?" as version, whereas the binary blob contributed by Gerd displays "rel-1.7.4-0-g96917a8". Should our tarball workflow include generating a roms/seabios/.version file based on git-describe in that directory to fix this mismatch? Thanks, Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

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