June 2019 - SeaBIOS - mail.coreboot.org

[PATCH] csm: Sanitise alignment constraint in Legacy16GetTableAddress

by David Woodhouse

The alignment constraint is defined in the CSM specifications as "Bit mapped. First non-zero bit from the right is the alignment." Use __fls() to sanitise the alignment given that definition, since passing a non-power-of-two alignment to _malloc() isn't going to work well. And cope with being passed zero, which was happening for the E820 table allocation from EDK2. Signed-off-by: David Woodhouse <dwmw2(a)infradead.org> --- src/fw/csm.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/fw/csm.c b/src/fw/csm.c index 03b4bb8..bf7b8f5 100644 --- a/src/fw/csm.c +++ b/src/fw/csm.c @@ -264,6 +264,13 @@ handle_csm_0006(struct bregs *regs) dprintf(3, "Legacy16GetTableAddress size %x align %x region %d\n", size, align, region); + // DX = Required address alignment. Bit mapped. + // First non-zero bit from the right is the alignment.*/ + if (align) + align = 1 << __ffs(align); + else + align = 1; + if (region & 2) chunk = _malloc(&ZoneLow, size, align); if (!chunk && (region & 1))

8 months, 1 week

2
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[QEMU] [PATCH v2 0/8] Add Qemu to SeaBIOS LCHS interface

by Sam Eiderman

v1: Non-standard logical geometries break under QEMU. A virtual disk which contains an operating system which depends on logical geometries (consistent values being reported from BIOS INT13 AH=08) will most likely break under QEMU/SeaBIOS if it has non-standard logical geometries - for example 56 SPT (sectors per track). No matter what QEMU will guess - SeaBIOS, for large enough disks - will use LBA translation, which will report 63 SPT instead. In addition we can not enforce SeaBIOS to rely on phyiscal geometries at all. A virtio-blk-pci virtual disk with 255 phyiscal heads can not report more than 16 physical heads when moved to an IDE controller, the ATA spec allows a maximum of 16 heads - this is an artifact of virtualization. By supplying the logical geometies directly we are able to support such "exotic" disks. We will use fw_cfg to do just that. v2: Fix missing parenthesis check in "hd-geo-test: Add tests for lchs override" Sam Eiderman (8): block: Refactor macros - fix tabbing block: Support providing LCHS from user bootdevice: Add interface to gather LCHS scsi: Propagate unrealize() callback to scsi-hd bootdevice: Gather LCHS from all relevant devices bootdevice: Refactor get_boot_devices_list bootdevice: FW_CFG interface for LCHS values hd-geo-test: Add tests for lchs override bootdevice.c | 158 ++++++++++--- hw/block/virtio-blk.c | 6 + hw/ide/qdev.c | 7 +- hw/nvram/fw_cfg.c | 14 +- hw/scsi/scsi-bus.c | 15 ++ hw/scsi/scsi-disk.c | 14 ++ include/hw/block/block.h | 22 +- include/hw/scsi/scsi.h | 1 + include/sysemu/sysemu.h | 4 + tests/Makefile.include | 2 +- tests/hd-geo-test.c | 565 +++++++++++++++++++++++++++++++++++++++++++++++ 11 files changed, 767 insertions(+), 41 deletions(-) -- 2.13.3

8 months, 1 week

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[QEMU] [PATCH v3 0/8] Add Qemu to SeaBIOS LCHS interface

by Sam Eiderman

v1: Non-standard logical geometries break under QEMU. A virtual disk which contains an operating system which depends on logical geometries (consistent values being reported from BIOS INT13 AH=08) will most likely break under QEMU/SeaBIOS if it has non-standard logical geometries - for example 56 SPT (sectors per track). No matter what QEMU will guess - SeaBIOS, for large enough disks - will use LBA translation, which will report 63 SPT instead. In addition we can not enforce SeaBIOS to rely on phyiscal geometries at all. A virtio-blk-pci virtual disk with 255 phyiscal heads can not report more than 16 physical heads when moved to an IDE controller, the ATA spec allows a maximum of 16 heads - this is an artifact of virtualization. By supplying the logical geometies directly we are able to support such "exotic" disks. We will use fw_cfg to do just that. v2: Fix missing parenthesis check in "hd-geo-test: Add tests for lchs override" v3: * Rename fw_cfg key to "bios-geometry". * Remove "extendible" interface. * Add cpu_to_le32 fix as Laszlo suggested or big endian hosts * Fix last qtest commit - automatic docker tester for some reason does not have qemu-img set Sam Eiderman (8): block: Refactor macros - fix tabbing block: Support providing LCHS from user bootdevice: Add interface to gather LCHS scsi: Propagate unrealize() callback to scsi-hd bootdevice: Gather LCHS from all relevant devices bootdevice: Refactor get_boot_devices_list bootdevice: FW_CFG interface for LCHS values hd-geo-test: Add tests for lchs override bootdevice.c | 154 ++++++++++--- hw/block/virtio-blk.c | 6 + hw/ide/qdev.c | 7 +- hw/nvram/fw_cfg.c | 14 +- hw/scsi/scsi-bus.c | 15 ++ hw/scsi/scsi-disk.c | 14 ++ include/hw/block/block.h | 22 +- include/hw/scsi/scsi.h | 1 + include/sysemu/sysemu.h | 4 + tests/Makefile.include | 2 +- tests/hd-geo-test.c | 566 +++++++++++++++++++++++++++++++++++++++++++++++ 11 files changed, 764 insertions(+), 41 deletions(-) -- 2.13.3

8 months, 1 week

1
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[PATCH v2 0/5] Add Qemu to SeaBIOS LCHS interface

by Sam Eiderman

v1: Non-standard logical geometries break under QEMU. A virtual disk which contains an operating system which depends on logical geometries (consistent values being reported from BIOS INT13 AH=08) will most likely break under QEMU/SeaBIOS if it has non-standard logical geometries - for example 56 SPT (sectors per track). No matter what QEMU will guess - SeaBIOS, for large enough disks - will use LBA translation, which will report 63 SPT instead. In addition we can not enforce SeaBIOS to rely on phyiscal geometries at all. A virtio-blk-pci virtual disk with 255 phyiscal heads can not report more than 16 physical heads when moved to an IDE controller, the ATA spec allows a maximum of 16 heads - this is an artifact of virtualization. By supplying the logical geometies directly we are able to support such "exotic" disks. We will use fw_cfg to do just that. v2: Rename bootdevices fw_cfg key to bios-geoemtry Sam Eiderman (5): geometry: Read LCHS from fw_cfg boot: Reorder functions in boot.c geometry: Add boot_lchs_find_*() utility functions config: Add toggle for bootdevice information geometry: Apply LCHS values for boot devices src/Kconfig | 7 ++ src/block.c | 21 ++++- src/block.h | 1 + src/boot.c | 244 +++++++++++++++++++++++++++++++++++++++++---------- src/hw/ahci.c | 1 + src/hw/ata.c | 8 ++ src/hw/esp-scsi.c | 2 + src/hw/lsi-scsi.c | 2 + src/hw/megasas.c | 1 + src/hw/mpt-scsi.c | 2 + src/hw/pvscsi.c | 1 + src/hw/virtio-blk.c | 2 + src/hw/virtio-scsi.c | 2 + src/util.h | 6 ++ 14 files changed, 254 insertions(+), 46 deletions(-) -- 2.13.3

8 months, 1 week

1
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BUG: Seabios choose the wrong option rom when two are available

by akjuxr3＠dismail.de

In this thread https://mail.coreboot.org/hyperkitty/list/coreboot@coreboot.org/thread/FT... we found a bug in seabios. Its choosing the wrong option rom in the case when for example on a Intel G41 board you have the internal Intel GPU and have added a external PCIe GPU. Then coreboot switches over to the external GPU for the graphical output but seabios use the option rom for the Intel G41 GPU. In case of x4x/G41 this results in no ability to have a graphical boot mode and thus its not possible to boot some linux live images. In the linked thread a workaround is been found: "In the "Devices" menu of coreboot, set "Graphics initialization" to "None" ". This breaks the functionality to have coreboot output with the internal GPU when you pull out the PCIe GPU. The switch should happen automaticly and without the need to recompile/reconfigure coreboot. Changes like https://review.coreboot.org/c/coreboot/+/18504 was made to make this happen. Would be great if this seabios issue could be fixes. Thanks!

8 months, 1 week

2
1
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[QEMU] [PATCH 0/8] Add Qemu to SeaBIOS LCHS interface

by Sam Eiderman

Non-standard logical geometries break under QEMU. A virtual disk which contains an operating system which depends on logical geometries (consistent values being reported from BIOS INT13 AH=08) will most likely break under QEMU/SeaBIOS if it has non-standard logical geometries - for example 56 SPT (sectors per track). No matter what QEMU will guess - SeaBIOS, for large enough disks - will use LBA translation, which will report 63 SPT instead. In addition we can not enforce SeaBIOS to rely on phyiscal geometries at all. A virtio-blk-pci virtual disk with 255 phyiscal heads can not report more than 16 physical heads when moved to an IDE controller, the ATA spec allows a maximum of 16 heads - this is an artifact of virtualization. By supplying the logical geometies directly we are able to support such "exotic" disks. We will use fw_cfg to do just that. Sam Eiderman (8): block: Refactor macros - fix tabbing block: Support providing LCHS from user bootdevice: Add interface to gather LCHS scsi: Propagate unrealize() callback to scsi-hd bootdevice: Gather LCHS from all relevant devices bootdevice: Refactor get_boot_devices_list bootdevice: FW_CFG interface for LCHS values hd-geo-test: Add tests for lchs override bootdevice.c | 158 ++++++++++--- hw/block/virtio-blk.c | 6 + hw/ide/qdev.c | 7 +- hw/nvram/fw_cfg.c | 14 +- hw/scsi/scsi-bus.c | 15 ++ hw/scsi/scsi-disk.c | 14 ++ include/hw/block/block.h | 22 +- include/hw/scsi/scsi.h | 1 + include/sysemu/sysemu.h | 4 + tests/Makefile.include | 2 +- tests/hd-geo-test.c | 565 +++++++++++++++++++++++++++++++++++++++++++++++ 11 files changed, 767 insertions(+), 41 deletions(-) -- 2.13.3

8 months, 1 week

2
10
0 0

[PATCH 0/5] Add Qemu to SeaBIOS LCHS interface

by Sam Eiderman

Non-standard logical geometries break under QEMU. A virtual disk which contains an operating system which depends on logical geometries (consistent values being reported from BIOS INT13 AH=08) will most likely break under QEMU/SeaBIOS if it has non-standard logical geometries - for example 56 SPT (sectors per track). No matter what QEMU will guess - SeaBIOS, for large enough disks - will use LBA translation, which will report 63 SPT instead. In addition we can not enforce SeaBIOS to rely on phyiscal geometries at all. A virtio-blk-pci virtual disk with 255 phyiscal heads can not report more than 16 physical heads when moved to an IDE controller, the ATA spec allows a maximum of 16 heads - this is an artifact of virtualization. By supplying the logical geometies directly we are able to support such "exotic" disks. We will use fw_cfg to do just that. Sam Eiderman (5): geometry: Read LCHS from fw_cfg boot: Reorder functions in boot.c geometry: Add boot_lchs_find_*() utility functions config: Add toggle for bootdevice information geometry: Apply LCHS values for boot devices src/Kconfig | 7 ++ src/block.c | 21 +++- src/block.h | 1 + src/boot.c | 272 ++++++++++++++++++++++++++++++++++++++++++--------- src/hw/ahci.c | 1 + src/hw/ata.c | 8 ++ src/hw/esp-scsi.c | 2 + src/hw/lsi-scsi.c | 2 + src/hw/megasas.c | 1 + src/hw/mpt-scsi.c | 2 + src/hw/pvscsi.c | 1 + src/hw/virtio-blk.c | 2 + src/hw/virtio-scsi.c | 2 + src/util.h | 6 ++ 14 files changed, 282 insertions(+), 46 deletions(-) -- 2.13.3

8 months, 2 weeks

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[PATCH 1/2] pciinit: Use %pP shorthand for printing device ids in intel_igd_setup()

by Kevin O'Connor

The hardcoded device names can cause false-positives on Windows bios version checks. Use the %pP format to avoid that. Reported-by: Sam Eiderman <shmuel.eiderman(a)oracle.com> Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/fw/pciinit.c | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-) diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index c0634bc..d5e87f0 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -292,12 +292,10 @@ static void intel_igd_setup(struct pci_device *dev, void *arg) { struct romfile_s *opregion = romfile_find("etc/igd-opregion"); u64 bdsm_size = le64_to_cpu(romfile_loadint("etc/igd-bdsm-size", 0)); - void *addr; - u16 bdf = dev->bdf; /* Apply OpRegion to any Intel VGA device, more than one is undefined */ if (opregion && opregion->size) { - addr = memalign_high(PAGE_SIZE, opregion->size); + void *addr = memalign_high(PAGE_SIZE, opregion->size); if (!addr) { warn_noalloc(); return; @@ -308,16 +306,15 @@ static void intel_igd_setup(struct pci_device *dev, void *arg) return; } - pci_config_writel(bdf, 0xFC, cpu_to_le32((u32)addr)); + pci_config_writel(dev->bdf, 0xFC, cpu_to_le32((u32)addr)); - dprintf(1, "Intel IGD OpRegion enabled at 0x%08x, size %dKB, dev " - "%02x:%02x.%x\n", (u32)addr, opregion->size >> 10, - pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf), pci_bdf_to_fn(bdf)); + dprintf(1, "Intel IGD OpRegion enabled at 0x%08x, size %dKB, dev %pP\n" + , (u32)addr, opregion->size >> 10, dev); } /* Apply BDSM only to Intel VGA at 00:02.0 */ - if (bdsm_size && (bdf == pci_to_bdf(0, 2, 0))) { - addr = memalign_tmphigh(1024 * 1024, bdsm_size); + if (bdsm_size && (dev->bdf == pci_to_bdf(0, 2, 0))) { + void *addr = memalign_tmphigh(1024 * 1024, bdsm_size); if (!addr) { warn_noalloc(); return; @@ -325,10 +322,10 @@ static void intel_igd_setup(struct pci_device *dev, void *arg) e820_add((u32)addr, bdsm_size, E820_RESERVED); - pci_config_writel(bdf, 0x5C, cpu_to_le32((u32)addr)); + pci_config_writel(dev->bdf, 0x5C, cpu_to_le32((u32)addr)); - dprintf(1, "Intel IGD BDSM enabled at 0x%08x, size %lldMB, dev " - "00:02.0\n", (u32)addr, bdsm_size >> 20); + dprintf(1, "Intel IGD BDSM enabled at 0x%08x, size %lldMB, dev %pP\n" + , (u32)addr, bdsm_size >> 20, dev); } } -- 2.17.2

8 months, 2 weeks

2
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[PATCH] Support booting USB drives with a write protect switch enabled

by Mike Banon

At least some USB drives with a write protect switch (e.g. Netac U335) could report "MEDIUM NOT PRESENT" for a while if a write protect is enabled. Do not stop the initialization attempts after getting this, and the initialization will be successful - likely on a 2nd attempt. Signed-off-by: Mike Banon <mikebdp2 at gmail.com> --- Note: see a seabios.log at the attachments for a relevant part of SeaBIOS boot log with this patch applied and Netac U335 drive ("USB MSC Drive Netac OnlyDisk 1100") with a write protect switch enabled plugged into AMD Lenovo G505S coreboot'ed laptop. --- diff --git a/src/hw/blockcmd.c b/src/hw/blockcmd.c index 1f15081..109a8e4 100644 --- a/src/hw/blockcmd.c +++ b/src/hw/blockcmd.c @@ -168,7 +168,6 @@ scsi_is_ready(struct disk_op_s *op) // Sense succeeded. if (sense.asc == 0x3a) { /* MEDIUM NOT PRESENT */ dprintf(1, "Device reports MEDIUM NOT PRESENT\n"); - return -1; } if (sense.asc == 0x04 && sense.ascq == 0x01 && !in_progress) {

8 months, 2 weeks

2
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SeaBIOS June 2019