SeaBIOS September 2017

seabios@seabios.org

9 participants
16 discussions

Re: [SeaBIOS] [PATCH RESEND v7 0/3] Red Hat PCI bridge resource reserve capability
by Kevin O'Connor 14 Sep '17

14 Sep '17

On Thu, Sep 14, 2017 at 11:15:43AM +0300, Aleksandr Bezzubikov wrote: > 2017-09-10 22:40 GMT+03:00 Marcel Apfelbaum <marcel(a)redhat.com>: > > On 10/09/2017 21:34, Aleksandr Bezzubikov wrote: > >> And what about this series? The matching QEMU series has been applied, > >> that's why there should be no problems with picking this series up for > >> SeaBIOS > >> > > > > Hi Aleksandr, > > > > Since SeaBIOS is a different project, we need to monitor the QEMU > > patches by ourselves and only then ask the maintainer to merge the > > patches if he has no objections, of course. (no automated process) > > > > Can you please verify the series still applies to SeaBIOS AS IS > > and run a quick test against today's QEMU master branch? > > Can you please give Kevin your OK before he proceeds with the merge? > > Just did it, it's sitll OK and works fine. That's why this series can > be merged AS IS. Thanks. I committed this series. (I did prune some spurious trailing newlines during the commit). -Kevin

1 0

[PATCH v2 0/6] add serial console support
by Gerd Hoffmann 14 Sep '17

14 Sep '17

This patch series adds serial console support to seabios. Patches 1-3 add some bits the serial console patch depends on. Patch 4 adds the actual serial console support, for both primary display mode and splitmode (running in parallel to a vga display). The recommended way to activate the serial console is "qemu -machine graphics=no". Patch 5 adds support for a cbfs config file, to make the iobase configurable. Patch 6 is just for testing convenience and will not be merged. It makes the seabios serial console a drop-in replacement for sgabios, i.e. it is possible to activate it using "qemu -device sga". Gerd Hoffmann (6): std: add cp437 to unicode map kbd: make enqueue_key public, add ascii_to_keycode paravirt: read QEMU_CFG_NOGRAPHIC, store in etc/sercon-enable romfile add serial console support add support for etc/sercon-iobase cbfs file [hack] ignore sgabios, enable sercon instead Makefile | 3 +- src/config.h | 1 - src/cp437.h | 1 + src/util.h | 5 + src/clock.c | 1 + src/cp437.c | 275 ++++++++++++++++++++++ src/fw/paravirt.c | 2 + src/kbd.c | 18 +- src/misc.c | 8 - src/optionroms.c | 28 ++- src/sercon.c | 668 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ src/Kconfig | 5 + src/romlayout.S | 50 +++- 13 files changed, 1052 insertions(+), 13 deletions(-) create mode 100644 src/cp437.h create mode 100644 src/cp437.c create mode 100644 src/sercon.c -- 2.9.3

2 8

Re: [SeaBIOS] [PATCH RESEND v7 0/3] Red Hat PCI bridge resource reserve capability
by Marcel Apfelbaum 14 Sep '17

14 Sep '17

On 10/09/2017 21:34, Aleksandr Bezzubikov wrote: > > пт, 18 авг. 2017 г. в 2:33, Aleksandr Bezzubikov <zuban32s(a)gmail.com > <mailto:zuban32s@gmail.com>>: > > Now PCI bridges get a bus range number on a system init, > basing on currently plugged devices. That's why when one wants to > hotplug another bridge, > it needs his child bus, which the parent is unable to provide > (speaking about virtual device). > The suggested workaround is to have vendor-specific capability in > Red Hat PCI bridges > that contains number of additional bus to reserve (as well as > IO/MEM/PREF space limit hints) > on BIOS PCI init. > So this capability is intended only for pure QEMU->SeaBIOS usage. > > Considering all aforesaid, this series is directly connected with > QEMU series "Generic PCIE-PCI Bridge". > > Although the new PCI capability is supposed to contain various > limits along with > bus number to reserve, now only its full layout is proposed. And > only bus_reserve field is used in QEMU and BIOS. Limits usage > is still a subject for implementation as now > the main goal of this series to provide necessary support from the > firmware side to PCIE-PCI bridge hotplug. > > Changes v6->v7: > 0. Resend - fix a bug with incorrect subordinate bus default value. > 1. Do not use alignment in case of IO reservation cap usage. > 2. Log additional buses reservation events. > > Changes v5->v6: > 1. Remove unnecessary indents and line breaks (addresses Marcel's > comments) > 2. Count IO/MEM/PREF region size as a maximum of necessary size and > one provide in > RESOURCE_RESERVE capability (addresses Marcel's comment). > 3. Make the cap debug message more detailed (addresses Marcel's > comment). > 4. Change pref_32 and pref_64 cap fields comment. > > Changes v4->v5: > 1. Rename capability-related #defines > 2. Move capability IO/MEM/PREF fields values usage to the regions > creation stage (addresses Marcel's comment) > 3. The capability layout change: separate pref_mem into pref_mem_32 > and pref_mem_64 fields (QEMU side has the same changes) (addresses > Laszlo's comment) > 4. Extract the capability lookup and check to the separate function > (addresses Marcel's comment) > - despite of Marcel's comment do not extract field check > for -1 since it increases code length > and doesn't look nice because of different field types > 5. Fix the capability's comment (addresses Marcel's comment) > 6. Fix the 3rd patch message > > Changes v3->v4: > 1. Use all QEMU PCI capability fields - addresses Michael's comment > 2. Changes of the capability layout (QEMU side has the same changes): > - change reservation fields types: bus_res - uint32_t, > others - uint64_t > - interpret -1 value as 'ignore' > > Changes v2->v3: > 1. Merge commit 2 (Red Hat vendor ID) into commit 4 - addresses > Marcel's comment, > and add Generic PCIE Root Port device ID - addresses > Michael's comment. > 2. Changes of the capability layout (QEMU side has the same changes): > - add 'type' field to distinguish multiple > RedHat-specific capabilities - addresses Michael's > comment > - do not mimiс PCI Config space register layout, but use > mutually exclusive differently > sized fields for IO and prefetchable memory limits > - addresses Laszlo's comment > - use defines instead of structure and offsetof - addresses > Michael's comment > 3. Interpret 'bus_reserve' field as a minimum necessary > range to reserve - addresses Gerd's comment > 4. pci_find_capability moved to pci.c - addresses Kevin's comment > 5. Move capability layout header to src/fw/dev-pci.h - addresses > Kevin's comment > 6. Add the capability documentation - addresses Michael's comment > 7. Add capability length and bus_reserve field sanity checks - > addresses Michael's comment > > Changes v1->v2: > 1. New #define for Red Hat vendor added (addresses Konrad's comment). > 2. Refactored pci_find_capability function (addresses Marcel's comment). > 3. Capability reworked: > - data type added; > - reserve space in a structure for IO, memory and > prefetchable memory limits. > > > Aleksandr Bezzubikov (3): > pci: refactor pci_find_capapibilty to get bdf as the first argument > instead of the whole pci_device > pci: add QEMU-specific PCI capability structure > pci: enable RedHat PCI bridges to reserve additional resources on PCI > init > > src/fw/dev-pci.h | 53 ++++++++++++++++++++++++++ > src/fw/pciinit.c | 108 > +++++++++++++++++++++++++++++++++++++++++++++++++--- > src/hw/pci.c | 25 ++++++++++++ > src/hw/pci.h | 1 + > src/hw/pci_ids.h | 3 ++ > src/hw/pcidevice.c | 24 ------------ > src/hw/pcidevice.h | 1 - > src/hw/virtio-pci.c | 6 +-- > 8 files changed, 188 insertions(+), 33 deletions(-) > create mode 100644 src/fw/dev-pci.h > > -- > 2.7.4 > > > And what about this series? The matching QEMU series has been applied, > that's why there should be no problems with picking this series up for > SeaBIOS > Hi Aleksandr, Since SeaBIOS is a different project, we need to monitor the QEMU patches by ourselves and only then ask the maintainer to merge the patches if he has no objections, of course. (no automated process) Can you please verify the series still applies to SeaBIOS AS IS and run a quick test against today's QEMU master branch? Can you please give Kevin your OK before he proceeds with the merge? Thanks, Marcel > > -- > Aleksandr Bezzubikov

2 1

[PATCH 0/6] add serial console support
by Gerd Hoffmann 13 Sep '17

13 Sep '17

This patch series adds serial console support to seabios. Patches 1-3 add some bits the serial console patch depends on. Patch 4 adds the actual serial console support, where the serial console can be used in case no display adapter is present. Patch 5 is the most tricky one and implements splitmode, i.e. the serial console and vga console are active at the same time, output shows up on both serial and vga, input is accepted from both serial and keyboard. The recommended way to activate the serial console is "qemu -machine graphics=no". Patch 6 is just for testing convenience and will not be merged. It makes the seabios serial console a drop-in replacement for sgabios, i.e. it is possible to activate it using "qemu -device sga". Gerd Hoffmann (6): std: add cp437 to unicode map kbd: make enqueue_key public, add ascii_to_keycode paravirt: read QEMU_CFG_NOGRAPHIC, store in etc/sercon-enable romfile add serial console support sercon: split-output implementation [hack] ignore sgabios, enable sercon instead Makefile | 3 +- src/cp437.h | 1 + src/util.h | 5 + src/clock.c | 1 + src/cp437.c | 275 ++++++++++++++++++++++ src/fw/paravirt.c | 2 + src/kbd.c | 18 +- src/misc.c | 2 + src/optionroms.c | 17 +- src/sercon.c | 668 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ src/Kconfig | 5 + src/romlayout.S | 46 ++++ 12 files changed, 1039 insertions(+), 4 deletions(-) create mode 100644 src/cp437.h create mode 100644 src/cp437.c create mode 100644 src/sercon.c -- 2.9.3

2 21

[PATCH RESEND v7 0/3] Red Hat PCI bridge resource reserve capability
by Aleksandr Bezzubikov 10 Sep '17

10 Sep '17

Now PCI bridges get a bus range number on a system init, basing on currently plugged devices. That's why when one wants to hotplug another bridge, it needs his child bus, which the parent is unable to provide (speaking about virtual device). The suggested workaround is to have vendor-specific capability in Red Hat PCI bridges that contains number of additional bus to reserve (as well as IO/MEM/PREF space limit hints) on BIOS PCI init. So this capability is intended only for pure QEMU->SeaBIOS usage. Considering all aforesaid, this series is directly connected with QEMU series "Generic PCIE-PCI Bridge". Although the new PCI capability is supposed to contain various limits along with bus number to reserve, now only its full layout is proposed. And only bus_reserve field is used in QEMU and BIOS. Limits usage is still a subject for implementation as now the main goal of this series to provide necessary support from the firmware side to PCIE-PCI bridge hotplug. Changes v6->v7: 0. Resend - fix a bug with incorrect subordinate bus default value. 1. Do not use alignment in case of IO reservation cap usage. 2. Log additional buses reservation events. Changes v5->v6: 1. Remove unnecessary indents and line breaks (addresses Marcel's comments) 2. Count IO/MEM/PREF region size as a maximum of necessary size and one provide in RESOURCE_RESERVE capability (addresses Marcel's comment). 3. Make the cap debug message more detailed (addresses Marcel's comment). 4. Change pref_32 and pref_64 cap fields comment. Changes v4->v5: 1. Rename capability-related #defines 2. Move capability IO/MEM/PREF fields values usage to the regions creation stage (addresses Marcel's comment) 3. The capability layout change: separate pref_mem into pref_mem_32 and pref_mem_64 fields (QEMU side has the same changes) (addresses Laszlo's comment) 4. Extract the capability lookup and check to the separate function (addresses Marcel's comment) - despite of Marcel's comment do not extract field check for -1 since it increases code length and doesn't look nice because of different field types 5. Fix the capability's comment (addresses Marcel's comment) 6. Fix the 3rd patch message Changes v3->v4: 1. Use all QEMU PCI capability fields - addresses Michael's comment 2. Changes of the capability layout (QEMU side has the same changes): - change reservation fields types: bus_res - uint32_t, others - uint64_t - interpret -1 value as 'ignore' Changes v2->v3: 1. Merge commit 2 (Red Hat vendor ID) into commit 4 - addresses Marcel's comment, and add Generic PCIE Root Port device ID - addresses Michael's comment. 2. Changes of the capability layout (QEMU side has the same changes): - add 'type' field to distinguish multiple RedHat-specific capabilities - addresses Michael's comment - do not mimiс PCI Config space register layout, but use mutually exclusive differently sized fields for IO and prefetchable memory limits - addresses Laszlo's comment - use defines instead of structure and offsetof - addresses Michael's comment 3. Interpret 'bus_reserve' field as a minimum necessary range to reserve - addresses Gerd's comment 4. pci_find_capability moved to pci.c - addresses Kevin's comment 5. Move capability layout header to src/fw/dev-pci.h - addresses Kevin's comment 6. Add the capability documentation - addresses Michael's comment 7. Add capability length and bus_reserve field sanity checks - addresses Michael's comment Changes v1->v2: 1. New #define for Red Hat vendor added (addresses Konrad's comment). 2. Refactored pci_find_capability function (addresses Marcel's comment). 3. Capability reworked: - data type added; - reserve space in a structure for IO, memory and prefetchable memory limits. Aleksandr Bezzubikov (3): pci: refactor pci_find_capapibilty to get bdf as the first argument instead of the whole pci_device pci: add QEMU-specific PCI capability structure pci: enable RedHat PCI bridges to reserve additional resources on PCI init src/fw/dev-pci.h | 53 ++++++++++++++++++++++++++ src/fw/pciinit.c | 108 +++++++++++++++++++++++++++++++++++++++++++++++++--- src/hw/pci.c | 25 ++++++++++++ src/hw/pci.h | 1 + src/hw/pci_ids.h | 3 ++ src/hw/pcidevice.c | 24 ------------ src/hw/pcidevice.h | 1 - src/hw/virtio-pci.c | 6 +-- 8 files changed, 188 insertions(+), 33 deletions(-) create mode 100644 src/fw/dev-pci.h -- 2.7.4

1 4

[PATCH 0/3] SeaVGABIOS serial console test
by Kevin O'Connor 05 Sep '17

05 Sep '17

Hi Gerd, I was curious to see what the "sercon" stuff would look like in SeaVGABIOS instead of in SeaBIOS. So, I put together a quick prototype. The code is also at: https://github.com/KevinOConnor/seabios/tree/testing This is just a proof-of-concept thing - I didn't implement any of the useful features you have in your series. Specifically, it doesn't unclutter the serial output, doesn't implement cp437 translations, and doesn't handle multi-byte input. It does does have basic input, output, and split-output handling though. I'm not sure if this is better than a SeaBIOS implementation. I suspect it will be easier to handle vga quirks this way. However, handling exotic serial outputs (eg, mmio and usb based) would be better suited in SeaBIOS. Thoughts? -Kevin Kevin O'Connor (3): sercon: Initial support for VGA emulation over serial port sercon: Add basic keyboard input support sercon: Support "split output" mode Makefile | 2 +- vgasrc/Kconfig | 6 + vgasrc/sercon.c | 356 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ vgasrc/vgabios.c | 15 ++- vgasrc/vgabios.h | 5 + vgasrc/vgaentry.S | 7 ++ vgasrc/vgahw.h | 72 ++++++++++- vgasrc/vgainit.c | 12 +- vgasrc/vgautil.h | 24 ++++ 9 files changed, 482 insertions(+), 17 deletions(-) create mode 100644 vgasrc/sercon.c -- 2.5.5

2 12

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

SeaBIOS September 2017