May 2016 - SeaBIOS - mail.coreboot.org

hw/usb-xhci: Remove unused const variables
by Paul Menzel May 13, 2016

May 13, 2016

Date: Fri, 13 May 2016 07:03:36 +0200 Subject: [PATCH 1/2] hw/usb-xhci: Remove unused const variables Remove the unused arrays `eptype_to_xhci_in` and `eptype_to_xhci_out` to fix the GCC 6 warnings below. ``` $ gcc-6 --version gcc-6 (Debian 6.1.1-3) 6.1.1 20160511 […] $ make CC=gcc-6 […] Compile checking out/src/hw/usb-xhci.o […] src/hw/usb-xhci.c:296:18: warning: 'eptype_to_xhci_out' defined but not used [-Wunused-const-variable=] static const int eptype_to_xhci_out[] = { ^~~~~~~~~~~~~~~~~~ src/hw/usb-xhci.c:289:18: warning: 'eptype_to_xhci_in' defined but not used [-Wunused-const-variable=] static const int eptype_to_xhci_in[] = { ``` Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/hw/usb-xhci.c | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/src/hw/usb-xhci.c b/src/hw/usb-xhci.c index 5e2f071..69954b9 100644 --- a/src/hw/usb-xhci.c +++ b/src/hw/usb-xhci.c @@ -286,20 +286,6 @@ static const int speed_to_xhci[] = { [ USB_SUPERSPEED ] = 4, }; -static const int eptype_to_xhci_in[] = { - [ USB_ENDPOINT_XFER_CONTROL] = 4, - [ USB_ENDPOINT_XFER_ISOC ] = 5, - [ USB_ENDPOINT_XFER_BULK ] = 6, - [ USB_ENDPOINT_XFER_INT ] = 7, -}; - -static const int eptype_to_xhci_out[] = { - [ USB_ENDPOINT_XFER_CONTROL] = 4, - [ USB_ENDPOINT_XFER_ISOC ] = 1, - [ USB_ENDPOINT_XFER_BULK ] = 2, - [ USB_ENDPOINT_XFER_INT ] = 3, -}; - static int wait_bit(u32 *reg, u32 mask, int value, u32 timeout) { u32 end = timer_calc(timeout); -- 2.8.1

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[PATCH 0/4] support booting more than 255 CPUs with QEMU
by Igor Mammedov May 12, 2016

May 12, 2016

Changelog: since RFC: * move out max-cpus check out of mptable_setup() * factor out CPU counting/apic ID detection in separate function * return back accidentially deleted debug message with APIC ID * drop unused code in smp_setup() According to SDM, if CPUs have APIC ID more than 254 firmware should pass control to OS in x2APIC mode. This series adds x2APIC bootstrap initialization. QEMU side of x2APIC support: https://lists.gnu.org/archive/html/qemu-devel/2016-05/msg01094.html Igor Mammedov (3): paravirt: disable legacy bios tables in case of more than 255 CPUs support booting with more than 255 CPUs cleanup smp_setup() Kevin O'Connor (1): smp: refactor present CPU APIC ID detection and counting src/fw/paravirt.c | 6 +++-- src/fw/smp.c | 67 ++++++++++++++++++++++++++++++++++++++++--------------- src/x86.h | 1 + 3 files changed, 54 insertions(+), 20 deletions(-) -- 1.8.3.1

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[RFC PATCH v4] fw/pci: Add support for mapping Intel IGD via QEMU
by Alex Williamson May 11, 2016

May 11, 2016

QEMU provides two fw_cfg files to support IGD. The first holds the OpRegion data which holds the Video BIOS Table (VBT). This needs to be copied into reserved memory and the address stored in the ASL Storage register of the device at 0xFC offset in PCI config space. The OpRegion is generally 8KB. This file is named "etc/igd-opregion". The second file tells us the required size of the stolen memory space for the device. This is a dummy file, it has no backing so we only allocate the space without copying anything into it. This space requires 1MB alignment and is generally either 1MB or 2MB, depending on the hardware config. If the user has opted in QEMU to expose additional stolen memory beyond the GTT (GGMS), the GMS may add an additional 32MB to 512MB. The base address of the reserved memory allocated for this is written back to the Base Data of Stolen Memory register (BDSM) at PCI config offset 0x5C on the device. This file is named "etc/igd-bdsm". Signed-off-by: Alex Williamson <alex.williamson(a)redhat.com> --- v4: Back to a single patch thanks to Kevin's suggestion to use memalign_tmphigh() for larger allocations. Now creating reserved space for stolen memory and writing the value to the BDSM register is queued off the existence of a fw_cfg file, just like the OpRegion. The only difference is that we don't copy the contents, just use the meta data. src/fw/pciinit.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index 0ed5dfb..dc2e433 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -269,6 +269,49 @@ static void ich9_smbus_setup(struct pci_device *dev, void *arg) pci_config_writeb(bdf, ICH9_SMB_HOSTC, ICH9_SMB_HOSTC_HST_EN); } +static void intel_igd_setup(struct pci_device *dev, void *arg) +{ + struct romfile_s *opregion = romfile_find("etc/igd-opregion"); + struct romfile_s *bdsm = romfile_find("etc/igd-bdsm"); + void *addr; + u16 bdf = dev->bdf; + + if (opregion && opregion->size) { + addr = memalign_high(PAGE_SIZE, opregion->size); + if (!addr) { + warn_noalloc(); + return; + } + + if (opregion->copy(opregion, addr, opregion->size) < 0) { + free(addr); + return; + } + + pci_config_writel(bdf, 0xFC, cpu_to_le32((u32)addr)); + + dprintf(1, "Intel IGD OpRegion enabled at 0x%08x, size %dKB, dev " + "%02x:%02x.%x\n", (u32)addr, opregion->size >> 10, + pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf), pci_bdf_to_fn(bdf)); + } + + if (bdsm && bdsm->size) { + addr = memalign_tmphigh(1024 * 1024, bdsm->size); + if (!addr) { + warn_noalloc(); + return; + } + + e820_add((u32)addr, bdsm->size, E820_RESERVED); + + pci_config_writel(bdf, 0x5C, cpu_to_le32((u32)addr)); + + dprintf(1, "Intel IGD BDSM enabled at 0x%08x, size %dMB, dev " + "%02x:%02x.%x\n", (u32)addr, bdsm->size >> 20, + pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf), pci_bdf_to_fn(bdf)); + } +} + static const struct pci_device_id pci_device_tbl[] = { /* PIIX3/PIIX4 PCI to ISA bridge */ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_0, @@ -302,6 +345,10 @@ static const struct pci_device_id pci_device_tbl[] = { PCI_DEVICE_CLASS(PCI_VENDOR_ID_APPLE, 0x0017, 0xff00, apple_macio_setup), PCI_DEVICE_CLASS(PCI_VENDOR_ID_APPLE, 0x0022, 0xff00, apple_macio_setup), + /* Intel IGD OpRegion setup */ + PCI_DEVICE_CLASS(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA, + intel_igd_setup), + PCI_DEVICE_END, };

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[PATCH RFC 0/2] support booting more than 255 CPUs with QEMU
by Igor Mammedov May 10, 2016

May 10, 2016

According to SDM, if CPUs have APIC ID more than 254 firmware should pass control to OS in x2APIC mode. This series adds x2APIC bootstrap initialization. QEMU side of x2APIC support: https://lists.gnu.org/archive/html/qemu-devel/2016-05/msg01094.html Igor Mammedov (2): paravirt: disable MPTable in case of more than 255 CPUs support booting with more than 255 CPUs src/fw/mptable.c | 4 ++++ src/fw/smp.c | 48 +++++++++++++++++++++++++++++++++++++++--------- src/x86.h | 1 + 3 files changed, 44 insertions(+), 9 deletions(-) -- 1.8.3.1

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Re: [SeaBIOS] seabios does not support booting from usb-uas with nec-usb-xhci
by Gerd Hoffmann May 9, 2016

May 9, 2016

On Fr, 2016-05-06 at 17:00 +0800, Tom Yan wrote: > Strangely, seabios supports booting from usb-uas with usb-ehci: > > https://drive.google.com/open?id=0B50PCxfm5KU1dUFTUG9HU0pEcXc > > and usb-bot with nec-usb-xhci: > > https://drive.google.com/open?id=0B50PCxfm5KU1QnVzdTBIdEFzZW8 > > but not usb-uas with nec-usb-xhci: > > https://drive.google.com/open?id=0B50PCxfm5KU1Z0t1akNXaVZZLTQ > > This makes me wonder if it is just a missing feature of a bug. missing support for usb3 streams in seabios. cheers, Gerd

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Re: [SeaBIOS] seabios does not support booting from usb-uas with nec-usb-xhci
by Tom Yan May 6, 2016

May 6, 2016

Sorry, I forgot to mention that I am using qemu 2.5.1 and seabios 1.9.2. On 6 May 2016 at 17:04, Tom Yan <tom.ty89(a)gmail.com> wrote: > On 6 May 2016 at 17:00, Tom Yan <tom.ty89(a)gmail.com> wrote: >> >> This makes me wonder if it is just a missing feature of a bug. >> > > I meant "or" instead of "of".

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Re: [SeaBIOS] seabios does not support booting from usb-uas with nec-usb-xhci
by Tom Yan May 6, 2016

May 6, 2016

On 6 May 2016 at 17:00, Tom Yan <tom.ty89(a)gmail.com> wrote: > > This makes me wonder if it is just a missing feature of a bug. > I meant "or" instead of "of".

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seabios does not support booting from usb-uas with nec-usb-xhci
by Tom Yan May 6, 2016

May 6, 2016

Strangely, seabios supports booting from usb-uas with usb-ehci: https://drive.google.com/open?id=0B50PCxfm5KU1dUFTUG9HU0pEcXc and usb-bot with nec-usb-xhci: https://drive.google.com/open?id=0B50PCxfm5KU1QnVzdTBIdEFzZW8 but not usb-uas with nec-usb-xhci: https://drive.google.com/open?id=0B50PCxfm5KU1Z0t1akNXaVZZLTQ This makes me wonder if it is just a missing feature of a bug. Btw, not sure if it's relevant, booting usb-uas is not at all supported in ovmf: https://github.com/tianocore/edk2/issues/85

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