August 2015 - SeaBIOS - mail.coreboot.org

[PATCH] docs: Don't use an add-symbol-file offset when describing gdb debugging
by Kevin O'Connor Aug. 24, 2015

Aug. 24, 2015

Recent versions of gdb will only add an offset to the '.text' section of object files via the add-symbol-file command. The SeaBIOS build doesn't place code directly in a '.text' section, so update the documentation to obtain the same result via an 'objcopy' call instead. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- docs/Debugging.md | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/docs/Debugging.md b/docs/Debugging.md index 4aaf472..7ab5d02 100644 --- a/docs/Debugging.md +++ b/docs/Debugging.md @@ -86,22 +86,23 @@ bios 16bit code) or out/rom.o (to debug bios 32bit code). For example: `gdb out/rom16.o` -Once in gdb, use the command "target remote localhost:1234" to have +Once in gdb, use the command `target remote localhost:1234` to have gdb connect to QEMU. See the QEMU documentation for more information on using gdb and QEMU in this mode. -When debugging 16bit code, also run the following commands in gdb: +When debugging 16bit code it is necessary to load the 16bit symbols +twice in order for gdb to properly handle break points. To do this, +run the following command `objcopy --adjust-vma 0xf0000 out/rom16.o +rom16offset.o` and then run the following in gdb: ``` set architecture i8086 -add-symbol-file out/rom16.o 0xf0000 +add-symbol-file rom16offset.o 0 ``` -The second command loads the 16bit symbols a second time at an offset -of 0xf0000, which helps gdb set and catch breakpoints correctly. - -To debug a VGA BIOS image, run "gdb out/vgarom.o" add use the gdb -command "add-symbol-file out/vgarom.o 0xc0000" to load the 16bit VGA +To debug a VGA BIOS image, run `gdb out/vgarom.o`, create a +vgaromoffset.o file with offset 0xc0000, add use the gdb +command `add-symbol-file out/vgaromoffset.o 0` to load the 16bit VGA BIOS symbols twice. If debugging the 32bit SeaBIOS initialization code with gdb, note that -- 2.4.3

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[PATCH 0/4] Improve sdcard boot menu description
by Kevin O'Connor Aug. 24, 2015

Aug. 24, 2015

This series extends the sdcard boot menu description to include product and version information from the sd card. This makes the menu more readable and can help distinguish between cards if more than one drive is in the system. -Kevin Kevin O'Connor (4): sdcard: Move sdcard_set_frequency()/sdcard_set_power() in sdcard.c sdcard: Move frequency setting into sdcard_card_setup() sdcard: Move drive registration to sdcard_card_setup() sdcard: Display sdcard product name and revision in boot menu src/hw/sdcard.c | 169 ++++++++++++++++++++++++++++++-------------------------- 1 file changed, 90 insertions(+), 79 deletions(-) -- 2.4.3

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Re: [SeaBIOS] : USB 3.0 port failed if a USB 3.0 device is attached when power up
by Zheng Bao Aug. 24, 2015

Aug. 24, 2015

Hi, Please review the debug message below. Seabios message if USB3 harddrive is plugged in USB3 port. -------------------------------------------- SeaBIOS (version rel-1.7.5-0-ge51488c-dirty-20150824_081102-supersrv) Found coreboot cbmem console @ affde000 Found mainboard AMD FP4 Relocating init from 0x000e6d99 to 0xaff54770 (size 42948) Found CBFS header at 0xfffffc60 CPU Mhz=2101 Found 26 PCI devices (max PCI bus is 01) Copying SMBIOS entry point from 0xaffa7000 to 0x000f1540 Copying ACPI RSDP from 0xaffb8000 to 0x000f1510 Copying MPTABLE from 0xaffdc000/affdc010 to 0x000f1340 Copying PIR from 0xaffdd000 to 0x000f1310 Using pmtimer, ioport 0x818 Scan for VGA option rom Running option rom at c000:0003 Turning on vga text mode console SeaBIOS (version rel-1.7.5-0-ge51488c-dirty-20150824_081102-supersrv) /aff51000\ Start thread |aff51000| XHCI init on dev 00:10.0: regs @ 0xf0b8a000, 8 ports, 32 slots, 32 byte contexts |aff51000| XHCI extcap 0x1 @ f0b8a500 |aff51000| XHCI protocol USB 3.00, 4 ports (offset 1), def 0 |aff51000| XHCI protocol USB 2.00, 4 ports (offset 5), def 18 |aff51000| XHCI extcap 0xa @ f0b8a540 /aff50000\ Start thread /aff4f000\ Start thread |aff4f000| WARNING - Timeout at i8042_flush:71! \aff4f000/ End thread |aff51000| EHCI init on dev 00:12.0 (regs=0xf0b8d520) /aff4f000\ Start thread /aff4d000\ Start thread Found 0 lpt ports Found 1 serial ports AHCI controller at 11.0, iobase f0b8d000, irq 0 AHCI: cap 0xf733ff01, ports_impl 0x3 /aff4c000\ Start thread |aff4c000| AHCI/0: probing |aff51000| EHCI init on dev 01:00.4 (regs=0xf0818020) /aff4b000\ Start thread /aff4a000\ Start thread /aff49000\ Start thread /aff47000\ Start thread |aff47000| AHCI/1: probing |aff47000| AHCI/1: link up |aff4c000| AHCI/0: link down |aff47000| AHCI/1: ... finished, status 0x51, ERROR 0x4 \aff4c000/ End thread |aff47000| Searching bootorder for: /pci@i0cf8/*@11/drive@1/disk@0 \aff4a000/ End thread \aff49000/ End thread |aff47000| AHCI/1: registering: "AHCI/1: PLEXTOR PX-128M6G-2280 ATA-8 Hard-Disk (119 GiBytes)" \aff47000/ End thread \aff51000/ End thread /aff4c000\ Start thread /aff4a000\ Start thread /aff49000\ Start thread /aff48000\ Start thread /aff47000\ Start thread \aff47000/ End thread /aff47000\ Start thread \aff47000/ End thread /aff47000\ Start thread \aff47000/ End thread /aff47000\ Start thread \aff47000/ End thread /aff47000\ Start thread /aff46000\ Start thread \aff46000/ End thread /aff46000\ Start thread \aff46000/ End thread /aff46000\ Start thread \aff46000/ End thread |aff4a000| usb_hid_setup 0xaff51c50 |aff4b000| WARNING - Timeout at ehci_waittick:186! |aff4a000| USB keyboard initialized \aff4a000/ End thread \aff4b000/ End thread |aff47000| WARNING - Timeout at wait_bit:484! \aff47000/ End thread |aff50000| XHCI no devices found \aff50000/ End thread \aff4c000/ End thread \aff48000/ End thread \aff49000/ End thread |aff4d000| Initialized USB HUB (1 ports used) \aff4d000/ End thread \aff4f000/ End thread All threads complete. Scan for option roms Press F12 for boot menu. Select boot device: 1. AHCI/1: PLEXTOR PX-128M6G-2280 ATA-8 Hard-Disk (119 GiBytes Seabios message if USB3 hard drive is plugged in USB2 port. ------------------------------ SeaBIOS (version rel-1.7.5-0-ge51488c-dirty-20150824_081102-supersrv) Found coreboot cbmem console @ affde000 Found mainboard AMD FP4 Relocating init from 0x000e6d99 to 0xaff54770 (size 42948) Found CBFS header at 0xfffffc60 CPU Mhz=2100 Found 26 PCI devices (max PCI bus is 01) Copying SMBIOS entry point from 0xaffa7000 to 0x000f1540 Copying ACPI RSDP from 0xaffb8000 to 0x000f1510 Copying MPTABLE from 0xaffdc000/affdc010 to 0x000f1340 Copying PIR from 0xaffdd000 to 0x000f1310 Using pmtimer, ioport 0x818 Scan for VGA option rom Running option rom at c000:0003 Turning on vga text mode console SeaBIOS (version rel-1.7.5-0-ge51488c-dirty-20150824_081102-supersrv) /aff51000\ Start thread |aff51000| XHCI init on dev 00:10.0: regs @ 0xf0b8a000, 8 ports, 32 slots, 32 byte contexts |aff51000| XHCI extcap 0x1 @ f0b8a500 |aff51000| XHCI protocol USB 3.00, 4 ports (offset 1), def 0 |aff51000| XHCI protocol USB 2.00, 4 ports (offset 5), def 18 |aff51000| XHCI extcap 0xa @ f0b8a540 /aff50000\ Start thread /aff4f000\ Start thread |aff4f000| WARNING - Timeout at i8042_flush:71! \aff4f000/ End thread |aff51000| EHCI init on dev 00:12.0 (regs=0xf0b8d520) /aff4f000\ Start thread /aff4d000\ Start thread Found 0 lpt ports Found 1 serial ports AHCI controller at 11.0, iobase f0b8d000, irq 0 AHCI: cap 0xf733ff01, ports_impl 0x3 /aff4c000\ Start thread |aff4c000| AHCI/0: probing |aff51000| EHCI init on dev 01:00.4 (regs=0xf0818020) /aff4b000\ Start thread /aff4a000\ Start thread /aff49000\ Start thread /aff47000\ Start thread |aff47000| AHCI/1: probing |aff47000| AHCI/1: link up |aff4c000| AHCI/0: link down |aff47000| AHCI/1: ... finished, status 0x51, ERROR 0x4 \aff4c000/ End thread |aff47000| Searching bootorder for: /pci@i0cf8/*@11/drive@1/disk@0 \aff4a000/ End thread \aff49000/ End thread |aff47000| AHCI/1: registering: "AHCI/1: PLEXTOR PX-128M6G-2280 ATA-8 Hard-Disk (119 GiBytes)" \aff47000/ End thread \aff51000/ End thread /aff4c000\ Start thread /aff4a000\ Start thread /aff49000\ Start thread /aff48000\ Start thread /aff47000\ Start thread \aff47000/ End thread /aff47000\ Start thread \aff47000/ End thread /aff47000\ Start thread \aff47000/ End thread /aff47000\ Start thread \aff47000/ End thread /aff47000\ Start thread \aff47000/ End thread /aff47000\ Start thread \aff47000/ End thread /aff47000\ Start thread \aff47000/ End thread /aff47000\ Start thread \aff47000/ End thread |aff50000| XHCI no devices found \aff50000/ End thread |aff4b000| WARNING - Timeout at ehci_waittick:186! \aff4b000/ End thread |aff4c000| Searching bootorder for: /pci@i0cf8/usb@12/hub@1/storage@1/*@0/*@0,0 |aff4c000| Searching bootorder for: /pci@i0cf8/usb@12/hub@1/usb-*@1 |aff4c000| USB MSC vendor='Seagate' product='FA GoFlex Pro' rev='0210' type=0 removable=0 |aff4c000| USB MSC blksize=512 sectors=976773167 \aff4c000/ End thread |aff4a000| usb_hid_setup 0xaff521d0 |aff4a000| USB keyboard initialized \aff4a000/ End thread \aff48000/ End thread \aff49000/ End thread |aff4d000| Initialized USB HUB (2 ports used) \aff4d000/ End thread \aff4f000/ End thread All threads complete. Scan for option roms Press F12 for boot menu. Select boot device: 1. AHCI/1: PLEXTOR PX-128M6G-2280 ATA-8 Hard-Disk (119 GiBytes 2. USB MSC Drive Seagate FA GoFlex Pro 0210 > Date: Thu, 20 Aug 2015 13:14:54 +0200 > From: vidwer(a)gmail.com > To: seabios(a)seabios.org > Subject: Re: [SeaBIOS] : USB 3.0 port failed if a USB 3.0 device is attached when power up > > 2015-08-07 23:21 GMT+02:00 Kevin O'Connor <kevin(a)koconnor.net>: > > On Thu, Aug 06, 2015 at 11:51:04AM +0000, Zheng Bao wrote: > >> Board: Bettong > >> USB3 controller: Hudson on Carrizo > >> USB3 device: Seagate USB hard drive. That is the only USB 3.0 device I can get. > > > > Thanks. The problem looks very similar to one reported in the past by > > Idwer. Unfortunately, Idwer also didn't have access to any other USB3 > > devices - that would have been a great test to see if the quirky > > behavior was due to the controller or due to the device. > > The board I have is an Hudson-D4? board, ASUS F2A85-M with the lspci ID: > 00:10.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] FCH > USB XHCI Controller [1022:7812] (rev 03) > 00:10.1 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] FCH > USB XHCI Controller [1022:7812] (rev 03) > > Zheng, can you recompile SeaBIOS with CONFIG_THREADS=y and > CONFIG_DEBUG_LEVEL=2 and try booting off the superspeed device you're > using? > The experience I had was that, with those settings, this superspeed > SATA dock showed up in the device menu (press ESCape). > > If that won't make the device show up - be sure to post that > cbmem/console output - change USB_TIME_SIGATT in src/hw/usb.h to at > least 1000. > > HTH, > > Idwer > > > > > Can you provide the output from "lspci", "lsusb", and "lsusb -t". > > > > -Kevin > > > >> > >> Joe > >> > >> > Date: Wed, 5 Aug 2015 06:25:13 -0400 > >> > From: kevin(a)koconnor.net > >> > To: fishbaoz(a)hotmail.com > >> > CC: seabios(a)seabios.org > >> > Subject: Re: [SeaBIOS]: USB 3.0 port failed if a USB 3.0 device is attached when power up > >> > > >> > On Wed, Aug 05, 2015 at 07:40:50AM +0000, Zheng Bao wrote: > >> > > hi, Kevin, > >> > > I am debugging the coreboot on AMD board. > >> > > > >> > > I found if a device is populated on USB 3.0 port during system power up, the USB3.0 function fail after OS boot up. > >> > > If a USB 2.0 device is plugged, the port is OK. > >> > > Can you take a look at this? > >> > > >> > What board is this, what USB3 controller is it, and what USB3 device > >> > did the problem occur with? Does the problem occur with multiple/all > >> > USB3 devices or just one? > >> > > >> > -Kevin > >> > > _______________________________________________ > SeaBIOS mailing list > SeaBIOS(a)seabios.org > http://www.seabios.org/mailman/listinfo/seabios

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serial console : no keystroke
by Maxime de Roucy Aug. 20, 2015

Aug. 20, 2015

Hello, I am trying vanilla coreboot/SeaBios on an pc-engines apu1d4 : http://www.pcengines.ch/apu1d4.htm The board natively use a modified version of coreboot, the sources are available at http://www.pcengines.ch/howto.php#CoreBoot (coreboot_14090 8.tar.gz) I use a usb-SR232 adapter to connect on the board. I use minicom and picocom. Both are working fine. BUT When I use coreboot vanilla (master) with SeaBios vanilla (master, I also tried 1.7.5), when I get to "Press ESC for boot menu" I can't send keystroke to SeaBios through the serial console. I have to plug an USB keyboard and press ESC on it. I tried scancode (F10, F12, Q (0x10)) same problem. I disabled hardware and software flow control on minicom. In fact, SeaBios doesn't get ANY keystroke from the serial port. I can press any keyboard key in minicom/picocom the message "Press ESC for boot menu." stay until timeout (DEFAULT_BOOTMENU_WAIT) (I set etc/boot-menu-wait to 90000 to verify that… so I am pretty sure of it). Furthermore, after I enter the boot menu via usb keyboard I can't choose anything from the menu through minicom/picocom. I have to use an USB keyboard. When I get in the OS (tinycore Linux), minicom/picocom input works. I don't have the problem with the modified coreboot/SeaBios from PC -Engines. At first I thought it's a SeaBios problem but the keystroke code part (src/boot.c) are the same in vanilla SeaBios and PC-Engines SeaBios. PC-Engines sources don't have .config files (nor for coreboot neither for SeaBios) but have build/config.h and out/autoconf.h. I tried to look for some interesting difference between vanilla and PC -Engines sources for those file but my coreboot/SeaBios knowledge weren't enough to spot anything. Can anyone help me ? Since I don't know if the problem relies on coreboot or SeaBios I post this on both mailing-list. I attached to this mail : * my .config coreboot file * my build/config.h coreboot file * my payloads/external/SeaBIOS/seabios/out/autoconf.h SeaBios file * PC-Engines build/config.h * PC-Engines SeaBios autoconf.h -- Regards Maxime

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: USB 3.0 port failed if a USB 3.0 device is attached when power up
by Zheng Bao Aug. 20, 2015

Aug. 20, 2015

hi, Kevin, I am debugging the coreboot on AMD board. I found if a device is populated on USB 3.0 port during system power up, the USB3.0 function fail after OS boot up. If a USB 2.0 device is plugged, the port is OK. Can you take a look at this? Here is the debug message. ------------ SeaBIOS (version rel-1.8.0-26-g92f9b91-dirty-20150805_022528-supersrv) XHCI init on dev 00:10.0: regs @ 0xf0b8a000, 8 ports, 32 slots, 32 byte contexts XHCI extcap 0x1 @ f0b8a500 XHCI protocol USB 3.00, 4 ports (offset 1), def 0 XHCI protocol USB 2.00, 4 ports (offset 5), def 18 XHCI extcap 0xa @ f0b8a540 configure_xhci: resetting configure_xhci: setup 8 scratch pad buffers xhci_hub_reset port #5: 0x000202e1, powered, pls 7, speed 0 [ - ] XHCI port #5: 0x00200e03, powered, enabled, pls 0, speed 3 [High] xhci_alloc_pipe: usbdev 0xbff52960, ring 0xbff9e900, slotid 0, epid 1 xhci_cmd_enable_slot: xhci_trb_queue: ring 0xbff9ed00 [nidx 1, len 0] xhci_process_events: status change port #5 xhci_process_events: status change port #1 xhci_process_events: status change port #5 xhci_process_events: ring 0xbff9ed00 [trb 0xbff9ed00, evt 0xbff9ee00, type 33, eidx 1, cc 1] xhci_alloc_pipe: enable slot: got slotid 1 xhci_cmd_address_device: slotid 1 xhci_trb_queue: ring 0xbff9ed00 [nidx 2, len 0] WARNING - Timeout at xhci_event_wait:692! xhci_alloc_pipe: address device: failed (cc -1) XHCI no devices found WARNING - Timeout at wait_bit:310! Joe

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[RFC 0/2] QEMU fw_cfg dma interface
by Marc Marí Aug. 19, 2015

Aug. 19, 2015

These patches, with the support in QEMU (patches in the QEMU mailing list) make the Linux kernel setup and boot approximately 10x faster. TODO: * Other ways to boot when detecting fw_cfg DMA interface? * Is 0xfef00000 a good address? Is there any better address? Is it possible to not make it hardcoded? Marc Marí (2): Add QEMU fw_cfg dma interface support Add Linux boot code for the fw_cfg dma interface src/boot.c | 14 ++- src/config.h | 1 + src/fw/paravirt.c | 298 +++++++++++++++++++++++++++++++++++++++++++----------- src/fw/paravirt.h | 50 +++++++++ src/romlayout.S | 20 ++++ 5 files changed, 321 insertions(+), 62 deletions(-) -- 2.4.3

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[PATCH] rtc: Support disabling the RTC timer irq support
by Kevin O'Connor Aug. 17, 2015

Aug. 17, 2015

Add a build time config option to remove support for RTC timer interrupts along with the associated bios calls requiring that support. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/Kconfig | 9 +++++++++ src/clock.c | 13 ++++++++++++- src/hw/rtc.c | 6 ++++++ src/stacks.c | 2 +- 4 files changed, 28 insertions(+), 2 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index 6256242..56a1b2f 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -299,6 +299,15 @@ menu "Hardware support" default y help Support parallel ports. This also enables int 17 parallel port calls. + config RTC_TIMER + bool "Real Time Clock (RTC) scheduling" + default y + help + Support MC146818 Real Time Clock chip timer + interrupts. This also enables int 1583 and int 1586 calls. + + Disabling this support does not disable access to the RTC + cmos registers. config USE_SMM depends on QEMU diff --git a/src/clock.c b/src/clock.c index ee2b53f..2bb5209 100644 --- a/src/clock.c +++ b/src/clock.c @@ -56,7 +56,8 @@ clock_setup(void) } enable_hwirq(0, FUNC16(entry_08)); - enable_hwirq(8, FUNC16(entry_70)); + if (CONFIG_RTC_TIMER) + enable_hwirq(8, FUNC16(entry_70)); } @@ -374,6 +375,10 @@ clear_usertimer(void) void handle_1586(struct bregs *regs) { + if (!CONFIG_RTC_TIMER) { + set_code_unimplemented(regs, RET_EUNSUPPORTED); + return; + } // Use the rtc to wait for the specified time. u8 statusflag = 0; u32 count = (regs->cx << 16) | regs->dx; @@ -417,6 +422,10 @@ handle_1583XX(struct bregs *regs) void handle_1583(struct bregs *regs) { + if (!CONFIG_RTC_TIMER) { + handle_1583XX(regs); + return; + } switch (regs->al) { case 0x00: handle_158300(regs); break; case 0x01: handle_158301(regs); break; @@ -430,6 +439,8 @@ handle_1583(struct bregs *regs) void VISIBLE16 handle_70(void) { + if (!CONFIG_RTC_TIMER) + return; debug_isr(DEBUG_ISR_70); // Check which modes are enabled and have occurred. diff --git a/src/hw/rtc.c b/src/hw/rtc.c index 628d542..570a3ad 100644 --- a/src/hw/rtc.c +++ b/src/hw/rtc.c @@ -62,6 +62,8 @@ rtc_updating(void) void rtc_setup(void) { + if (!CONFIG_RTC_TIMER) + return; rtc_write(CMOS_STATUS_A, 0x26); // 32,768Khz src, 976.5625us updates rtc_mask(CMOS_STATUS_B, ~RTC_B_DSE, RTC_B_24HR); rtc_read(CMOS_STATUS_C); @@ -73,6 +75,8 @@ int RTCusers VARLOW; void rtc_use(void) { + if (!CONFIG_RTC_TIMER) + return; int count = GET_LOW(RTCusers); SET_LOW(RTCusers, count+1); if (count) @@ -84,6 +88,8 @@ rtc_use(void) void rtc_release(void) { + if (!CONFIG_RTC_TIMER) + return; int count = GET_LOW(RTCusers); SET_LOW(RTCusers, count-1); if (count != 1) diff --git a/src/stacks.c b/src/stacks.c index 0c5f79a..e67aeb6 100644 --- a/src/stacks.c +++ b/src/stacks.c @@ -574,7 +574,7 @@ thread_setup(void) int threads_during_optionroms(void) { - return CONFIG_THREADS && ThreadControl == 2 && in_post(); + return CONFIG_THREADS && CONFIG_RTC_TIMER && ThreadControl == 2 && in_post(); } // Switch to next thread stack. -- 1.9.3

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Re: [SeaBIOS] QEMU fw_cfg DMA interface
by Marc Marí Aug. 17, 2015

Aug. 17, 2015

On Thu, 6 Aug 2015 13:27:16 +0100 Stefan Hajnoczi <stefanha(a)gmail.com> wrote: > On Thu, Aug 6, 2015 at 12:00 PM, Marc Marí <markmb(a)redhat.com> wrote: > > When running a Linux guest on top of QEMU, using the -kernel > > options, this is the timing improvement for x86: > > > > QEMU commit 2be4f242b50a8 and SeaBIOS commit 908a58c1d5ff > > QEMU startup time: .078 > > BIOS startup time: .060 > > Kernel setup time: .578 > > Total time: .716 > > > > QEMU with this patch series and SeaBIOS with this patch series > > QEMU startup time: .080 > > BIOS startup time: .039 > > Kernel setup time: .002 > > Total time: .121 > > Impressive results! > > Is this a fully-featured QEMU build or did you disable things? > > Is this the default SeaBIOS build or did you disable things? > This is the default QEMU configuration I get for my system. It's not a fully-featured QEMU, but it has a lot of things enabled. SeaBIOS has a default configuration (with debugging disabled). The QEMU configuration is: [...] tcg debug enabled no gprof enabled no sparse enabled no strip binaries yes profiler no static build no pixman system SDL support yes GTK support yes GNUTLS support yes GNUTLS hash yes GNUTLS gcrypt no GNUTLS nettle yes (2.7.1) VTE support yes curses support yes curl support yes mingw32 support no Audio drivers oss Block whitelist (rw) Block whitelist (ro) VirtFS support yes VNC support yes VNC TLS support yes VNC SASL support yes VNC JPEG support yes VNC PNG support yes xen support no brlapi support yes bluez support yes Documentation no GUEST_BASE yes PIE yes vde support yes netmap support no Linux AIO support yes ATTR/XATTR support yes Install blobs yes KVM support yes RDMA support yes TCG interpreter no fdt support yes preadv support yes fdatasync yes madvise yes posix_madvise yes sigev_thread_id yes uuid support yes libcap-ng support yes vhost-net support yes vhost-scsi support yes Trace backends nop spice support yes (0.12.7/0.12.5) rbd support yes xfsctl support no nss used yes libusb yes usb net redir yes OpenGL support no libiscsi support yes libnfs support no build guest agent yes QGA VSS support no QGA w32 disk info no seccomp support yes coroutine backend ucontext coroutine pool yes GlusterFS support yes Archipelago support no gcov gcov gcov enabled no TPM support yes libssh2 support yes TPM passthrough yes QOM debugging yes vhdx yes lzo support yes snappy support yes bzip2 support yes NUMA host support yes tcmalloc support no Marc

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[PATCH 1/2] edd: Pass the segment/offset from int 1348 calls using a 'struct segoff_s'
by Kevin O'Connor Aug. 17, 2015

Aug. 17, 2015

Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/block.c | 16 +++++++++------- src/block.h | 2 +- src/disk.c | 2 +- 3 files changed, 11 insertions(+), 9 deletions(-) diff --git a/src/block.c b/src/block.c index a1054ac..cd732c1 100644 --- a/src/block.c +++ b/src/block.c @@ -288,10 +288,12 @@ map_floppy_drive(struct drive_s *drive) ****************************************************************/ static int -fill_generic_edd(u16 seg, struct int13dpt_s *param_far, struct drive_s *drive_gf +fill_generic_edd(struct segoff_s edd, struct drive_s *drive_gf , u32 dpte_so, char *iface_type , int bdf, u8 channel, u16 iobase, u64 device_path) { + u16 seg = edd.seg; + struct int13dpt_s *param_far = (void*)(edd.offset+0); u16 size = GET_FARVAR(seg, param_far->size); u16 t13 = size == 74; @@ -394,7 +396,7 @@ fill_generic_edd(u16 seg, struct int13dpt_s *param_far, struct drive_s *drive_gf struct dpte_s DefaultDPTE VARLOW; static int -fill_ata_edd(u16 seg, struct int13dpt_s *param_far, struct drive_s *drive_gf) +fill_ata_edd(struct segoff_s edd, struct drive_s *drive_gf) { if (!CONFIG_ATA) return DISK_RET_EPARAM; @@ -446,24 +448,24 @@ fill_ata_edd(u16 seg, struct int13dpt_s *param_far, struct drive_s *drive_gf) SET_LOW(DefaultDPTE.checksum, -sum); return fill_generic_edd( - seg, param_far, drive_gf, SEGOFF(SEG_LOW, (u32)&DefaultDPTE).segoff + edd, drive_gf, SEGOFF(SEG_LOW, (u32)&DefaultDPTE).segoff , "ATA ", bdf, channel, iobase1, slave); } int noinline -fill_edd(u16 seg, struct int13dpt_s *param_far, struct drive_s *drive_gf) +fill_edd(struct segoff_s edd, struct drive_s *drive_gf) { switch (GET_GLOBALFLAT(drive_gf->type)) { case DTYPE_ATA: case DTYPE_ATA_ATAPI: - return fill_ata_edd(seg, param_far, drive_gf); + return fill_ata_edd(edd, drive_gf); case DTYPE_VIRTIO_BLK: case DTYPE_VIRTIO_SCSI: return fill_generic_edd( - seg, param_far, drive_gf, 0xffffffff + edd, drive_gf, 0xffffffff , "SCSI ", GET_GLOBALFLAT(drive_gf->cntl_id), 0, 0, 0); default: - return fill_generic_edd(seg, param_far, drive_gf, 0, NULL, 0, 0, 0, 0); + return fill_generic_edd(edd, drive_gf, 0, NULL, 0, 0, 0, 0); } } diff --git a/src/block.h b/src/block.h index 702f357..2ff359f 100644 --- a/src/block.h +++ b/src/block.h @@ -110,7 +110,7 @@ void map_floppy_drive(struct drive_s *drive); void map_hd_drive(struct drive_s *drive); void map_cd_drive(struct drive_s *drive); struct int13dpt_s; -int fill_edd(u16 seg, struct int13dpt_s *param_far, struct drive_s *drive_gf); +int fill_edd(struct segoff_s edd, struct drive_s *drive_gf); int default_process_op(struct disk_op_s *op); int process_op(struct disk_op_s *op); int send_disk_op(struct disk_op_s *op); diff --git a/src/disk.c b/src/disk.c index 91d939a..3854d00 100644 --- a/src/disk.c +++ b/src/disk.c @@ -522,7 +522,7 @@ disk_1347(struct bregs *regs, struct drive_s *drive_gf) static void disk_1348(struct bregs *regs, struct drive_s *drive_gf) { - int ret = fill_edd(regs->ds, (void*)(regs->si+0), drive_gf); + int ret = fill_edd(SEGOFF(regs->ds, regs->si), drive_gf); disk_ret(regs, ret); } -- 1.9.3

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[PATCH 1/2] Move CanInterrupt check to check_irqs() and wait_irq()
by Kevin O'Connor Aug. 17, 2015

Aug. 17, 2015

Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/stacks.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/src/stacks.c b/src/stacks.c index 1ad9ef0..1cd0fde 100644 --- a/src/stacks.c +++ b/src/stacks.c @@ -661,6 +661,9 @@ fail: void VISIBLE16 check_irqs(void) { + if (!MODESEGMENT && !CanInterrupt) + // Can't enable interrupts (PIC and/or IVT not yet setup) + return; if (need_hop_back()) { extern void _cfunc16_check_irqs(void); stack_hop_back(0, 0, _cfunc16_check_irqs); @@ -674,12 +677,11 @@ void yield(void) { if (MODESEGMENT || !CONFIG_THREADS) { - if (MODESEGMENT || CanInterrupt) - check_irqs(); + check_irqs(); return; } struct thread_info *cur = getCurThread(); - if (cur == &MainThread && CanInterrupt) + if (cur == &MainThread) // Permit irqs to fire check_irqs(); @@ -690,6 +692,9 @@ yield(void) void VISIBLE16 wait_irq(void) { + if (!MODESEGMENT && !CanInterrupt) + // Can't enable interrupts (PIC and/or IVT not yet setup) + return; if (need_hop_back()) { extern void _cfunc16_wait_irq(void); stack_hop_back(0, 0, _cfunc16_wait_irq); @@ -707,8 +712,7 @@ yield_toirq(void) yield(); return; } - if (MODESEGMENT || CanInterrupt) - wait_irq(); + wait_irq(); } // Wait for all threads (other than the main thread) to complete. -- 1.9.3

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