SeaBIOS March 2015

seabios@seabios.org

29 participants
51 discussions

Re: [SeaBIOS] [coreboot] Booting Windows 8 failed
by David Hendricks 25 Mar '15

25 Mar '15

[+seabios, coreboot --> bcc] On Mon, Mar 23, 2015 at 7:27 PM, Bao, Zheng <Zheng.Bao(a)amd.com> wrote: > I am porting the coreboot to a platform with a new AMD APU, which is close > to Kabini and Mullins. > Now the board can boot Ubuntu and Windows 7. But it failed to boot Windows > 8. > It crashes at a very early stage, which seems to be Windows bootloader. > The debug message of SeaBIOS is attached. > > The interrupt routine installed by SeaBIOS still work. We can see > handle_13, handle_08, handle_1a are called once in a while. > There is no BSOD. There is only a windows logo on the monitor, without > progress ring of Windows 8. > Even the debug version of windows 8 doesn't help, because it crashes > before the image is loaded. > > Is there any more way to debug windows 8 bootloader? > > Zheng > > > serial output > --------------------- > ....... > ....... > handle_08 > enter handle_15: > a=0000e820 b=00000006 c=00000018 d=534d4150 ds=0000 es=3004 ss=9000 > si=00000000 di=00000000 bp=00000000 sp=0000ffd6 cs=2000 ip=0a25 f=0256 > enter handle_13: > a=00004200 b=00000000 c=00000000 d=00000080 ds=3024 es=0000 ss=9000 > si=00000000 di=00000000 bp=00000000 sp=0000ffd6 cs=2000 ip=0a1d f=0256 > disk_op d=0x000f98e0 lba=0 buf=0x00030000 count=1 cmd=2 > AHCI/0: send cmd ... > handle_08 > AHCI/0: ... intbits 0x1, status 0x50 ... > AHCI/0: ... finished, status 0x50, OK > ahci disk read, lba 0, count 1, buf 0x00030000, rc 0 > enter handle_13: > a=00004200 b=00000000 c=00000000 d=00000080 ds=3204 es=0000 ss=9000 > si=00000000 di=00000000 bp=00000000 sp=0000ffd6 cs=2000 ip=0a1d f=0256 > disk_op d=0x000f98e0 lba=2048 buf=0x00030000 count=16 cmd=2 > AHCI/0: send cmd ... > AHCI/0: ... intbits 0x1, status 0x50 ... > AHCI/0: ... finished, status 0x50, OK > ahci disk read, lba 800, count 10, buf 0x00030000, rc 0 > enter handle_1a: > a=00000000 b=00000000 c=00000000 d=00000000 ds=0000 es=0000 ss=9000 > si=00000000 di=00000000 bp=00000000 sp=0000ffd6 cs=2000 ip=0a39 f=0256 > handle_08 > enter handle_1a: > a=00000000 b=00000000 c=00000000 d=00000000 ds=0000 es=0000 ss=9000 > si=00000000 di=00000000 bp=00000000 sp=0000ffd6 cs=2000 ip=0a39 f=0256 > enter handle_13: > a=00004200 b=00000000 c=00000000 d=00000080 ds=3804 es=0000 ss=9000 > si=00000000 di=00000000 bp=00000000 sp=0000ffd6 cs=2000 ip=0a1d f=0256 > disk_op d=0x000f98e0 lba=7166912 buf=0x00030000 count=64 cmd=2 > AHCI/0: send cmd ... > handle_08 > AHCI/0: ... intbits 0x1, status 0x50 ... > AHCI/0: ... finished, status 0x50, OK > ahci disk read, lba 6d5bc0, count 40, buf 0x00030000, rc 0 enter > handle_1a: > a=00000000 b=00000000 c=00000000 d=00000000 ds=0000 es=0000 ss=9000 > si=00000000 di=00000000 bp=00000000 sp=0000ffd6 cs=2000 ip=0a39 f=0256 > enter handle_13: > a=00004200 b=00000000 c=00000000 d=00000080 ds=3204 es=0000 ss=9000 > si=00000000 di=00000000 bp=00000000 sp=0000ffd6 cs=2000 ip=0a1d f=0256 > disk_op d=0x000f98e0 lba=31249832 buf=0x00030000 count=16 cmd=2 > AHCI/0: send cmd ... > handle_08 > AHCI/0: ... intbits 0x1, status 0x50 ... > AHCI/0: ... finished, status 0x50, OK > ahci disk read, lba 1dcd5a8, count 10, buf 0x00030000, rc 0 enter > handle_1a: > a=00000000 b=00000000 c=00000000 d=00000000 ds=0000 es=0000 ss=9000 > si=00000000 di=00000000 bp=00000000 sp=0000ffd6 cs=2000 ip=0a39 f=0256 > enter handle_1a: > a=00000000 b=00000000 c=00000000 d=00000000 ds=0000 es=0000 ss=9000 > si=00000000 di=00000000 bp=00000000 sp=0000ffd6 cs=2000 ip=0a39 f=0256 > enter handle_1a: > a=00000000 b=00000000 c=00000000 d=00000000 ds=0000 es=0000 ss=9000 > si=00000000 di=00000000 bp=00000000 sp=0000ffd6 cs=2000 ip=0a39 f=0256 > handle_08 > enter handle_1a: > a=00000000 b=00000000 c=00000000 d=00000000 ds=0000 es=0000 ss=9000 > si=00000000 di=00000000 bp=00000000 sp=0000ffd6 cs=2000 ip=0a39 f=0256 > enter handle_1a: > a=00000200 b=00000000 c=00000000 d=00000000 ds=0000 es=0000 ss=9000 > si=00000000 di=00000000 bp=00000000 sp=0000ffd6 cs=2000 ip=0a39 f=0256 > enter handle_1a: > a=00000400 b=00000000 c=00000000 d=00000000 ds=0000 es=0000 ss=9000 > si=00000000 di=00000000 bp=00000000 sp=0000ffd6 cs=2000 ip=0a39 f=0256 > enter handle_1a: > a=00000000 b=00000000 c=00000000 d=00000000 ds=0000 es=0000 ss=9000 > si=00000000 di=00000000 bp=00000000 sp=0000ffd6 cs=2000 ip=0a39 f=0256 > handle_08 > agesawrapper_amdinitmmio() entry > agesawrapper_amdinitmmio() returned AGESA_SUCCESS > > > coreboot-4.0-6798-gdd6d81f-dirty Thu Mar 19 20:02:01 CST 2015 starting... > BSP Family_Model: > cpu_init_detectedx = 00000000 > agesawrapper_amdinitreset() entry > AmdCreateStruct, 188, InterfaceParams->StdHeader.HeapBasePtr=400000 > Fch OEM config in INIT RESET Done > agesawrapper_amdinitreset() returned AGESA_SUCCESS Got past > agesawrapper_amdinitreset > agesawrapper_amdinitearly() entry > AmdCreateStruct, 188, InterfaceParams->StdHeader.HeapBasePtr=400000 > AmdInitEarly, 239, &EarlyParams->StdHeader=400290 AmdInitEarly, 247, > EarlyParams->StdHeader=0 AmdInitEarly, 273, EarlyParams->StdHeader=0 > AmdInitEarly, 283, EarlyParams->StdHeader=0 AmdInitEarly, 297, > EarlyParams->StdHeader=0 GnbGetScsDataCZ, 183:PspDir=ff860000 > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot > -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

1 0

[PATCH] Eliminate some duplicate string segments to reduce bios image size
by Bruce Rogers 24 Mar '15

24 Mar '15

In some build environments, we are running up against the 128K bios size limit. This change simply takes larger string segments which are used in printf style messages and uses a single copy, now referenced with a %s specifier, resulting in the needed space savings. Signed-off-by: Bruce Rogers <brogers(a)suse.com> --- src/boot.c | 20 +++++++++++--------- src/bootsplash.c | 5 +++-- src/fw/paravirt.c | 8 +++++--- src/fw/pciinit.c | 19 ++++++++++--------- src/hw/usb-hub.c | 9 +++++---- src/hw/usb-msc.c | 6 ++++-- 6 files changed, 38 insertions(+), 29 deletions(-) diff --git a/src/boot.c b/src/boot.c index d6b1fb7..de37041 100644 --- a/src/boot.c +++ b/src/boot.c @@ -25,6 +25,8 @@ * Boot priority ordering ****************************************************************/ +static const char *no_boot_dev_str = "No bootable device."; +static const char *boot_str = "Booting from "; static char **Bootorder VARVERIFY32INIT; static int BootorderCount; @@ -587,7 +589,7 @@ bcv_prepboot(void) static void call_boot_entry(struct segoff_s bootsegip, u8 bootdrv) { - dprintf(1, "Booting from %04x:%04x\n", bootsegip.seg, bootsegip.offset); + dprintf(1, "%s%04x:%04x\n", boot_str, bootsegip.seg, bootsegip.offset); struct bregs br; memset(&br, 0, sizeof(br)); br.flags = F_IF; @@ -641,7 +643,7 @@ boot_cdrom(struct drive_s *drive_g) { if (! CONFIG_CDROM_BOOT) return; - printf("Booting from DVD/CD...\n"); + printf("%sDVD/CD...\n", boot_str); int status = cdrom_boot(drive_g); if (status) { @@ -664,7 +666,7 @@ boot_cbfs(struct cbfs_file *file) { if (!CONFIG_COREBOOT_FLASH) return; - printf("Booting from CBFS...\n"); + printf("%sCBFS...\n", boot_str); cbfs_run_payload(file); } @@ -672,7 +674,7 @@ boot_cbfs(struct cbfs_file *file) static void boot_rom(u32 vector) { - printf("Booting from ROM...\n"); + printf("%sROM...\n", boot_str); struct segoff_s so; so.segoff = vector; call_boot_entry(so, 0); @@ -683,10 +685,10 @@ static void boot_fail(void) { if (BootRetryTime == (u32)-1) - printf("No bootable device.\n"); + printf("%s\n", no_boot_dev_str); else - printf("No bootable device. Retrying in %d seconds.\n" - , BootRetryTime/1000); + printf("%s Retrying in %d seconds.\n", no_boot_dev_str, + BootRetryTime/1000); // Wait for 'BootRetryTime' milliseconds and then reboot. u32 end = irqtimer_calc(BootRetryTime); for (;;) { @@ -712,11 +714,11 @@ do_boot(int seq_nr) struct bev_s *ie = &BEV[seq_nr]; switch (ie->type) { case IPL_TYPE_FLOPPY: - printf("Booting from Floppy...\n"); + printf("%sFloppy...\n", boot_str); boot_disk(0x00, CheckFloppySig); break; case IPL_TYPE_HARDDISK: - printf("Booting from Hard Disk...\n"); + printf("%sHard Disk...\n", boot_str); boot_disk(0x80, 1); break; case IPL_TYPE_CDROM: diff --git a/src/bootsplash.c b/src/bootsplash.c index c572685..e28d264 100644 --- a/src/bootsplash.c +++ b/src/bootsplash.c @@ -16,6 +16,7 @@ #include "string.h" // memset #include "util.h" // enable_bootsplash +static const char *decode_failed_str = "_decode failed with return code "; /**************************************************************** * Helper functions @@ -154,7 +155,7 @@ enable_bootsplash(void) dprintf(5, "Decoding bootsplash.jpg\n"); ret = jpeg_decode(jpeg, filedata); if (ret) { - dprintf(1, "jpeg_decode failed with return code %d...\n", ret); + dprintf(1, "jpeg%s%d...\n", decode_failed_str, ret); goto done; } jpeg_get_size(jpeg, &width, &height); @@ -168,7 +169,7 @@ enable_bootsplash(void) dprintf(5, "Decoding bootsplash.bmp\n"); ret = bmp_decode(bmp, filedata, filesize); if (ret) { - dprintf(1, "bmp_decode failed with return code %d...\n", ret); + dprintf(1, "bmp%s%d...\n", decode_failed_str, ret); goto done; } bmp_get_size(bmp, &width, &height); diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c index db22ae8..868435a 100644 --- a/src/fw/paravirt.c +++ b/src/fw/paravirt.c @@ -36,6 +36,8 @@ int PlatformRunningOn VARFSEG; */ #define KVM_CPUID_SIGNATURE 0x40000000 +static const char *running_on_qemu_str = "Running on QEMU ("; + static void kvm_detect(void) { unsigned int eax, ebx, ecx, edx; @@ -73,13 +75,13 @@ static void qemu_detect(void) PlatformRunningOn |= PF_QEMU; switch (d) { case 0x1237: - dprintf(1, "Running on QEMU (i440fx)\n"); + dprintf(1, "%si440fx)\n", running_on_qemu_str); break; case 0x29c0: - dprintf(1, "Running on QEMU (q35)\n"); + dprintf(1, "%sq35)\n", running_on_qemu_str); break; default: - dprintf(1, "Running on QEMU (unknown nb: %04x:%04x)\n", v, d); + dprintf(1, "%sunknown nb: %04x:%04x)\n", running_on_qemu_str, v, d); break; } kvm_detect(); diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index ac39d23..63018e4 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -27,6 +27,10 @@ #define PCI_BRIDGE_MEM_MIN (1<<21) // 2M == hugepage size #define PCI_BRIDGE_IO_MIN 0x1000 // mandated by pci bridge spec +static const char *pri_bus_str = "PCI: primary bus = "; +static const char *sec_bus_str = "PCI: secondary bus = "; +static const char *sub_bus_str = "PCI: subordinate bus = "; + static const char *region_type_name[] = { [ PCI_REGION_TYPE_IO ] = "io", [ PCI_REGION_TYPE_MEM ] = "mem", @@ -425,7 +429,6 @@ static void pci_bios_init_platform(void) } } - /**************************************************************** * Bus initialization ****************************************************************/ @@ -456,21 +459,20 @@ pci_bios_init_bus_rec(int bus, u8 *pci_bus) u8 pribus = pci_config_readb(bdf, PCI_PRIMARY_BUS); if (pribus != bus) { - dprintf(1, "PCI: primary bus = 0x%x -> 0x%x\n", pribus, bus); + dprintf(1, "%s0x%x -> 0x%x\n", pri_bus_str, pribus, bus); pci_config_writeb(bdf, PCI_PRIMARY_BUS, bus); } else { - dprintf(1, "PCI: primary bus = 0x%x\n", pribus); + dprintf(1, "%s0x%x\n", pri_bus_str, pribus); } u8 secbus = pci_config_readb(bdf, PCI_SECONDARY_BUS); (*pci_bus)++; if (*pci_bus != secbus) { - dprintf(1, "PCI: secondary bus = 0x%x -> 0x%x\n", - secbus, *pci_bus); + dprintf(1, "%s0x%x -> 0x%x\n", sec_bus_str, secbus, *pci_bus); secbus = *pci_bus; pci_config_writeb(bdf, PCI_SECONDARY_BUS, secbus); } else { - dprintf(1, "PCI: secondary bus = 0x%x\n", secbus); + dprintf(1, "%s0x%x\n", sec_bus_str, secbus); } /* set to max for access to all subordinate buses. @@ -481,11 +483,10 @@ pci_bios_init_bus_rec(int bus, u8 *pci_bus) pci_bios_init_bus_rec(secbus, pci_bus); if (subbus != *pci_bus) { - dprintf(1, "PCI: subordinate bus = 0x%x -> 0x%x\n", - subbus, *pci_bus); + dprintf(1, "%s0x%x -> 0x%x\n", sub_bus_str, subbus, *pci_bus); subbus = *pci_bus; } else { - dprintf(1, "PCI: subordinate bus = 0x%x\n", subbus); + dprintf(1, "%s0x%x\n", sub_bus_str, subbus); } pci_config_writeb(bdf, PCI_SUBORDINATE_BUS, subbus); } diff --git a/src/hw/usb-hub.c b/src/hw/usb-hub.c index 54e341b..337385d 100644 --- a/src/hw/usb-hub.c +++ b/src/hw/usb-hub.c @@ -11,6 +11,8 @@ #include "usb-hub.h" // struct usb_hub_descriptor #include "util.h" // timer_calc +static const char *port_hub_fail_str = "Failure on hub port "; + static int get_hub_desc(struct usb_pipe *pipe, struct usb_hub_descriptor *desc) { @@ -82,7 +84,6 @@ get_port_status(struct usbhub_s *hub, int port, struct usb_port_status *sts) mutex_unlock(&hub->lock); return ret; } - // Check if device attached to port static int usb_hub_detect(struct usbhub_s *hub, u32 port) @@ -90,7 +91,7 @@ usb_hub_detect(struct usbhub_s *hub, u32 port) struct usb_port_status sts; int ret = get_port_status(hub, port, &sts); if (ret) { - dprintf(1, "Failure on hub port %d detect\n", port); + dprintf(1, "%s%d detect\n", port_hub_fail_str, port); return -1; } return (sts.wPortStatus & USB_PORT_STAT_CONNECTION) ? 1 : 0; @@ -102,7 +103,7 @@ usb_hub_disconnect(struct usbhub_s *hub, u32 port) { int ret = clear_port_feature(hub, port, USB_PORT_FEAT_ENABLE); if (ret) - dprintf(1, "Failure on hub port %d disconnect\n", port); + dprintf(1, "%s%d disconnect\n", port_hub_fail_str, port); } // Reset device on port @@ -142,7 +143,7 @@ usb_hub_reset(struct usbhub_s *hub, u32 port) >> USB_PORT_STAT_SPEED_SHIFT); fail: - dprintf(1, "Failure on hub port %d reset\n", port); + dprintf(1, "%s%d reset\n", port_hub_fail_str, port); usb_hub_disconnect(hub, port); return -1; } diff --git a/src/hw/usb-msc.c b/src/hw/usb-msc.c index d90319f..9c6b3e2 100644 --- a/src/hw/usb-msc.c +++ b/src/hw/usb-msc.c @@ -50,6 +50,8 @@ struct csw_s { u8 bCSWStatus; } PACKED; +static const char *cant_config_str = "Unable to configure USB MSC "; + static int usb_msc_send(struct usbdrive_s *udrive_gf, int dir, void *buf, u32 bytes) { @@ -158,7 +160,7 @@ usb_msc_lun_setup(struct usb_pipe *inpipe, struct usb_pipe *outpipe, int prio = bootprio_find_usb(usbdev, lun); int ret = scsi_drive_setup(&drive->drive, "USB MSC", prio); if (ret) { - dprintf(1, "Unable to configure USB MSC drive.\n"); + dprintf(1, "%sdrive.\n", cant_config_str); free(drive); return -1; } @@ -213,7 +215,7 @@ usb_msc_setup(struct usbdevice_s *usbdev) return 0; fail: - dprintf(1, "Unable to configure USB MSC device.\n"); + dprintf(1, "%sdevice.\n", cant_config_str); usb_free_pipe(usbdev, inpipe); usb_free_pipe(usbdev, outpipe); return -1; -- 1.9.0

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[PATCH] Reduce size of certain global variables to reduce bios size
by Bruce Rogers 24 Mar '15

24 Mar '15

In doing a pass through all the code, I found a number of global variables which were reasonable candidates to reduce in size, typically from int to u8. Also a large array in the keyboard code was packed. This change reduces the resulting size by 240 bytes in my case. Signed-off-by: Bruce Rogers <brogers(a)suse.com> --- src/boot.c | 16 ++++++++-------- src/bootsplash.c | 2 +- src/hw/usb-xhci.c | 31 +++++++++++++++---------------- src/hw/usb.c | 2 +- src/kbd.c | 2 +- src/stacks.c | 2 +- src/vgahooks.c | 6 +++--- 7 files changed, 30 insertions(+), 31 deletions(-) diff --git a/src/boot.c b/src/boot.c index d6b1fb7..8238f62 100644 --- a/src/boot.c +++ b/src/boot.c @@ -26,7 +26,7 @@ ****************************************************************/ static char **Bootorder VARVERIFY32INIT; -static int BootorderCount; +static u8 BootorderCount; static void loadBootOrder(void) @@ -240,7 +240,7 @@ int bootprio_find_usb(struct usbdevice_s *usbdev, int lun) ****************************************************************/ static int BootRetryTime; -static int CheckFloppySig = 1; +static u8 CheckFloppySig = 1; #define DEFAULT_PRIO 9999 @@ -520,8 +520,8 @@ struct bev_s { u32 vector; }; static struct bev_s BEV[20]; -static int BEVCount; -static int HaveHDBoot, HaveFDBoot; +static u8 BEVCount; +static u8 HaveHDBoot, HaveFDBoot; static void add_bev(int type, u32 vector) @@ -600,7 +600,7 @@ call_boot_entry(struct segoff_s bootsegip, u8 bootdrv) // Boot from a disk (either floppy or harddrive) static void -boot_disk(u8 bootdrv, int checksig) +boot_disk(u8 bootdrv, u8 checksig) { u16 bootseg = 0x07c0; @@ -700,7 +700,7 @@ boot_fail(void) // Determine next boot method and attempt a boot using it. static void -do_boot(int seq_nr) +do_boot(u8 seq_nr) { if (! CONFIG_BOOT) panic("Boot support not compiled in.\n"); @@ -740,14 +740,14 @@ do_boot(int seq_nr) call16_int(0x18, &br); } -int BootSequence VARLOW = -1; +u8 BootSequence VARLOW = -1; // Boot Failure recovery: try the next device. void VISIBLE32FLAT handle_18(void) { debug_enter(NULL, DEBUG_HDL_18); - int seq = BootSequence + 1; + u8 seq = BootSequence + 1; BootSequence = seq; do_boot(seq); } diff --git a/src/bootsplash.c b/src/bootsplash.c index c572685..0b66a04 100644 --- a/src/bootsplash.c +++ b/src/bootsplash.c @@ -91,7 +91,7 @@ find_videomode(struct vbe_info *vesa_info, struct vbe_mode_info *mode_info } } -static int BootsplashActive; +static u8 BootsplashActive; void enable_bootsplash(void) diff --git a/src/hw/usb-xhci.c b/src/hw/usb-xhci.c index fd58334..a92a8b3 100644 --- a/src/hw/usb-xhci.c +++ b/src/hw/usb-xhci.c @@ -271,16 +271,14 @@ static const char *speed_name[16] = { [ 4 ] = "Super", }; -static const int speed_from_xhci[16] = { - [ 0 ] = -1, - [ 1 ] = USB_FULLSPEED, - [ 2 ] = USB_LOWSPEED, - [ 3 ] = USB_HIGHSPEED, - [ 4 ] = USB_SUPERSPEED, - [ 5 ... 15 ] = -1, +static const u8 speed_from_xhci[] = { + [ 0 ] = USB_FULLSPEED, + [ 1 ] = USB_LOWSPEED, + [ 2 ] = USB_HIGHSPEED, + [ 3 ] = USB_SUPERSPEED, }; -static const int speed_to_xhci[] = { +static const u8 speed_to_xhci[] = { [ USB_FULLSPEED ] = 1, [ USB_LOWSPEED ] = 2, [ USB_HIGHSPEED ] = 3, @@ -350,23 +348,24 @@ xhci_hub_reset(struct usbhub_s *hub, u32 port) { struct usb_xhci_s *xhci = container_of(hub->cntl, struct usb_xhci_s, usb); u32 portsc = readl(&xhci->pr[port].portsc); - int rc; + unsigned int index; + int rc = -1; switch (xhci_get_field(portsc, XHCI_PORTSC_PLS)) { - case PLS_U0: - rc = speed_from_xhci[xhci_get_field(portsc, XHCI_PORTSC_SPEED)]; - break; case PLS_POLLING: xhci_print_port_state(3, __func__, port, portsc); portsc |= XHCI_PORTSC_PR; writel(&xhci->pr[port].portsc, portsc); if (wait_bit(&xhci->pr[port].portsc, XHCI_PORTSC_PED, XHCI_PORTSC_PED, 100) != 0) - return -1; + return rc; portsc = readl(&xhci->pr[port].portsc); - rc = speed_from_xhci[xhci_get_field(portsc, XHCI_PORTSC_SPEED)]; + // fall through + case PLS_U0: + index = xhci_get_field(portsc, XHCI_PORTSC_SPEED) - 1; + if (index < 4) + rc = speed_from_xhci[index]; break; default: - rc = -1; break; } @@ -834,7 +833,7 @@ xhci_alloc_inctx(struct usbdevice_s *usbdev, int maxepid) struct xhci_slotctx *slot = (void*)&in[1 << xhci->context64]; slot->ctx[0] |= maxepid << 27; // context entries - slot->ctx[0] |= speed_to_xhci[usbdev->speed] << 20; + slot->ctx[0] |= (u32)speed_to_xhci[usbdev->speed] << 20; // Set high-speed hub flags. struct usbdevice_s *hubdev = usbdev->hub->usbdev; diff --git a/src/hw/usb.c b/src/hw/usb.c index 1b4ea8b..6ceeda5 100644 --- a/src/hw/usb.c +++ b/src/hw/usb.c @@ -278,7 +278,7 @@ set_configuration(struct usb_pipe *pipe, u16 val) * Initialization and enumeration ****************************************************************/ -static const int speed_to_ctlsize[] = { +static const u16 speed_to_ctlsize[] = { [ USB_FULLSPEED ] = 8, [ USB_LOWSPEED ] = 8, [ USB_HIGHSPEED ] = 64, diff --git a/src/kbd.c b/src/kbd.c index a5a1ad9..43ae351 100644 --- a/src/kbd.c +++ b/src/kbd.c @@ -289,7 +289,7 @@ static struct scaninfo { u16 control; u16 alt; u8 lock_flags; -} scan_to_scanascii[] VAR16 = { +} PACKED scan_to_scanascii[] VAR16 = { { none, none, none, none, none }, { 0x011b, 0x011b, 0x011b, 0x0100, none }, /* escape */ { 0x0231, 0x0221, none, 0x7800, none }, /* 1! */ diff --git a/src/stacks.c b/src/stacks.c index 1dbdfe9..e510a2f 100644 --- a/src/stacks.c +++ b/src/stacks.c @@ -742,7 +742,7 @@ mutex_unlock(struct mutex_s *mutex) * Thread preemption ****************************************************************/ -int CanPreempt VARFSEG; +u8 CanPreempt VARFSEG; static u32 PreemptCount; // Turn on RTC irqs and arrange for them to check the 32bit threads. diff --git a/src/vgahooks.c b/src/vgahooks.c index 6a4acfe..3fc716a 100644 --- a/src/vgahooks.c +++ b/src/vgahooks.c @@ -18,7 +18,7 @@ #define VH_INTEL 2 #define VH_SMI 3 -int VGAHookHandlerType VARFSEG; +u8 VGAHookHandlerType VARFSEG; static void handle_155fXX(struct bregs *regs) @@ -308,7 +308,7 @@ handle_155f(struct bregs *regs) return; } - int htype = GET_GLOBAL(VGAHookHandlerType); + u8 htype = GET_GLOBAL(VGAHookHandlerType); switch (htype) { case VH_VIA: via_155f(regs); break; case VH_INTEL: intel_155f(regs); break; @@ -325,7 +325,7 @@ handle_157f(struct bregs *regs) return; } - int htype = GET_GLOBAL(VGAHookHandlerType); + u8 htype = GET_GLOBAL(VGAHookHandlerType); switch (htype) { case VH_SMI: smi_157f(regs); break; default: handle_157fXX(regs); break; -- 1.9.0

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[Mohon Peak] Console output behavior before and after call to int19h
by Patrick Agrain 24 Mar '15

24 Mar '15

Hello, Purpose: Get the output sent through int10h on an external serial link mapped on MEM space (PCIe board with OxPCIe952 from Startech). Hardware: Mohon Peak CRB with coreboot. PCIe board with OxPCIe952 from Startech. Bootable hard disk with GRUB and Linux. Code flow: (from my understanding) <...> ./src/post.c: mainint() |--> interactive_bootmenu() | |--> "Press ESC for boot menu." (sent through INT10h calls) | |--> startBoot() |--> "Jump to int19" |--> Call INT19h <INT19h handler> ./src/boot.c: do_boot() |--> "Booting from Hard Disk..." (sent through INT10h calls) |--> boot_disk() |--> Call INT13h <...> What works: Modified seabios to initialize PCIe board OxPCIe952. - Add field at the end of BDA to store the u32 base address of the additional UART ports. - Init the bridge after pci_probe(). - Store the base address of the additional UART ports during serial_setup(). Using sgabios with output set to 0x2f8 (uart1) works flawlessly. - All (dprintf-based) messages are sent on second UART port of the Mohon Peak. - All (printf-based, INT10h) messages are also displayed on second UART port of the Mohon Peak. - System boots. What almost works: Modified sgabios to display INT10h calls on MEM mapped UART port. - All (dprintf-based) messages are still sent on second UART port of the Mohon Peak. - Display of "Press ESC for boot menu." on OxPCIe952 : OK (any previous INT10h-based messages also displayed on OxPCIe952). - After call of INT19h, "Booting from Hard Disk..." is not displayed on OxPCIe952. - Mohon Peak remains in POST code F8h (like as for waiting a selection in the GRUB menu). Note: reducing debug level (20 -> 2) of int10h shows that the int10h-handler is called with the messages to be displayed, but nothing appears on OxPCIe952 side. What could be the reason of this behavior ? Any switch between 16-bit and 32-bit code execution ? Any suggestion is welcome. Regards, Patrick Agrain

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Re: [SeaBIOS] Orom execution issue.
by Kevin O'Connor 24 Mar '15

24 Mar '15

On Mon, Mar 23, 2015 at 08:25:15PM +0530, Naresh G. Solanki wrote: > Dear All, > > I'm porting coreboot with seabios payload on a e6xx processor based board. > Seabios is executing properly but when it tries to execute vga bios of pcie > graphic card(copied @ C000:0000), it hangs and doesn't returns. > > Can anyone give me suggestion on how to find the cause of the issue and > resolve it so that it executes properly. It is often very difficult to trace option rom problems. If you post the full debug log, we can point out any obvious problems. -Kevin

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Orom execution issue.
by Naresh G. Solanki 23 Mar '15

23 Mar '15

Dear All, I'm porting coreboot with seabios payload on a e6xx processor based board. Seabios is executing properly but when it tries to execute vga bios of pcie graphic card(copied @ C000:0000), it hangs and doesn't returns. Can anyone give me suggestion on how to find the cause of the issue and resolve it so that it executes properly. - N Solanki

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Re: [SeaBIOS] IDT issue
by Kevin O'Connor 23 Mar '15

23 Mar '15

On Thu, Mar 19, 2015 at 07:24:09PM +0530, Naresh G. Solanki wrote: > As per the document > > http://www.intel.com/content/www/us/en/intelligent-systems/queens-bay/atom-… > > Table 15 specifies about how to enable 0xE0000/0xF0000 segment. > As per that I have enabled the segment. Is that OK. That sounds like it. But, if it still doesn't work, then it is something else. :-) You could also try asking on the coreboot list. They are likely more familiar with the intel chipsets. -Kevin

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[PATCH 0/3] checkstack.py code cleanup
by Kevin O'Connor 22 Mar '15

22 Mar '15

The checkstack.py script (which tries to estimate the stack usage of generated C code) was in need of a little cleanup. I actually wanted to use the script in another project and so needed to clean it up. I think it's worthwhile to push the changes back into the repo though. There should be no functional changes in this series. -Kevin Kevin O'Connor (3): checkstack: Replace function information tuple with class checkstack: Simplify yield calculations checkstack: Prefer passing "function" class instead of function address scripts/checkstack.py | 184 ++++++++++++++++++++++++-------------------------- 1 file changed, 89 insertions(+), 95 deletions(-) -- 1.9.3

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[PATCHv3] vgabios: Don't use extra stack if it appears a modern OS is in use
by Kevin O'Connor 22 Mar '15

22 Mar '15

If the last mode set (while not in vm86 mode) was done from a VBE mode set call then disable the extra stack. This works under the premise that only a modern OS would invoke the VBE mode changing facilities and a modern OS would always call the vgabios with sufficient stack space. This is an ugly hack to work around a problem Windows Vista (and possibly later Windows releases) has with the VGA BIOS using a stack in the e-segment. Reported-by: Richard Laager <rlaager(a)wiktel.com> Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- Unfortunately, the previous patch I sent would not work well if a boot loader issues a VBE mode set call. (Indeed, SeaBIOS itself will issue a vbe mode set call when a bootsplash image is in use.) In that situation, with the previous patch, the extra stack would be disabled prematurely. This patch extends the previous idea - it disables the extra stack if the last video mode switch was a vbe mode switch. Thus, if a bootloader (or seabios itself) switches modes via vbe, but then switches back using a legacy mode switch, the extra stack will get reenabled. I've also thrown in the extra check of only changing the extra stack setting if the last mode change was not done in vm86 mode. This wasn't required in my tests with skifree, but I added in to make sure a mode switch from within a Windows emulation session wouldn't reenable the extra stack and cause a fault. Patch is also at: https://github.com/KevinOConnor/seabios/tree/testing -Kevin --- src/x86.h | 5 +++++ vgasrc/vgabios.c | 3 +++ vgasrc/vgabios.h | 4 +++- vgasrc/vgaentry.S | 15 +++++++++++++++ 4 files changed, 26 insertions(+), 1 deletion(-) diff --git a/src/x86.h b/src/x86.h index 7798b1c..14ebb7d 100644 --- a/src/x86.h +++ b/src/x86.h @@ -83,6 +83,11 @@ static inline u32 getcr0(void) { static inline void setcr0(u32 cr0) { asm("movl %0, %%cr0" : : "r"(cr0)); } +static inline u16 getcr0_vm86(void) { + u16 cr0; + asm("smsww %0" : "=r"(cr0)); + return cr0; +} static inline u64 rdmsr(u32 index) { diff --git a/vgasrc/vgabios.c b/vgasrc/vgabios.c index 4aa50e1..ec064fd 100644 --- a/vgasrc/vgabios.c +++ b/vgasrc/vgabios.c @@ -304,6 +304,9 @@ vga_set_mode(int mode, int flags) SET_BDA(video_mode, 0xff); SET_BDA_EXT(vbe_mode, mode | (flags & MF_VBEFLAGS)); SET_BDA_EXT(vgamode_offset, (u32)vmode_g); + if (!(getcr0_vm86() & CR0_PE)) + MASK_BDA_EXT(flags, BF_LEGACY_MODE + , (flags & MF_LEGACY) ? BF_LEGACY_MODE : 0); if (memmodel == MM_TEXT) { SET_BDA(video_cols, width); SET_BDA(video_rows, height-1); diff --git a/vgasrc/vgabios.h b/vgasrc/vgabios.h index fd796f2..b3c5594 100644 --- a/vgasrc/vgabios.h +++ b/vgasrc/vgabios.h @@ -62,7 +62,8 @@ struct gfx_op { #define GO_MEMSET 3 #define GO_MEMMOVE 4 -// Custom internal storage in BDA +// Custom internal storage in BDA (don't change here without also +// updating vgaentry.S) #define VGA_CUSTOM_BDA 0xb9 struct vga_bda_s { @@ -74,6 +75,7 @@ struct vga_bda_s { #define BF_PM_MASK 0x0f #define BF_EMULATE_TEXT 0x10 #define BF_SWCURSOR 0x20 +#define BF_LEGACY_MODE 0x40 #define GET_BDA_EXT(var) \ GET_FARVAR(SEG_BDA, ((struct vga_bda_s *)VGA_CUSTOM_BDA)->var) diff --git a/vgasrc/vgaentry.S b/vgasrc/vgaentry.S index f9cf656..a1646a9 100644 --- a/vgasrc/vgaentry.S +++ b/vgasrc/vgaentry.S @@ -104,6 +104,9 @@ entry_10: ENTRY_ARG_VGA handle_10 iretw +#define VGA_CUSTOM_BDA_FLAGS 0xb9 +#define BF_LEGACY_MODE 0x40 + // Entry point using extra stack DECLFUNC entry_10_extrastack entry_10_extrastack: @@ -111,6 +114,13 @@ entry_10_extrastack: cld pushw %ds // Set %ds:%eax to space on ExtraStack pushl %eax + + movw $SEG_BDA, %ax // Check if extra stack is enabled + movw %ax, %ds + movb VGA_CUSTOM_BDA_FLAGS, %al + testb $BF_LEGACY_MODE, %al + jz 1f + movw %cs:ExtraStackSeg, %ds movl $(CONFIG_VGA_EXTRA_STACK_SIZE-PUSHBREGS_size-16), %eax SAVEBREGS_POP_DSEAX // Save registers on extra stack @@ -134,6 +144,11 @@ entry_10_extrastack: RESTOREBREGS_DSEAX iretw +1: // Use regular entry point if the extra stack is disabled + popl %eax + popw %ds + jmp entry_10 + // Timer irq handling DECLFUNC entry_timer_hook entry_timer_hook: -- 1.9.3

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[PATCH] checkrom: Fix typo in error message
by Andreas Färber 21 Mar '15

21 Mar '15

increate -> increase Signed-off-by: Andreas Färber <afaerber(a)suse.de> --- scripts/checkrom.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/checkrom.py b/scripts/checkrom.py index 377277d..aced5e2 100755 --- a/scripts/checkrom.py +++ b/scripts/checkrom.py @@ -39,7 +39,7 @@ def main(): finalsize = 256*1024 if datasize > finalsize: print("Error! ROM doesn't fit (%d > %d)" % (datasize, finalsize)) - print(" You have to either increate the size (CONFIG_ROM_SIZE)") + print(" You have to either increase the size (CONFIG_ROM_SIZE)") print(" or turn off some features (such as hardware support not") print(" needed) to make it fit. Trying a more recent gcc version") print(" might work too.") -- 2.1.4

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SeaBIOS March 2015