SeaBIOS August 2012

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Stance on TPM?
by Fred . 04 Aug '12

04 Aug '12

What is SeaBIOS stance on Trusted Platform Module (TPM) ?

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IEEE 1394 interface booting
by Fred . 04 Aug '12

04 Aug '12

Add support for booting from IEEE 1394 (aka FireWire) interface.

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Re: [SeaBIOS] Compiling SeaBIOS for coreboot has problems with its ACPI code
by Paolo Bonzini 03 Aug '12

03 Aug '12

Il 03/08/2012 05:07, Moore, Robert ha scritto: > Perhaps there is a compatibility flag (or some other flag) to disable the code that is emitted below? No, there isn't, but you can exploit the fact that only the new Bison will define a header guard (ASLCOMPILER_ASLCOMPILERPARSE_H). So you can avoid redeclaring AslCompilerparse and AslCompilerdebug if that symbol is defined. Paolo >> >-----Original Message----- >> >From: Moore, Robert >> >Sent: Tuesday, July 31, 2012 2:31 PM >> >To: Idwer Vollering >> >Cc: Michael S. Tsirkin; Kevin O'Connor; seabios(a)seabios.org; Tang, Feng >> >Subject: RE: [SeaBIOS] Compiling SeaBIOS for coreboot has problems with its >> >ACPI code >> > >> >Yes, for whatever reason, it is definitely an issue with the newer version >> >of bison. None of the code below is output with bison 2.4.2: >> > >> > >> >#if YYDEBUG >> >extern int AslCompilerdebug; >> >#endif >> > >> >#ifdef YYPARSE_PARAM >> >#if defined __STDC__ || defined __cplusplus >> >int AslCompilerparse (void *YYPARSE_PARAM); >> >#else >> >int AslCompilerparse (); >> >#endif >> >#else /* ! YYPARSE_PARAM */ >> >#if defined __STDC__ || defined __cplusplus >> >int AslCompilerparse (void); >> >#else >> >int AslCompilerparse (); >> >#endif >> >#endif /* ! YYPARSE_PARAM */

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Re: [SeaBIOS] Compiling SeaBIOS for coreboot has problems with its ACPI code
by Michael S. Tsirkin 03 Aug '12

03 Aug '12

On Fri, Aug 03, 2012 at 01:32:09PM +0200, Idwer Vollering wrote: > 2012/8/2 Michael S. Tsirkin <mst(a)redhat.com>: > > On Tue, Jul 31, 2012 at 09:12:51PM -0400, Kevin O'Connor wrote: > >> On Tue, Jul 31, 2012 at 08:02:45PM +0200, Idwer Vollering wrote: > >> > 2012/7/31 Moore, Robert <robert.moore(a)intel.com>: > >> > > Please let me know if the -Pn option works for you. > >> > > Thanks, > >> > > Bob > >> > > >> > -Pn works for me, on acpica-20120420-64. > >> > >> It looks like "-Pn" only works on newer versions of iasl. Can you > >> confirm the SeaBIOS patch below works with a newer iasl? > >> > >> -Kevin > > > > It doesn't work for me. > > Can you try acpica-unix-20120215? Out of time for now. It should not matter I think - I think Kevin's patch had some bugs unrelated to acpica. > > > > BTW you can clone from: > > > > git://github.com/otcshare/acpica.git > > > > Then just cd acpica, then make and iasl will be generated in > > generate/unix/iasl/obj32/iasl > > > > The following works for me with latest iasl from git as well > > as 20100528 that Fedora 17 ships. > > > > ---> > > > > acpi: fix build with new iasl compiler > > > > iasl versions starting with 20120320 > > (git commit 7fd09d993580e22a096a1b21d2a356d89e702153) enable > > a preprocessor by default, which currently strips out > > comments from the input. Happily the next release, > > 20120420, includes an option to disable the preprocessor. > > Test and use this option when available. > > > > Signed-off-by: Michael S. Tsirkin <mst(a)redhat.com> > > > > --- > > > > diff --git a/Makefile b/Makefile > > index dfdec5c..849824d 100644 > > --- a/Makefile > > +++ b/Makefile > > @@ -221,11 +221,14 @@ $(OUT)vgabios.bin: $(OUT)vgabios.bin.raw tools/buildrom.py > > > > ################ DSDT build rules > > > > +iasl-option=$(shell if "$(1)" "$(2)" -h > /dev/null 2>&1 \ > > + ; then echo "$(2)"; else echo "$(3)"; fi ;) > > + > > $(OUT)%.hex: src/%.dsl ./tools/acpi_extract_preprocess.py ./tools/acpi_extract.py > > @echo " Compiling IASL $@" > > $(Q)cpp -P $< > $(OUT)$*.dsl.i.orig > > $(Q)$(PYTHON) ./tools/acpi_extract_preprocess.py $(OUT)$*.dsl.i.orig > $(OUT)$*.dsl.i > > - $(Q)$(IASL) -vs -l -tc -p $(OUT)$* $(OUT)$*.dsl.i > > + $(Q)$(IASL) $(call iasl-option,$(IASL),-Pn,) -vs -l -tc -p $(OUT)$* $(OUT)$*.dsl.i > > $(Q)$(PYTHON) ./tools/acpi_extract.py $(OUT)$*.lst > $(OUT)$*.off > > $(Q)cat $(OUT)$*.off > $@ > >

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Re: [SeaBIOS] [BUG] BSOD on Win2003 Server when 64bit PCI resource is present
by Paolo Bonzini 03 Aug '12

03 Aug '12

Il 26/07/2012 17:38, Alexey Korolev ha scritto: > HI, > > Current version of Seabios is causing blue screen on Windows2003 when 64bit PCI resource is present and occupies high memory. > > BSOD Error code is: 0x000000A5 (0x02, 0xFFFFfADF6A446880, 0x1, 0xFFFFFADFAA34690) > > The issue is localized, it is related to presence of 64bit resource in _CRS method. > > If we disable a 64bit region from _CRS the Win2003 load normally but this doesn't allow Windows to use 64bit resources. > > At the moment I have no idea how to fix this. Please help! I wonder if Windows 2003 does not support ConcatenateResTemplate. The patch below is obviously wrong, but should let you check if this is the issue: git diff src/acpi-dsdt.dsl diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl index 72dc7d8..11a9c92 100644 --- a/src/acpi-dsdt.dsl +++ b/src/acpi-dsdt.dsl @@ -175,9 +175,6 @@ DefinitionBlock ( 0x00000000, // Address Translation Offset 0x1EC00000, // Address Length ,, PW32, AddressRangeMemory, TypeStatic) - }) - Name (CR64, ResourceTemplate () - { QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Address Space Granularity 0x8000000000, // Address Range Minimum @@ -221,20 +218,14 @@ DefinitionBlock ( Store (P0EL, PE32) Store (P0LL, PL32) - If (LAnd(LEqual(P1SL, 0x00), LEqual(P1SH, 0x00))) { - Return (CRES) - } Else { /* fixup 64bit pci io window */ - CreateQWordField (CR64,\_SB.PCI0.PW64._MIN, PS64) - CreateQWordField (CR64,\_SB.PCI0.PW64._MAX, PE64) - CreateQWordField (CR64,\_SB.PCI0.PW64._LEN, PL64) + CreateQWordField (CRES,\_SB.PCI0.PW64._MIN, PS64) + CreateQWordField (CRES,\_SB.PCI0.PW64._MAX, PE64) + CreateQWordField (CRES,\_SB.PCI0.PW64._LEN, PL64) Store (P1S, PS64) Store (P1E, PE64) Store (P1L, PL64) - /* add window and return result */ - ConcatenateResTemplate (CRES, CR64, Local0) - Return (Local0) - } + Return (CRES) } } } Paolo

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Re: [SeaBIOS] Compiling SeaBIOS for coreboot has problems with its ACPI code
by Moore, Robert 03 Aug '12

03 Aug '12

Perhaps there is a compatibility flag (or some other flag) to disable the code that is emitted below? >-----Original Message----- >From: Moore, Robert >Sent: Tuesday, July 31, 2012 2:31 PM >To: Idwer Vollering >Cc: Michael S. Tsirkin; Kevin O'Connor; seabios(a)seabios.org; Tang, Feng >Subject: RE: [SeaBIOS] Compiling SeaBIOS for coreboot has problems with its >ACPI code > >Yes, for whatever reason, it is definitely an issue with the newer version >of bison. None of the code below is output with bison 2.4.2: > > >#if YYDEBUG >extern int AslCompilerdebug; >#endif > >#ifdef YYPARSE_PARAM >#if defined __STDC__ || defined __cplusplus >int AslCompilerparse (void *YYPARSE_PARAM); >#else >int AslCompilerparse (); >#endif >#else /* ! YYPARSE_PARAM */ >#if defined __STDC__ || defined __cplusplus >int AslCompilerparse (void); >#else >int AslCompilerparse (); >#endif >#endif /* ! YYPARSE_PARAM */ > > > >> -----Original Message----- >> From: Idwer Vollering [mailto:vidwer@gmail.com] >> Sent: Tuesday, July 31, 2012 2:20 PM >> To: Moore, Robert >> Cc: Michael S. Tsirkin; Kevin O'Connor; seabios(a)seabios.org; Tang, Feng >> Subject: Re: [SeaBIOS] Compiling SeaBIOS for coreboot has problems with >> its ACPI code >> >> 2012/7/31 Moore, Robert <robert.moore(a)intel.com>: >> > And, could you please send the bison output file "aslcompilerparse.h" >> > >> > Thanks, >> > Bob >> >> Attached.

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[SeaBIOS PATCH 0/2] Allow non-contiguous APIC IDs (v3)
by Eduardo Habkost 02 Aug '12

02 Aug '12

Changes v2 -> v3: - Report I/O APIC ID = 0 on MP-table, too Changes v1 -> v2: - Patch 1/2: cosmetic whitespace change - Patch 2/2: use size suffixes on asm instructions on smp.c - New patch descriptions Eduardo Habkost (2): report real I/O APIC ID (0) on MADT and MP-table (v3) allow CPUs to have non-contiguous Local APIC IDs (v2) src/acpi-dsdt.dsl | 4 +++- src/acpi.c | 11 ++++++----- src/config.h | 1 + src/mptable.c | 4 ++-- src/smp.c | 17 +++++++++++++++++ src/util.h | 1 + 6 files changed, 30 insertions(+), 8 deletions(-) -- 1.7.10.4

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[PATCH 0/6] Build PCI hotplug SSDT from a single template
by Paolo Bonzini 01 Aug '12

01 Aug '12

More than 1kb of data is taken by the 32 copies of the PCI hotplug SSDT methods. We can build them from a single template like we do for CPUs. This series does exactly this. Patches 1 and 2 prepare for the change, by moving other pieces of ssdt-pcihd.dsl out of the way. Patch 3 is also a simple rename and patch 4 fixes a bug in acpi_extract. Patches 5 and 6 finally do the movement. Paolo Bonzini (6): acpi: move PCNT to DSDT acpi: move s3/s4/s5 to build_ssdt acpi: rename Processor SSDT constants acpi_extract: fix off-by-one acpi_extract: detect DeviceOp acpi: build PCI hotplug devices from a single template Makefile | 2 +- src/acpi-dsdt.dsl | 39 +++++++++++- src/acpi.c | 161 ++++++++++++++++++++++++++----------------------- src/ssdt-pcihp.dsl | 124 ++++--------------------------------- src/ssdt-susp.dsl | 41 +++++++++++++ tools/acpi_extract.py | 30 ++++++++- 6 files changed, 206 insertions(+), 191 deletions(-) create mode 100644 src/ssdt-susp.dsl -- 1.7.10.4

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[PATCH] EHCI: increase CONNECT detection delay
by Sven Schnelle 01 Aug '12

01 Aug '12

1ms seems to short on my chromebook, increasing that to 5ms makes EHCI work. Signed-off-by: Sven Schnelle <svens(a)stackframe.org> --- src/usb-ehci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/usb-ehci.c b/src/usb-ehci.c index 3c0be13..b53caa1 100644 --- a/src/usb-ehci.c +++ b/src/usb-ehci.c @@ -82,7 +82,7 @@ ehci_hub_detect(struct usbhub_s *hub, u32 port) writel(portreg, portsc); msleep(EHCI_TIME_POSTPOWER); } else { - msleep(1); // XXX - time for connect to be detected. + msleep(5); // XXX - time for connect to be detected. } portsc = readl(portreg); -- 1.7.10.4

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[PATCH v2] Add an IPMI SMBIOS entry
by minyard＠acm.org 01 Aug '12

01 Aug '12

From: Corey Minyard <cminyard(a)mvista.com> An IPMI device is being added to the qemu code, and it has an SMBIOS entry to describe the interface characteristics. So add the SMBIOS entry to the BIOS so it can handle this. Signed-off-by: Corey Minyard <cminyard(a)mvista.com> --- Makefile | 2 +- src/ipmi.c | 31 +++++++++++++++++++++++++++++++ src/ipmi.h | 32 ++++++++++++++++++++++++++++++++ src/post.c | 2 ++ src/smbios.c | 55 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ src/smbios.h | 12 ++++++++++++ src/util.h | 5 +++++ 7 files changed, 138 insertions(+), 1 deletions(-) create mode 100644 src/ipmi.c create mode 100644 src/ipmi.h diff --git a/Makefile b/Makefile index dfdec5c..1b6eb96 100644 --- a/Makefile +++ b/Makefile @@ -13,7 +13,7 @@ SRCBOTH=misc.c stacks.c pmm.c output.c util.c block.c floppy.c ata.c mouse.c \ pnpbios.c pirtable.c vgahooks.c ramdisk.c pcibios.c blockcmd.c \ usb.c usb-uhci.c usb-ohci.c usb-ehci.c usb-hid.c usb-msc.c \ virtio-ring.c virtio-pci.c virtio-blk.c virtio-scsi.c apm.c ahci.c \ - usb-uas.c lsi-scsi.c + usb-uas.c lsi-scsi.c ipmi.c SRC16=$(SRCBOTH) system.c disk.c font.c SRC32FLAT=$(SRCBOTH) post.c shadow.c memmap.c coreboot.c boot.c \ acpi.c smm.c mptable.c smbios.c pciinit.c optionroms.c mtrr.c \ diff --git a/src/ipmi.c b/src/ipmi.c new file mode 100644 index 0000000..bedcdc0 --- /dev/null +++ b/src/ipmi.c @@ -0,0 +1,31 @@ +// IPMI setup information +// +// Copyright (C) 2012 Corey Minyard <cminyard(a)mvista.com> +// +// This file may be distributed under the terms of the GNU LGPLv3 license. + +#include "ipmi.h" +#include "util.h" + +struct ipmi_info ipmi_info VAR16VISIBLE; + +void +ipmi_setup(void) +{ + u8 *data; + int size; + + data = romfile_loadfile("etc/ipmi", &size); + if (!data || (size < sizeof(ipmi_info))) { + ipmi_info.interface = 0; /* Disable */ + return; + } + + if (size > sizeof(ipmi_info)) + size = sizeof(ipmi_info); + + memcpy(&ipmi_info, data, size); + free(data); + + ipmi_info.base_addr = le64_to_cpu(ipmi_info.base_addr); +} diff --git a/src/ipmi.h b/src/ipmi.h new file mode 100644 index 0000000..85fdf42 --- /dev/null +++ b/src/ipmi.h @@ -0,0 +1,32 @@ +// IPMI setup information +// +// Copyright (C) 2012 Corey Minyard <cminyard(a)mvista.com> +// +// This file may be distributed under the terms of the GNU LGPLv3 license. + +#ifndef __IPMI_H +#define __IPMI_H + +#include "config.h" // CONFIG_COREBOOT +#include "types.h" + +#define IPMI_MEM_SPACE 0 +#define IPMI_IO_SPACE 1 + +struct ipmi_info { + u8 str_version; /* Version of this structure */ + u8 interface; + u8 reg_space; + u8 reg_spacing; + u8 slave_addr; + u8 irq; + u8 version; + u8 reserved1; + u64 base_addr; +} PACKED; + +extern struct ipmi_info ipmi_info; + +void ipmi_setup(void); + +#endif diff --git a/src/post.c b/src/post.c index 0f31b4c..69834b6 100644 --- a/src/post.c +++ b/src/post.c @@ -28,6 +28,7 @@ #include "virtio-blk.h" // virtio_blk_setup #include "virtio-scsi.h" // virtio_scsi_setup #include "lsi-scsi.h" // lsi_scsi_setup +#include "ipmi.h" // ipmi_setup /**************************************************************** @@ -255,6 +256,7 @@ maininit(void) pnp_setup(); kbd_setup(); mouse_setup(); + ipmi_setup(); init_bios_tables(); // Run vga option rom diff --git a/src/smbios.c b/src/smbios.c index fc84aad..f480a8d 100644 --- a/src/smbios.c +++ b/src/smbios.c @@ -8,6 +8,7 @@ #include "util.h" // dprintf #include "paravirt.h" // qemu_cfg_smbios_load_field #include "smbios.h" // struct smbios_entry_point +#include "ipmi.h" // struct ipmi_info struct smbios_entry_point *SMBiosAddr; @@ -422,6 +423,58 @@ smbios_init_type_32(void *start) return start+2; } +/* Type 38 -- System Boot Information */ +static void * +smbios_init_type_38(void *start, struct ipmi_info *info) +{ + struct smbios_type_38 *p = (struct smbios_type_38 *)start; + + p->header.type = 38; + p->header.length = sizeof(struct smbios_type_38); + p->header.handle = 0x2100; + + p->interface_type = info->interface; + + p->base_addr = info->base_addr & ~1ULL; + /* Bit 0 goes into a special place */ + p->base_addr_mod_and_irq_info = (info->base_addr & 1) << 4; + + switch (info->reg_spacing) { + case 4: + p->base_addr_mod_and_irq_info |= (1 << 6); + break; + case 16: + p->base_addr_mod_and_irq_info |= (2 << 6); + break; + case 1: + default: + /* zero is the right value */ + break; + } + + if (info->reg_space) + p->base_addr |= 1; /* I/O space */ + + if (info->version) + p->ipmi_version = info->version; + else + p->ipmi_version = 0x15; + + if (info->slave_addr) + p->i2c_slave_addr = info->slave_addr; + else + p->i2c_slave_addr = 0x20; + + p->nv_storage_dev_addr = 0; + + p->interrupt_number = info->irq; + + start += sizeof(struct smbios_type_38); + *((u16 *)start) = 0; + + return start+2; +} + /* Type 127 -- End of Table */ static void * smbios_init_type_127(void *start) @@ -510,6 +563,8 @@ smbios_init(void) } add_struct(32, p); + if (ipmi_info.interface) + add_struct(38, p, &ipmi_info); /* Add any remaining provided entries before the end marker */ for (i = 0; i < 256; i++) qemu_cfg_smbios_load_external(i, &p, &nr_structs, &max_struct_size, diff --git a/src/smbios.h b/src/smbios.h index 9d54e80..1935335 100644 --- a/src/smbios.h +++ b/src/smbios.h @@ -160,6 +160,18 @@ struct smbios_type_32 { u8 boot_status; } PACKED; +/* SMBIOS type 38 - IPMI Information */ +struct smbios_type_38 { + struct smbios_structure_header header; + u8 interface_type; + u8 ipmi_version; + u8 i2c_slave_addr; + u8 nv_storage_dev_addr; + u64 base_addr; + u8 base_addr_mod_and_irq_info; + u8 interrupt_number; +} PACKED; + /* SMBIOS type 127 -- End-of-table */ struct smbios_type_127 { struct smbios_structure_header header; diff --git a/src/util.h b/src/util.h index ef8ec7c..415f518 100644 --- a/src/util.h +++ b/src/util.h @@ -134,6 +134,11 @@ static inline u32 le32_to_cpu(u32 x) return x; } +static inline u64 le64_to_cpu(u64 x) +{ + return x; +} + static inline u32 getesp(void) { u32 esp; asm("movl %%esp, %0" : "=rm"(esp)); -- 1.7.4.1

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SeaBIOS August 2012