SeaBIOS July 2012

seabios@seabios.org

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119 discussions

[RFC PATCH v2 08/21] pc: calculate dimm physical addresses and adjust memory map
by Vasilis Liaskovitis 11 Jul '12

11 Jul '12

Dimm physical address offsets are calculated automatically and memory map is adjusted accordingly. If a DIMM can fit before the PCI_HOLE_START (currently 0xe0000000), it will be added normally, otherwise its physical address will be above 4GB. Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> --- hw/pc.c | 41 +++++++++++++++++++++++++++++++++++++++++ hw/pc.h | 6 ++++++ hw/pc_piix.c | 18 ++++++++++++------ vl.c | 1 + 4 files changed, 60 insertions(+), 6 deletions(-) diff --git a/hw/pc.c b/hw/pc.c index c7e9ab3..ef9901a 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -48,6 +48,7 @@ #include "memory.h" #include "exec-memory.h" #include "arch_init.h" +#include "dimm.h" /* output Bochs bios info messages */ //#define DEBUG_BIOS @@ -89,6 +90,9 @@ struct e820_table { static struct e820_table e820_table; struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX}; +ram_addr_t below_4g_hp_mem_size = 0; +ram_addr_t above_4g_hp_mem_size = 0; +extern target_phys_addr_t ram_hp_offset; void gsi_handler(void *opaque, int n, int level) { GSIState *s = opaque; @@ -1182,3 +1186,40 @@ void pc_pci_device_init(PCIBus *pci_bus) pci_create_simple(pci_bus, -1, "lsi53c895a"); } } + + +/* Function to configure memory offsets of hotpluggable dimms */ + +target_phys_addr_t pc_set_hp_memory_offset(uint64_t size) +{ + target_phys_addr_t ret; + + /* on first call, initialize ram_hp_offset */ + if (!ram_hp_offset) { + if (ram_size >= PCI_HOLE_START ) { + ram_hp_offset = 0x100000000LL + (ram_size - PCI_HOLE_START); + } else { + ram_hp_offset = ram_size; + } + } + + if (ram_hp_offset >= 0x100000000LL) { + ret = ram_hp_offset; + above_4g_hp_mem_size += size; + ram_hp_offset += size; + } + /* if dimm fits before pci hole, append it normally */ + else if (ram_hp_offset + size <= PCI_HOLE_START) { + ret = ram_hp_offset; + below_4g_hp_mem_size += size; + ram_hp_offset += size; + } + /* otherwise place it above 4GB */ + else { + ret = 0x100000000LL; + above_4g_hp_mem_size += size; + ram_hp_offset = 0x100000000LL + size; + } + + return ret; +} diff --git a/hw/pc.h b/hw/pc.h index 31ccb6f..15bdd7d 100644 --- a/hw/pc.h +++ b/hw/pc.h @@ -10,6 +10,7 @@ #include "memory.h" #include "ioapic.h" +#define PCI_HOLE_START 0xe0000000 /* PC-style peripherals (also used by other machines). */ /* serial.c */ @@ -218,6 +219,11 @@ static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) /* pc_sysfw.c */ void pc_system_firmware_init(MemoryRegion *rom_memory); +/* memory hotplug */ +target_phys_addr_t pc_set_hp_memory_offset(uint64_t size); +extern ram_addr_t below_4g_hp_mem_size; +extern ram_addr_t above_4g_hp_mem_size; + /* e820 types */ #define E820_RAM 1 #define E820_RESERVED 2 diff --git a/hw/pc_piix.c b/hw/pc_piix.c index 0c0096f..f3f1651 100644 --- a/hw/pc_piix.c +++ b/hw/pc_piix.c @@ -43,6 +43,7 @@ #include "xen.h" #include "memory.h" #include "exec-memory.h" +#include "dimm.h" #ifdef CONFIG_XEN # include <xen/hvm/hvm_info_table.h> #endif @@ -155,9 +156,9 @@ static void pc_init1(MemoryRegion *system_memory, kvmclock_create(); } - if (ram_size >= 0xe0000000 ) { - above_4g_mem_size = ram_size - 0xe0000000; - below_4g_mem_size = 0xe0000000; + if (ram_size >= PCI_HOLE_START ) { + above_4g_mem_size = ram_size - PCI_HOLE_START; + below_4g_mem_size = PCI_HOLE_START; } else { above_4g_mem_size = 0; below_4g_mem_size = ram_size; @@ -172,6 +173,9 @@ static void pc_init1(MemoryRegion *system_memory, rom_memory = system_memory; } + /* adjust memory map for hotplug dimms */ + dimm_calc_offsets(pc_set_hp_memory_offset); + /* allocate ram and load rom/bios */ if (!xen_enabled()) { fw_cfg = pc_memory_init(system_memory, @@ -192,9 +196,11 @@ static void pc_init1(MemoryRegion *system_memory, if (pci_enabled) { pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, &isa_bus, gsi, system_memory, system_io, ram_size, - below_4g_mem_size, - 0x100000000ULL - below_4g_mem_size, - 0x100000000ULL + above_4g_mem_size, + below_4g_mem_size + below_4g_hp_mem_size, + 0x100000000ULL - below_4g_mem_size + - below_4g_hp_mem_size, + 0x100000000ULL + above_4g_mem_size + + above_4g_hp_mem_size, (sizeof(target_phys_addr_t) == 4 ? 0 : ((uint64_t)1 << 62)), diff --git a/vl.c b/vl.c index 1329c30..0ff8818 100644 --- a/vl.c +++ b/vl.c @@ -176,6 +176,7 @@ DisplayType display_type = DT_DEFAULT; int display_remote = 0; const char* keyboard_layout = NULL; ram_addr_t ram_size; +ram_addr_t ram_hp_offset; const char *mem_path = NULL; #ifdef MAP_POPULATE int mem_prealloc = 0; /* force preallocation of physical target memory */ -- 1.7.9

1 0

[RFC PATCH v2 07/21] acpi_piix4: Implement memory device hotplug registers
by Vasilis Liaskovitis 11 Jul '12

11 Jul '12

A 32-byte register is used to present up to 256 hotplug-able memory devices to BIOS and OSPM. Hot-add and hot-remove functions trigger an ACPI hotplug event through these. Only reads are allowed from these registers. An ACPI hot-remove event but needs to wait for OSPM to eject the device. We use a single-byte register to know when OSPM has called the _EJ function for a particular dimm. A write to this byte will depopulate the respective dimm. Only writes are allowed to this byte. v1->v2: mems_sts address moved from 0xaf20 to 0xaf80 (to accomodate more space for cpu-hotplugging in the future). _EJ array is reduced to a single byte. Add documentation in docs/specs/acpi_hotplug.txt Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> --- docs/specs/acpi_hotplug.txt | 22 +++++++++++++ hw/acpi_piix4.c | 73 ++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 91 insertions(+), 4 deletions(-) create mode 100644 docs/specs/acpi_hotplug.txt diff --git a/docs/specs/acpi_hotplug.txt b/docs/specs/acpi_hotplug.txt new file mode 100644 index 0000000..cf86242 --- /dev/null +++ b/docs/specs/acpi_hotplug.txt @@ -0,0 +1,22 @@ +QEMU<->ACPI BIOS hotplug interface +-------------------------------------- +This document describes the interface between QEMU and the ACPI BIOS for non-PCI +space. For the PCI interface please look at docs/specs/acpi_pci_hotplug.txt + +QEMU<->ACPI BIOS memory hotplug interface +-------------------------------------- + +Memory Dimm status array (IO port 0xaf80-0xaf9f, 1-byte access): +--------------------------------------------------------------- +Dimm hot-plug notification pending. One bit per slot. + +Read by ACPI BIOS GPE.3 handler to notify OS of memory hot-add or hot-remove +events. Read-only. + +Memory Dimm ejection success notification (IO port 0xafa0, 1-byte access): +--------------------------------------------------------------- +Dimm hot-remove _EJ0 notification. Byte value indicates Dimm slot that was +ejected. + +Written by ACPI memory device _EJ0 method to notify qemu of successfull +hot-removal. Write-only. diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index 0aace60..b988597 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -28,6 +28,8 @@ #include "range.h" #include "ioport.h" #include "fw_cfg.h" +#include "sysbus.h" +#include "dimm.h" //#define DEBUG @@ -45,9 +47,15 @@ #define PCI_DOWN_BASE 0xae04 #define PCI_EJ_BASE 0xae08 #define PCI_RMV_BASE 0xae0c +#define MEM_BASE 0xaf80 +#define MEM_EJ_BASE 0xafa0 +#define PIIX4_MEM_HOTPLUG_STATUS 8 #define PIIX4_PCI_HOTPLUG_STATUS 2 +struct gpe_regs { + uint8_t mems_sts[DIMM_BITMAP_BYTES]; +}; struct pci_status { uint32_t up; /* deprecated, maintained for migration compatibility */ uint32_t down; @@ -69,6 +77,7 @@ typedef struct PIIX4PMState { Notifier machine_ready; /* for pci hotplug */ + struct gpe_regs gperegs; struct pci_status pci0_status; uint32_t pci0_hotplug_enable; uint32_t pci0_slot_device_present; @@ -93,8 +102,8 @@ static void pm_update_sci(PIIX4PMState *s) ACPI_BITMASK_POWER_BUTTON_ENABLE | ACPI_BITMASK_GLOBAL_LOCK_ENABLE | ACPI_BITMASK_TIMER_ENABLE)) != 0) || - (((s->ar.gpe.sts[0] & s->ar.gpe.en[0]) - & PIIX4_PCI_HOTPLUG_STATUS) != 0); + (((s->ar.gpe.sts[0] & s->ar.gpe.en[0]) & + (PIIX4_PCI_HOTPLUG_STATUS | PIIX4_MEM_HOTPLUG_STATUS)) != 0); qemu_set_irq(s->irq, sci_level); /* schedule a timer interruption if needed */ @@ -499,7 +508,16 @@ type_init(piix4_pm_register_types) static uint32_t gpe_readb(void *opaque, uint32_t addr) { PIIX4PMState *s = opaque; - uint32_t val = acpi_gpe_ioport_readb(&s->ar, addr); + uint32_t val = 0; + struct gpe_regs *g = &s->gperegs; + + switch (addr) { + case MEM_BASE ... MEM_BASE+DIMM_BITMAP_BYTES: + val = g->mems_sts[addr - MEM_BASE]; + break; + default: + val = acpi_gpe_ioport_readb(&s->ar, addr); + } PIIX4_DPRINTF("gpe read %x == %x\n", addr, val); return val; @@ -509,7 +527,13 @@ static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val) { PIIX4PMState *s = opaque; - acpi_gpe_ioport_writeb(&s->ar, addr, val); + switch (addr) { + case MEM_EJ_BASE: + dimm_notify(val, DIMM_REMOVE_SUCCESS); + break; + default: + acpi_gpe_ioport_writeb(&s->ar, addr, val); + } pm_update_sci(s); PIIX4_DPRINTF("gpe write %x <== %d\n", addr, val); @@ -560,9 +584,11 @@ static uint32_t pcirmv_read(void *opaque, uint32_t addr) static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, PCIHotplugState state); +static int piix4_dimm_hotplug(DeviceState *qdev, SysBusDevice *dev, int add); static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) { + int i = 0; register_ioport_write(GPE_BASE, GPE_LEN, 1, gpe_writeb, s); register_ioport_read(GPE_BASE, GPE_LEN, 1, gpe_readb, s); @@ -576,7 +602,15 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) register_ioport_read(PCI_RMV_BASE, 4, 4, pcirmv_read, s); + register_ioport_read(MEM_BASE, DIMM_BITMAP_BYTES, 1, gpe_readb, s); + register_ioport_write(MEM_EJ_BASE, 1, 1, gpe_writeb, s); + + for(i = 0; i < DIMM_BITMAP_BYTES; i++) { + s->gperegs.mems_sts[i] = 0; + } + pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev); + dimm_register_hotplug(piix4_dimm_hotplug, &s->dev.qdev); } static void enable_device(PIIX4PMState *s, int slot) @@ -591,6 +625,37 @@ static void disable_device(PIIX4PMState *s, int slot) s->pci0_status.down |= (1U << slot); } +static void enable_mem_device(PIIX4PMState *s, int memdevice) +{ + struct gpe_regs *g = &s->gperegs; + s->ar.gpe.sts[0] |= PIIX4_MEM_HOTPLUG_STATUS; + g->mems_sts[memdevice/8] |= (1 << (memdevice%8)); +} + +static void disable_mem_device(PIIX4PMState *s, int memdevice) +{ + struct gpe_regs *g = &s->gperegs; + s->ar.gpe.sts[0] |= PIIX4_MEM_HOTPLUG_STATUS; + g->mems_sts[memdevice/8] &= ~(1 << (memdevice%8)); +} + +static int piix4_dimm_hotplug(DeviceState *qdev, SysBusDevice *dev, int + add) +{ + PCIDevice *pci_dev = DO_UPCAST(PCIDevice, qdev, qdev); + PIIX4PMState *s = DO_UPCAST(PIIX4PMState, dev, pci_dev); + DimmState *slot = DIMM(dev); + + if (add) { + enable_mem_device(s, slot->idx); + } + else { + disable_mem_device(s, slot->idx); + } + pm_update_sci(s); + return 0; +} + static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, PCIHotplugState state) { -- 1.7.9

1 0

[RFC PATCH v2 06/21] dimm: Implement memory device abstraction
by Vasilis Liaskovitis 11 Jul '12

11 Jul '12

Each hotplug-able memory slot is a SysBusDevice. A hot-add operation for a particular dimm creates a new MemoryRegion of the given physical address offset, size and node proximity, and attaches it to main system memory as a sub_region. A hot-remove operation detaches and frees the MemoryRegion from system memory. This prototype still lacks proper qdev integration: a separate hotplug side-channel is used and main system bus hotplug capability is ignored. Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> --- hw/Makefile.objs | 2 +- hw/dimm.c | 234 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ hw/dimm.h | 58 +++++++++++++ 3 files changed, 293 insertions(+), 1 deletions(-) create mode 100644 hw/dimm.c create mode 100644 hw/dimm.h diff --git a/hw/Makefile.objs b/hw/Makefile.objs index 3d77259..e2184bf 100644 --- a/hw/Makefile.objs +++ b/hw/Makefile.objs @@ -26,7 +26,7 @@ hw-obj-$(CONFIG_I8254) += i8254_common.o i8254.o hw-obj-$(CONFIG_PCSPK) += pcspk.o hw-obj-$(CONFIG_PCKBD) += pckbd.o hw-obj-$(CONFIG_FDC) += fdc.o -hw-obj-$(CONFIG_ACPI) += acpi.o acpi_piix4.o +hw-obj-$(CONFIG_ACPI) += acpi.o acpi_piix4.o dimm.o hw-obj-$(CONFIG_APM) += pm_smbus.o apm.o hw-obj-$(CONFIG_DMA) += dma.o hw-obj-$(CONFIG_I82374) += i82374.o diff --git a/hw/dimm.c b/hw/dimm.c new file mode 100644 index 0000000..00c4623 --- /dev/null +++ b/hw/dimm.c @@ -0,0 +1,234 @@ +/* + * Dimm device for Memory Hotplug + * + * Copyright ProfitBricks GmbH 2012 + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see <http://www.gnu.org/licenses/> + */ + +#include "trace.h" +#include "qdev.h" +#include "dimm.h" +#include <time.h> +#include "../exec-memory.h" +#include "qmp-commands.h" + +static DeviceState *dimm_hotplug_qdev; +static dimm_hotplug_fn dimm_hotplug; +static QTAILQ_HEAD(Dimmlist, DimmState) dimmlist; + +static Property dimm_properties[] = { + DEFINE_PROP_END_OF_LIST() +}; + +void dimm_populate(DimmState *s) +{ + DeviceState *dev= (DeviceState*)s; + MemoryRegion *new = NULL; + + new = g_malloc(sizeof(MemoryRegion)); + memory_region_init_ram(new, dev->id, s->size); + vmstate_register_ram_global(new); + memory_region_add_subregion(get_system_memory(), s->start, new); + s->mr = new; + s->populated = true; +} + + +void dimm_depopulate(DimmState *s) +{ + assert(s); + if (s->populated) { + vmstate_unregister_ram(s->mr, NULL); + memory_region_del_subregion(get_system_memory(), s->mr); + memory_region_destroy(s->mr); + s->populated = false; + s->mr = NULL; + } +} + +DimmState *dimm_create(char *id, uint64_t size, uint64_t node, uint32_t + dimm_idx, bool populated) +{ + DeviceState *dev; + DimmState *mdev; + + dev = sysbus_create_simple("dimm", -1, NULL); + dev->id = id; + + mdev = DIMM(dev); + mdev->idx = dimm_idx; + mdev->start = 0; + mdev->size = size; + mdev->node = node; + mdev->populated = populated; + QTAILQ_INSERT_TAIL(&dimmlist, mdev, nextdimm); + return mdev; +} + +void dimm_register_hotplug(dimm_hotplug_fn hotplug, DeviceState *qdev) +{ + dimm_hotplug_qdev = qdev; + dimm_hotplug = hotplug; + dimm_scan_populated(); +} + +void dimm_activate(DimmState *slot) +{ + dimm_populate(slot); + if (dimm_hotplug) + dimm_hotplug(dimm_hotplug_qdev, (SysBusDevice*)slot, 1); +} + +void dimm_deactivate(DimmState *slot) +{ + if (dimm_hotplug) + dimm_hotplug(dimm_hotplug_qdev, (SysBusDevice*)slot, 0); +} + +DimmState *dimm_find_from_name(char *id) +{ + Error *err = NULL; + DeviceState *qdev; + const char *type; + qdev = qdev_find_recursive(sysbus_get_default(), id); + if (qdev) { + type = object_property_get_str(OBJECT(qdev), "type", &err); + if (!type) { + return NULL; + } + if (!strcmp(type, "dimm")) { + return DIMM(qdev); + } + } + return NULL; +} + +int dimm_do(Monitor *mon, const QDict *qdict, bool add) +{ + DimmState *slot = NULL; + + char *id = (char*) qdict_get_try_str(qdict, "id"); + if (!id) { + fprintf(stderr, "ERROR %s invalid id\n",__FUNCTION__); + return 1; + } + + slot = dimm_find_from_name(id); + + if (!slot) { + fprintf(stderr, "%s no slot %s found\n", __FUNCTION__, id); + return 1; + } + + if (add) { + if (slot->populated) { + fprintf(stderr, "ERROR %s slot %s already populated\n", + __FUNCTION__, id); + return 1; + } + dimm_activate(slot); + } + else { + if (!slot->populated) { + fprintf(stderr, "ERROR %s slot %s is not populated\n", + __FUNCTION__, id); + return 1; + } + dimm_deactivate(slot); + } + + return 0; +} + +DimmState *dimm_find_from_idx(uint32_t idx) +{ + DimmState *slot; + + QTAILQ_FOREACH(slot, &dimmlist, nextdimm) { + if (slot->idx == idx) { + return slot; + } + } + return NULL; +} + +/* used to calculate physical address offsets for all dimms */ +void dimm_calc_offsets(dimm_calcoffset_fn calcfn) +{ + DimmState *slot; + QTAILQ_FOREACH(slot, &dimmlist, nextdimm) { + if (!slot->start) + slot->start = calcfn(slot->size); + } +} + +/* used to populate and activate dimms at boot time */ +void dimm_scan_populated(void) +{ + DimmState *slot; + QTAILQ_FOREACH(slot, &dimmlist, nextdimm) { + if (slot->populated && !slot->mr) { + dimm_activate(slot); + } + } +} + +void dimm_notify(uint32_t idx, uint32_t event) +{ + DimmState *s; + s = dimm_find_from_idx(idx); + assert(s != NULL); + + switch(event) { + case DIMM_REMOVE_SUCCESS: + dimm_depopulate(s); + break; + default: + break; + } +} + +static int dimm_init(SysBusDevice *s) +{ + DimmState *slot; + slot = DIMM(s); + slot->mr = NULL; + slot->populated = false; + return 0; +} + +static void dimm_class_init(ObjectClass *klass, void *data) +{ + SysBusDeviceClass *sc = SYS_BUS_DEVICE_CLASS(klass); + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->props = dimm_properties; + sc->init = dimm_init; + dimm_hotplug = NULL; + QTAILQ_INIT(&dimmlist); +} + +static TypeInfo dimm_info = { + .name = "dimm", + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(DimmState), + .class_init = dimm_class_init, +}; + +static void dimm_register_types(void) +{ + type_register_static(&dimm_info); +} + +type_init(dimm_register_types) diff --git a/hw/dimm.h b/hw/dimm.h new file mode 100644 index 0000000..643f319 --- /dev/null +++ b/hw/dimm.h @@ -0,0 +1,58 @@ +#ifndef QEMU_DIMM_H +#define QEMU_DIMM_H + +#include "qemu-common.h" +#include "memory.h" +#include "sysbus.h" +#include "qapi-types.h" +#include "qemu-queue.h" +#include "cpus.h" +#define MAX_DIMMS 255 +#define DIMM_BITMAP_BYTES (MAX_DIMMS + 7) / 8 +#define DEFAULT_DIMMSIZE 1024*1024*1024 + +typedef enum { + DIMM_REMOVE_SUCCESS = 0, + DIMM_REMOVE_FAIL = 1, + DIMM_ADD_SUCCESS = 2, + DIMM_ADD_FAIL = 3 +} dimm_hp_result_code; + +#define TYPE_DIMM "dimm" +#define DIMM(obj) \ + OBJECT_CHECK(DimmState, (obj), TYPE_DIMM) +#define DIMM_CLASS(klass) \ + OBJECT_CLASS_CHECK(DimmClass, (obj), TYPE_DIMM) +#define DIMM_GET_CLASS(obj) \ + OBJECT_GET_CLASS(DimmClass, (obj), TYPE_DIMM) + +typedef struct DimmState { + SysBusDevice busdev; + uint32_t idx; /* index in memory hotplug register/bitmap */ + ram_addr_t start; /* starting physical address */ + ram_addr_t size; + uint32_t node; /* numa node proximity */ + MemoryRegion *mr; /* MemoryRegion for this slot. !NULL only if populated */ + bool populated; /* 1 means device has been hotplugged. Default is 0. */ + QTAILQ_ENTRY (DimmState) nextdimm; +} DimmState; + +typedef int (*dimm_hotplug_fn)(DeviceState *qdev, SysBusDevice *dev, int add); +typedef target_phys_addr_t (*dimm_calcoffset_fn)(uint64_t size); + +DimmState *dimm_create(char *id, uint64_t size, uint64_t node, uint32_t + dimm_idx, bool populated); +void dimm_populate(DimmState *s); +void dimm_depopulate(DimmState *s); +int dimm_do(Monitor *mon, const QDict *qdict, bool add); +DimmState *dimm_find_from_idx(uint32_t idx); +DimmState *dimm_find_from_name(char *id); +void dimm_register_hotplug(dimm_hotplug_fn hotplug, DeviceState *qdev); +void dimm_calc_offsets(dimm_calcoffset_fn calcfn); +void dimm_activate(DimmState *slot); +void dimm_deactivate(DimmState *slot); +void dimm_scan_populated(void); +void dimm_notify(uint32_t idx, uint32_t event); + + +#endif -- 1.7.9

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[RFC PATCH v2 05/21] pciinit: Fix pcimem_start value
by Vasilis Liaskovitis 11 Jul '12

11 Jul '12

In order to hotplug memory between RamSize and BUILD_PCIMEM_START, the pci window needs to start at BUILD_PCIMEM_START (0xe0000000). Otherwise, the guest cannot online new dimms at those ranges due to pci_root window conflicts. (workaround for linux guest is booting with pci=nocrs) Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> --- src/pciinit.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/src/pciinit.c b/src/pciinit.c index 68f302a..0b11cbe 100644 --- a/src/pciinit.c +++ b/src/pciinit.c @@ -592,7 +592,7 @@ static void pci_region_map_entries(struct pci_bus *busses, struct pci_region *r) static void pci_bios_map_devices(struct pci_bus *busses) { - pcimem_start = RamSize; + pcimem_start = BUILD_PCIMEM_START; if (pci_bios_init_root_regions(busses)) { struct pci_region r64_mem, r64_pref; -- 1.7.9

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[RFC PATCH v2 04/21] acpi: generate hotplug memory devices
by Vasilis Liaskovitis 11 Jul '12

11 Jul '12

The memory device generation is guided by qemu paravirt info. Seabios first uses the info to setup SRAT entries for the hotplug-able memory slots. Afterwards, build_memssdt uses the created SRAT entries to generate appropriate memory device objects. One memory device (and corresponding SRAT entry) is generated for each hotplug-able qemu memslot. Currently no SSDT memory device is created for initial system memory. We only support up to 255 DIMMs for now (PackageOp used for the MEON array can only describe an array of at most 255 elements. VarPackageOp would be needed to support more than 255 devices) v1->v2: Seabios reads mems_sts from qemu to build e820_map SSDT size and some offsets are calculated with extraction macros. Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> --- src/acpi.c | 158 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 152 insertions(+), 6 deletions(-) diff --git a/src/acpi.c b/src/acpi.c index 55e4607..c83e8c7 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -510,6 +510,127 @@ build_ssdt(void) return ssdt; } +#include "ssdt-mem.hex" + +/* 0x5B 0x82 DeviceOp PkgLength NameString DimmID */ +#define MEM_BASE 0xaf80 +#define SD_MEM (ssdm_mem_aml + *ssdt_mem_start) +#define SD_MEMSIZEOF (*ssdt_mem_end - *ssdt_mem_start) +#define SD_OFFSET_MEMHEX (*ssdt_mem_name - *ssdt_mem_start + 2) +#define SD_OFFSET_MEMID (*ssdt_mem_id - *ssdt_mem_start) +#define SD_OFFSET_PXMID 31 +#define SD_OFFSET_MEMSTART 55 +#define SD_OFFSET_MEMEND 63 +#define SD_OFFSET_MEMSIZE 79 + +u64 nb_hp_memslots = 0; +struct srat_memory_affinity *mem; + +static void build_memdev(u8 *ssdt_ptr, int i, u64 mem_base, u64 mem_len, u8 node) +{ + memcpy(ssdt_ptr, SD_MEM, SD_MEMSIZEOF); + ssdt_ptr[SD_OFFSET_MEMHEX] = getHex(i >> 4); + ssdt_ptr[SD_OFFSET_MEMHEX+1] = getHex(i); + ssdt_ptr[SD_OFFSET_MEMID] = i; + ssdt_ptr[SD_OFFSET_PXMID] = node; + *(u64*)(ssdt_ptr + SD_OFFSET_MEMSTART) = mem_base; + *(u64*)(ssdt_ptr + SD_OFFSET_MEMEND) = mem_base + mem_len; + *(u64*)(ssdt_ptr + SD_OFFSET_MEMSIZE) = mem_len; +} + +static void* +build_memssdt(void) +{ + u64 mem_base; + u64 mem_len; + u8 node; + int i; + struct srat_memory_affinity *entry = mem; + u64 nb_memdevs = nb_hp_memslots; + u8 memslot_status, enabled; + + int length = ((1+3+4) + + (nb_memdevs * SD_MEMSIZEOF) + + (1+2+5+(12*nb_memdevs)) + + (6+2+1+(1*nb_memdevs))); + u8 *ssdt = malloc_high(sizeof(struct acpi_table_header) + length); + if (! ssdt) { + warn_noalloc(); + return NULL; + } + u8 *ssdt_ptr = ssdt + sizeof(struct acpi_table_header); + + // build Scope(_SB_) header + *(ssdt_ptr++) = 0x10; // ScopeOp + ssdt_ptr = encodeLen(ssdt_ptr, length-1, 3); + *(ssdt_ptr++) = '_'; + *(ssdt_ptr++) = 'S'; + *(ssdt_ptr++) = 'B'; + *(ssdt_ptr++) = '_'; + + for (i = 0; i < nb_memdevs; i++) { + mem_base = (((u64)(entry->base_addr_high) << 32 )| entry->base_addr_low); + mem_len = (((u64)(entry->length_high) << 32 )| entry->length_low); + node = entry->proximity[0]; + build_memdev(ssdt_ptr, i, mem_base, mem_len, node); + ssdt_ptr += SD_MEMSIZEOF; + entry++; + } + + // build "Method(MTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CM00, Arg1)} ...}" + *(ssdt_ptr++) = 0x14; // MethodOp + ssdt_ptr = encodeLen(ssdt_ptr, 2+5+(12*nb_memdevs), 2); + *(ssdt_ptr++) = 'M'; + *(ssdt_ptr++) = 'T'; + *(ssdt_ptr++) = 'F'; + *(ssdt_ptr++) = 'Y'; + *(ssdt_ptr++) = 0x02; + for (i=0; i<nb_memdevs; i++) { + *(ssdt_ptr++) = 0xA0; // IfOp + ssdt_ptr = encodeLen(ssdt_ptr, 11, 1); + *(ssdt_ptr++) = 0x93; // LEqualOp + *(ssdt_ptr++) = 0x68; // Arg0Op + *(ssdt_ptr++) = 0x0A; // BytePrefix + *(ssdt_ptr++) = i; + *(ssdt_ptr++) = 0x86; // NotifyOp + *(ssdt_ptr++) = 'M'; + *(ssdt_ptr++) = 'P'; + *(ssdt_ptr++) = getHex(i >> 4); + *(ssdt_ptr++) = getHex(i); + *(ssdt_ptr++) = 0x69; // Arg1Op + } + + // build "Name(MEON, Package() { One, One, ..., Zero, Zero, ... })" + *(ssdt_ptr++) = 0x08; // NameOp + *(ssdt_ptr++) = 'M'; + *(ssdt_ptr++) = 'E'; + *(ssdt_ptr++) = 'O'; + *(ssdt_ptr++) = 'N'; + *(ssdt_ptr++) = 0x12; // PackageOp + ssdt_ptr = encodeLen(ssdt_ptr, 2+1+(1*nb_memdevs), 2); + *(ssdt_ptr++) = nb_memdevs; + + entry = mem; + memslot_status = 0; + + for (i = 0; i < nb_memdevs; i++) { + enabled = 0; + if (i % 8 == 0) + memslot_status = inb(MEM_BASE + i/8); + enabled = memslot_status & 1; + mem_base = (((u64)(entry->base_addr_high) << 32 )| entry->base_addr_low); + mem_len = (((u64)(entry->length_high) << 32 )| entry->length_low); + *(ssdt_ptr++) = enabled ? 0x01 : 0x00; + if (enabled) + add_e820(mem_base, mem_len, E820_RAM); + memslot_status = memslot_status >> 1; + entry++; + } + build_header((void*)ssdt, SSDT_SIGNATURE, ssdt_ptr - ssdt, 1); + + return ssdt; +} + #include "ssdt-pcihp.hex" #define PCI_RMV_BASE 0xae0c @@ -618,9 +739,6 @@ build_srat(void) { int nb_numa_nodes = qemu_cfg_get_numa_nodes(); - if (nb_numa_nodes == 0) - return NULL; - u64 *numadata = malloc_tmphigh(sizeof(u64) * (MaxCountCPUs + nb_numa_nodes)); if (!numadata) { warn_noalloc(); @@ -629,10 +747,11 @@ build_srat(void) qemu_cfg_get_numa_data(numadata, MaxCountCPUs + nb_numa_nodes); + qemu_cfg_get_numa_data(&nb_hp_memslots, 1); struct system_resource_affinity_table *srat; int srat_size = sizeof(*srat) + sizeof(struct srat_processor_affinity) * MaxCountCPUs + - sizeof(struct srat_memory_affinity) * (nb_numa_nodes + 2); + sizeof(struct srat_memory_affinity) * (nb_numa_nodes + nb_hp_memslots + 2); srat = malloc_high(srat_size); if (!srat) { @@ -667,7 +786,7 @@ build_srat(void) * from 640k-1M and possibly another one from 3.5G-4G. */ struct srat_memory_affinity *numamem = (void*)core; - int slots = 0; + int slots = 0, node; u64 mem_len, mem_base, next_base = 0; acpi_build_srat_memory(numamem, 0, 640*1024, 0, 1); @@ -694,10 +813,36 @@ build_srat(void) next_base += (1ULL << 32) - RamSize; } acpi_build_srat_memory(numamem, mem_base, mem_len, i-1, 1); + numamem++; slots++; + + } + mem = (void*)numamem; + + if (nb_hp_memslots) { + u64 *hpmemdata = malloc_tmphigh(sizeof(u64) * (3 * nb_hp_memslots)); + if (!hpmemdata) { + warn_noalloc(); + free(hpmemdata); + free(numadata); + return NULL; + } + + qemu_cfg_get_numa_data(hpmemdata, 3 * nb_hp_memslots); + + for (i = 1; i < nb_hp_memslots + 1; ++i) { + mem_base = *hpmemdata++; + mem_len = *hpmemdata++; + node = *hpmemdata++; + acpi_build_srat_memory(numamem, mem_base, mem_len, node, 1); + numamem++; + slots++; + } + free(hpmemdata); } - for (; slots < nb_numa_nodes + 2; slots++) { + + for (; slots < nb_numa_nodes + nb_hp_memslots + 2; slots++) { acpi_build_srat_memory(numamem, 0, 0, 0, 0); numamem++; } @@ -748,6 +893,7 @@ acpi_bios_init(void) ACPI_INIT_TABLE(build_madt()); ACPI_INIT_TABLE(build_hpet()); ACPI_INIT_TABLE(build_srat()); + ACPI_INIT_TABLE(build_memssdt()); ACPI_INIT_TABLE(build_pcihp()); u16 i, external_tables = qemu_cfg_acpi_additional_tables(); -- 1.7.9

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[RFC PATCH v2 03/21] acpi-dsdt: Implement functions for memory hotplug
by Vasilis Liaskovitis 11 Jul '12

11 Jul '12

Extend the DSDT to include methods for handling memory hot-add and hot-remove notifications and memory device status requests. These functions are called from the memory device SSDT methods. Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> --- src/acpi-dsdt.dsl | 70 +++++++++++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 68 insertions(+), 2 deletions(-) diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl index 2060686..5d3e92b 100644 --- a/src/acpi-dsdt.dsl +++ b/src/acpi-dsdt.dsl @@ -737,6 +737,71 @@ DefinitionBlock ( } Return(One) } + /* Objects filled in by run-time generated SSDT */ + External(MTFY, MethodObj) + External(MEON, PkgObj) + + Method (CMST, 1, NotSerialized) { + // _STA method - return ON status of memdevice + // Local0 = MEON flag for this cpu + Store(DerefOf(Index(MEON, Arg0)), Local0) + If (Local0) { Return(0xF) } Else { Return(0x0) } + } + + /* Memory hotplug notify array */ + OperationRegion(MEST, SystemIO, 0xaf80, 32) + Field (MEST, ByteAcc, NoLock, Preserve) + { + MES, 256 + } + + /* Memory eject byte */ + OperationRegion(MEMJ, SystemIO, 0xafa0, 1) + Field (MEMJ, ByteAcc, NoLock, Preserve) + { + MPE, 8 + } + + Method(MESC, 0) { + // Local5 = active memdevice bitmap + Store (MES, Local5) + // Local2 = last read byte from bitmap + Store (Zero, Local2) + // Local0 = memory device iterator + Store (Zero, Local0) + While (LLess(Local0, SizeOf(MEON))) { + // Local1 = MEON flag for this memory device + Store(DerefOf(Index(MEON, Local0)), Local1) + If (And(Local0, 0x07)) { + // Shift down previously read bitmap byte + ShiftRight(Local2, 1, Local2) + } Else { + // Read next byte from memdevice bitmap + Store(DerefOf(Index(Local5, ShiftRight(Local0, 3))), Local2) + } + // Local3 = active state for this memory device + Store(And(Local2, 1), Local3) + + If (LNotEqual(Local1, Local3)) { + // State change - update MEON with new state + Store(Local3, Index(MEON, Local0)) + // Do MEM notify + If (LEqual(Local3, 1)) { + MTFY(Local0, 1) + } Else { + MTFY(Local0, 3) + } + } + Increment(Local0) + } + Return(One) + } + + Method (MPEJ, 2, NotSerialized) { + // _EJ0 method - eject callback + Store(Arg0, MPE) + Sleep(200) + } } @@ -759,8 +824,9 @@ DefinitionBlock ( // CPU hotplug event Return(\_SB.PRSC()) } - Method(_L03) { - Return(0x01) + Method(_E03) { + // Memory hotplug event + Return(\_SB.MESC()) } Method(_L04) { Return(0x01) -- 1.7.9

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[RFC PATCH v2 02/21] Add SSDT memory device support
by Vasilis Liaskovitis 11 Jul '12

11 Jul '12

Define SSDT hotplug-able memory devices in _SB namespace. The dynamically generated SSDT includes per memory device hotplug methods. These methods just call methods defined in the DSDT. Also dynamically generate a MTFY method and a MEON array of the online/available memory devices. ACPI extraction macros are used to place the AML code in variables later used by src/acpi. The design is taken from SSDT cpu generation. Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> --- Makefile | 2 +- src/ssdt-mem.dsl | 65 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 66 insertions(+), 1 deletions(-) create mode 100644 src/ssdt-mem.dsl diff --git a/Makefile b/Makefile index fe974f7..299069e 100644 --- a/Makefile +++ b/Makefile @@ -228,7 +228,7 @@ $(OUT)%.hex: src/%.dsl ./tools/acpi_extract_preprocess.py ./tools/acpi_extract.p $(Q)$(PYTHON) ./tools/acpi_extract.py $(OUT)$*.lst > $(OUT)$*.off $(Q)cat $(OUT)$*.off > $@ -$(OUT)ccode32flat.o: $(OUT)acpi-dsdt.hex $(OUT)ssdt-proc.hex $(OUT)ssdt-pcihp.hex +$(OUT)ccode32flat.o: $(OUT)acpi-dsdt.hex $(OUT)ssdt-proc.hex $(OUT)ssdt-pcihp.hex $(OUT)ssdt-mem.hex ################ Kconfig rules diff --git a/src/ssdt-mem.dsl b/src/ssdt-mem.dsl new file mode 100644 index 0000000..ee322f0 --- /dev/null +++ b/src/ssdt-mem.dsl @@ -0,0 +1,65 @@ +/* This file is the basis for the ssdt_mem[] variable in src/acpi.c. + * It is similar in design to the ssdt_proc variable. + * It defines the contents of the per-cpu Processor() object. At + * runtime, a dynamically generated SSDT will contain one copy of this + * AML snippet for every possible memory device in the system. The + * objects will * be placed in the \_SB_ namespace. + * + * In addition to the aml code generated from this file, the + * src/acpi.c file creates a MEMNTFY method with an entry for each memdevice: + * Method(MTFY, 2) { + * If (LEqual(Arg0, 0x00)) { Notify(MP00, Arg1) } + * If (LEqual(Arg0, 0x01)) { Notify(MP01, Arg1) } + * ... + * } + * and a MEON array with the list of active and inactive memory devices: + * Name(MEON, Package() { One, One, ..., Zero, Zero, ... }) + */ +ACPI_EXTRACT_ALL_CODE ssdm_mem_aml + +DefinitionBlock ("ssdt-mem.aml", "SSDT", 0x02, "BXPC", "CSSDT", 0x1) +/* v------------------ DO NOT EDIT ------------------v */ +{ + ACPI_EXTRACT_DEVICE_START ssdt_mem_start + ACPI_EXTRACT_DEVICE_END ssdt_mem_end + ACPI_EXTRACT_DEVICE_STRING ssdt_mem_name + Device(MPAA) { + ACPI_EXTRACT_NAME_BYTE_CONST ssdt_mem_id + Name(ID, 0xAA) +/* ^------------------ DO NOT EDIT ------------------^ + * + * The src/acpi.c code requires the above layout so that it can update + * MPAA and 0xAA with the appropriate MEMDEVICE id (see + * SD_OFFSET_MEMHEX/MEMID1/MEMID2). Don't change the above without + * also updating the C code. + */ + Name(_HID, EISAID("PNP0C80")) + Name(_PXM, 0xAA) + + External(CMST, MethodObj) + External(MPEJ, MethodObj) + + Name(_CRS, ResourceTemplate() { + QwordMemory( + ResourceConsumer, + , + MinFixed, + MaxFixed, + Cacheable, + ReadWrite, + 0x0, + 0xDEADBEEF, + 0xE6ADBEEE, + 0x00000000, + 0x08000000, + ) + }) + Method (_STA, 0) { + Return(CMST(ID)) + } + Method (_EJ0, 1, NotSerialized) { + MPEJ(ID, Arg0) + } + } +} + -- 1.7.9

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[RFC PATCH v2 01/21] Add ACPI_EXTRACT_DEVICE* macros
by Vasilis Liaskovitis 11 Jul '12

11 Jul '12

This allows to extract the beginning, end and name of a Device object. Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> --- tools/acpi_extract.py | 28 ++++++++++++++++++++++++++++ 1 files changed, 28 insertions(+), 0 deletions(-) diff --git a/tools/acpi_extract.py b/tools/acpi_extract.py index 167a322..cb2540e 100755 --- a/tools/acpi_extract.py +++ b/tools/acpi_extract.py @@ -195,6 +195,28 @@ def aml_package_start(offset): offset += 1 return offset + aml_pkglen_bytes(offset) + 1 +def aml_device_start(offset): + #0x5B 0x82 DeviceOp PkgLength NameString ProcID + if ((aml[offset] != 0x5B) or (aml[offset + 1] != 0x82)): + die( "Name offset 0x%x: expected 0x5B 0x83 actual 0x%x 0x%x" % + (offset, aml[offset], aml[offset + 1])); + return offset + +def aml_device_string(offset): + #0x5B 0x82 DeviceOp PkgLength NameString ProcID + start = aml_device_start(offset) + offset += 2 + pkglenbytes = aml_pkglen_bytes(offset) + offset += pkglenbytes + return offset + +def aml_device_end(offset): + start = aml_device_start(offset) + offset += 2 + pkglenbytes = aml_pkglen_bytes(offset) + pkglen = aml_pkglen(offset) + return offset + pkglen + lineno = 0 for line in fileinput.input(): # Strip trailing newline @@ -279,6 +301,12 @@ for i in range(len(asl)): offset = aml_processor_end(offset) elif (directive == "ACPI_EXTRACT_PKG_START"): offset = aml_package_start(offset) + elif (directive == "ACPI_EXTRACT_DEVICE_START"): + offset = aml_device_start(offset) + elif (directive == "ACPI_EXTRACT_DEVICE_STRING"): + offset = aml_device_string(offset) + elif (directive == "ACPI_EXTRACT_DEVICE_END"): + offset = aml_device_end(offset) else: die("Unsupported directive %s" % directive) -- 1.7.9

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[RFC PATCH v2 00/21] ACPI memory hotplug
by Vasilis Liaskovitis 11 Jul '12

11 Jul '12

This is v2 of the ACPI memory hotplug prototype for x86_64 target. Changes v1->v2 - memory map is automatically calculated for hotplug dimms. Dimms are added from top-of-memory skipping the pci hole at [PCI_HOLE_START, 4G). - Renamed from "-memslot" to "-dimm". Commands changed to "dimm_add", "dimm_del". - Seabios ejection array reduced to a byte. Use extraction macros for dimm ssdt. - additional SRAT paravirt info does not break previous SRAT fw_cfg layout. - Documentation of new acpi_piix4 registers and paravirt data. - add ACPI _OST support for _OST enabled guests. This allows qemu to receive notification for success / failure of memory hot-add and hot-remove operations. Guest needs to support _OST (https://lkml.org/lkml/2012/6/25/321) - add monitor info command to report total guest memory (initial + hot-added) - add command line options and monitor commands for batch dimm creation/population Overview: Dimm devices are modeled with a new qemu command line "-dimm id=name,size=sz,node=pxm,populated=on|off" As already mentioned, the starting physical address for all dimms is calculated automatically from top of memory, skipping the pci hole at [PCI_HOLE_START, 4G). Node is defining numa proximity for this dimm. When not defined it defaults to zero. "-dimm id=dimm0,size=512M,node=0,populated=off" will define a 512M memory slot belonging to numa node 0. Dimms are added or removed with a new hmp command "dimm_add/dimm_del": Hot-add syntax: "dimm_add id" Hot-remove syntax: "dimm_del id" Issues: - Live migration works as long as populated field is changed to "on" for hotplugged dimms at the destination qemu command line (patch 12/21 lifts this requirement). The DimmState structure does not yet define a VMStateDescription, but i assume this is the preferred way to pass state for migration. - Dimms are abstracted as qdevices attached to the main system bus. However, memory hotplugging has its own side channel ignoring main_system_bus's hotplug incapability. A cleaner integration is still needed, probably attaching memory devices as children-links of an acpi-capable device (in the pc case acpi_piix4) instead of the system bus (TBD). Then device_add/device_del instead of new commands can hopefully be used. Comments/review welcome. series is based on uq/master for qemu-kvm, and master for seabios. Can be found also at: http://github.com/vliaskov/qemu-kvm/commits/memhp-v2 http://github.com/vliaskov/seabios/commits/memhp-v2 Vasilis Liaskovitis (14): dimm: Implement memory device abstraction acpi_piix4: Implement memory device hotplug registers pc: calculate dimm physical addresses and adjust memory map pc: Add dimm paravirt SRAT info Implement "-dimm" command line option Implement dimm_add and dimm_del commands for hmp and qmp fix live-migration when "populated=on" is missing Implement memory hotplug notification lists acpi_piix4: _OST dimm support acpi_piix4: Update dimm state on VM reboot acpi_piix4: Update dimm bitmap state on hot-remove fail Implement "info memtotal" and "query-memtotal" Implement -dimms, -dimmspop command line options Implement mem_increase, mem_decrease hmp/qmp commands arch_init.c | 23 ++- docs/specs/acpi_hotplug.txt | 46 +++++ docs/specs/fwcfg.txt | 28 +++ hmp-commands.hx | 67 +++++++ hmp.c | 24 +++ hmp.h | 2 + hw/Makefile.objs | 2 +- hw/acpi_piix4.c | 131 ++++++++++++- hw/dimm.c | 449 +++++++++++++++++++++++++++++++++++++++++++ hw/dimm.h | 72 +++++++ hw/pc.c | 94 +++++++++- hw/pc.h | 6 + hw/pc_piix.c | 18 ++- monitor.c | 35 ++++ monitor.h | 5 + qapi-schema.json | 38 ++++ qemu-config.c | 70 +++++++ qemu-options.hx | 15 ++ qmp-commands.hx | 137 +++++++++++++ sysemu.h | 1 + vl.c | 122 ++++++++++++- 21 files changed, 1368 insertions(+), 17 deletions(-) create mode 100644 docs/specs/acpi_hotplug.txt create mode 100644 docs/specs/fwcfg.txt create mode 100644 hw/dimm.c create mode 100644 hw/dimm.h Vasilis Liaskovitis (7): Add ACPI_EXTRACT_DEVICE* macros Add SSDT memory device support acpi-dsdt: Implement functions for memory hotplug. acpi: generate hotplug memory devices. pciinit: Fix pcimem_start value acpi_dsdt: Support _OST dimm method acpi_dsdt: Revert internal dimm state on _OST failure Makefile | 2 +- src/acpi-dsdt.dsl | 120 ++++++++++++++++++++++++++++++++++++- src/acpi.c | 158 +++++++++++++++++++++++++++++++++++++++++++++++-- src/pciinit.c | 2 +- src/ssdt-mem.dsl | 69 +++++++++++++++++++++ tools/acpi_extract.py | 28 +++++++++ 6 files changed, 369 insertions(+), 10 deletions(-) create mode 100644 src/ssdt-mem.dsl

1 0

Re: [SeaBIOS] Flat Panel Support
by Kevin O'Connor 10 Jul '12

10 Jul '12

On Mon, Jul 09, 2012 at 04:47:15PM +0200, Christian Gmeiner wrote: > >> I did some more research and came up with the following idea/plan: > >> > >> * search for valid edid binary blob (maybe this can be done with cbfs > >> from coreboot) > >> * extend vgasrc/geodevga.c to make use of edid information's > >> * extend vgasrc/vbe.c to support edid calls (104f15) > >> > >> What do you think? > > > > I think it sounds good, but perhaps also consider storing the edid > > not in binary but in a format easier to work with, like text? > > > Lets see how I proceed :) > > As I have never done any BIOS interrupt programming I run into the > following issue: > > http://nopaste.info/2b38ef0a54.html > > As far as I understood this sub interrupt I need to copy/fill in the > edid data to the pointer provided via es/edi. > But I am not really sure how to do it :/ Be sure to check out a previous set of edid patches at: http://www.seabios.org/pipermail/seabios/2012-March/003343.html -Kevin

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SeaBIOS July 2012