SeaBIOS September 2011

seabios@seabios.org

15 participants
31 discussions

[PATCHv2 0/3] acpi: fix up EJ0 in DSDT
by Michael S. Tsirkin 28 Sep '11

28 Sep '11

This is a second iteration of the patch. The patch has been significantly reworked to address (offline) comments by Gleb. I think the infrastructure created is generic enough to be generally useful beyond the specific bug that I would like to fix. Specifically it will be able to find S3 Name to patch that, or process compiled CPU SSDT to avoid the need for hardcoded offsets. Please comment. Main changes: - tools rewritten in python - Original ASL retains _EJ0 methods, BIOS patches that to EJ0_ - generic ACP_EXTRACT infrastructure that can match Method and Name Operators - instead of matching specific method name, insert tags in original DSL source and match that to AML ----- Here's a bug: guest thinks it can eject VGA device and ISA bridge. [root@dhcp74-172 ~]#lspci 00:00.0 Host bridge: Intel Corporation 440FX - 82441FX PMC [Natoma] (rev 02) 00:01.0 ISA bridge: Intel Corporation 82371SB PIIX3 ISA [Natoma/Triton II] 00:01.1 IDE interface: Intel Corporation 82371SB PIIX3 IDE [Natoma/Triton II] 00:01.3 Bridge: Intel Corporation 82371AB/EB/MB PIIX4 ACPI (rev 03) 00:02.0 VGA compatible controller: Cirrus Logic GD 5446 00:03.0 PCI bridge: Red Hat, Inc. Device 0001 00:04.0 Ethernet controller: Qumranet, Inc. Virtio network device 00:05.0 SCSI storage controller: Qumranet, Inc. Virtio block device 01:00.0 Ethernet controller: Intel Corporation 82540EM Gigabit Ethernet Controller (rev 03) [root@dhcp74-172 ~]# ls /sys/bus/pci/slots/1/ adapter address attention latch module power [root@dhcp74-172 ~]# ls /sys/bus/pci/slots/2/ adapter address attention latch module power [root@dhcp74-172 ~]# echo 0 > /sys/bus/pci/slots/2/power [root@dhcp74-172 ~]# lspci 00:00.0 Host bridge: Intel Corporation 440FX - 82441FX PMC [Natoma] (rev 02) 00:01.0 ISA bridge: Intel Corporation 82371SB PIIX3 ISA [Natoma/Triton II] 00:01.1 IDE interface: Intel Corporation 82371SB PIIX3 IDE [Natoma/Triton II] 00:01.3 Bridge: Intel Corporation 82371AB/EB/MB PIIX4 ACPI (rev 03) 00:03.0 PCI bridge: Red Hat, Inc. Device 0001 00:04.0 Ethernet controller: Qumranet, Inc. Virtio network device 00:05.0 SCSI storage controller: Qumranet, Inc. Virtio block device 01:00.0 Ethernet controller: Intel Corporation 82540EM Gigabit Ethernet Controller (rev 03) This is wrong because slots 1 and 2 are marked as not hotpluggable in qemu. The reason is that our acpi tables declare both _RMV with value 0, and _EJ0 method for these slots. What happens in this case is undocumented by ACPI spec, so linux ignores _RMV, and windows seems to ignore _EJ0. The correct way to suppress hotplug is not to have _EJ0, so this is what this patch does: it probes PIIX and modifies DSDT to match. With these patches applied, we get: [root@dhcp74-172 ~]# ls /sys/bus/pci/slots/1/ address [root@dhcp74-172 ~]# ls /sys/bus/pci/slots/2/ address Michael S. Tsirkin (3): acpi: generate and parse mixed asl/aml listing acpi: EJ0 method name patching acpi: remove _RMV Makefile | 10 +- src/acpi-dsdt.dsl | 96 ++++++++----------- src/acpi.c | 31 ++++++ tools/acpi_extract.py | 195 ++++++++++++++++++++++++++++++++++++++ tools/acpi_extract_preprocess.py | 37 +++++++ 5 files changed, 307 insertions(+), 62 deletions(-) create mode 100755 tools/acpi_extract.py create mode 100755 tools/acpi_extract_preprocess.py -- 1.7.5.53.gc233e

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Re: [SeaBIOS] [Qemu-devel] Hang when using 9p mounts after last Seabios update
by Kevin O'Connor 28 Sep '11

28 Sep '11

On Thu, Sep 22, 2011 at 12:45:11PM +0100, Daniel P. Berrange wrote: > I'm doing some experimentation with application sandboxing and running > QEMU with the following command line: > > exec $QEMU \ > -m 64 \ > -nographic \ > -nodefconfig \ > -nodefaults \ > -kernel ./kernel-2.6.40.4-5.fc15.x86_64 \ > -initrd ./initrd-2.6.40.4-5.fc15.x86_64 \ > -append 'init=/bin/sh console=ttyS0 debug' \ > -fsdev local,security_model=passthrough,id=fsdev-fs0,path=/ \ > -device virtio-9p-pci,id=fs0,fsdev=fsdev-fs0,mount_tag=org.virttools.sandbox:/ \ > -serial stdio > > On 0.14, 0.15 releaes, this all works just fine. On current GIT master, > the guest OS will hang during boot. [...] > I further bisected SeaBios between their 0.6.2 release and the changeset > mentioned above, and got to this changeset in SeaBios: > > > commit 01a5c8813b2e709809c07c5d7fab9d1c3ddb4989 > Author: Gerd Hoffmann <kraxel(a)redhat.com> > Date: Mon Jul 11 09:20:29 2011 +0200 Gerd, any thoughts on what could cause this? -Kevin

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[PATCH 0/4] acpi: fix up EJ0 in DSDT
by Michael S. Tsirkin 27 Sep '11

27 Sep '11

Here's a bug: guest thinks it can eject VGA device and ISA bridge. [root@dhcp74-172 ~]#lspci 00:00.0 Host bridge: Intel Corporation 440FX - 82441FX PMC [Natoma] (rev 02) 00:01.0 ISA bridge: Intel Corporation 82371SB PIIX3 ISA [Natoma/Triton II] 00:01.1 IDE interface: Intel Corporation 82371SB PIIX3 IDE [Natoma/Triton II] 00:01.3 Bridge: Intel Corporation 82371AB/EB/MB PIIX4 ACPI (rev 03) 00:02.0 VGA compatible controller: Cirrus Logic GD 5446 00:03.0 PCI bridge: Red Hat, Inc. Device 0001 00:04.0 Ethernet controller: Qumranet, Inc. Virtio network device 00:05.0 SCSI storage controller: Qumranet, Inc. Virtio block device 01:00.0 Ethernet controller: Intel Corporation 82540EM Gigabit Ethernet Controller (rev 03) [root@dhcp74-172 ~]# ls /sys/bus/pci/slots/1/ adapter address attention latch module power [root@dhcp74-172 ~]# ls /sys/bus/pci/slots/2/ adapter address attention latch module power [root@dhcp74-172 ~]# echo 0 > /sys/bus/pci/slots/2/power [root@dhcp74-172 ~]# lspci 00:00.0 Host bridge: Intel Corporation 440FX - 82441FX PMC [Natoma] (rev 02) 00:01.0 ISA bridge: Intel Corporation 82371SB PIIX3 ISA [Natoma/Triton II] 00:01.1 IDE interface: Intel Corporation 82371SB PIIX3 IDE [Natoma/Triton II] 00:01.3 Bridge: Intel Corporation 82371AB/EB/MB PIIX4 ACPI (rev 03) 00:03.0 PCI bridge: Red Hat, Inc. Device 0001 00:04.0 Ethernet controller: Qumranet, Inc. Virtio network device 00:05.0 SCSI storage controller: Qumranet, Inc. Virtio block device 01:00.0 Ethernet controller: Intel Corporation 82540EM Gigabit Ethernet Controller (rev 03) This is wrong because slots 1 and 2 are marked as not hotpluggable in qemu. The reason is that our acpi tables declare both _RMV with value 0, and _EJ0 method for these slots. What happens in this case is undocumented by ACPI spec, so linux ignores _RMV, and windows seems to ignore _EJ0. The correct way to suppress hotplug is not to have _EJ0, so this is what this patch does: it probes PIIX and modifies DSDT to match. With these patches applied, we get: [root@dhcp74-172 ~]# ls /sys/bus/pci/slots/1/ address [root@dhcp74-172 ~]# ls /sys/bus/pci/slots/2/ address I had to add a bit of compile-time infrastructure to handle the runtime patching in a simple way. I expect that it will be possible to reuse it if we need to patch other methods in the future. Michael S. Tsirkin (4): acpi: generate mixed asl/aml listing acpi: add aml/asl parsing script acpi: EJ0 method name patching acpi: remove _RMV Makefile | 10 ++-- src/acpi-dsdt.dsl | 58 +++-------------------- src/acpi.c | 11 ++++ src/find_ej0.pl | 136 +++++++++++++++++++++++++++++++++++++++++++++++++++++ src/splitdsl.pl | 16 ++++++ 5 files changed, 176 insertions(+), 55 deletions(-) create mode 100755 src/find_ej0.pl create mode 100755 src/splitdsl.pl -- 1.7.5.53.gc233e

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[PATCH 0/4] ACPI DSDT simplifications
by Kevin O'Connor 26 Sep '11

26 Sep '11

This patch series simplifies the DSDT code. The goal is to separate out the DSDT into different chunks, and to remove some of the duplicated code by using methods. Kevin O'Connor (4): Delineate ACSP DSL code into sections. Consolidate PCI hotplug definitions together in DSL file. Simplify PCI hotplug acpi macros. Move code from PCI hotplug DSDT macros to methods. src/acpi-dsdt.dsl | 349 +++++++----- src/acpi-dsdt.hex | 1608 ++++++++++++++++++++++------------------------------- 2 files changed, 875 insertions(+), 1082 deletions(-) -- 1.7.6.2

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Re: [SeaBIOS] [PATCH 2/4] acpi: add aml/asl parsing script
by Michael S. Tsirkin 21 Sep '11

21 Sep '11

I've rewritten the script in python. Seems to work but I didn't have time to test - only compiled for now - and needs to move to tools - but I hope this makes review easier. Thanks, --- src/find_ej0.py | 140 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 140 insertions(+), 0 deletions(-) create mode 100755 src/find_ej0.py diff --git a/src/find_ej0.py b/src/find_ej0.py new file mode 100755 index 0000000..75e5491 --- /dev/null +++ b/src/find_ej0.py @@ -0,0 +1,140 @@ +#!/usr/bin/python + +# Process mixed ASL/AML listing (.lst file) produced by iasl -l +# Locate all occurences of Name _ADR followed by Method EJ0_ +# Output slot info from _ADR and offset of method name in AML + +import re; +import sys; +import fileinput; + +aml = [] +asl = [] +output = [] +lineno = 0 +debug = "" + +class asl_line: + line = None + lineno = None + aml_offset = None + +def die(diag): + sys.stderr.write("Error: %s; %s\n" % (diag, debug)) + sys.exit(1) + +#Store an ASL command, matching AML offset, and input line (for debugging) +def add_asl(line): + l = asl_line() + l.line = line + l.lineno = lineno + l.aml_offset = len(aml) + asl.append(l) + +#Store an AML byte sequence +#Verify that offset output by iasl matches # of bytes so far +def add_aml(offset, line): + o = int(offset, 16); + # Sanity check: offset must match size of code so far + if (o != len(aml)): + die("Offset 0x%x != 0x%x" % (o, len(aml))) + # Strip any trailing dots and ASCII dump after " + line = re.sub(r'\s*\.*\s*".*$',"", line) + # Strip traling whitespace + line = re.sub(r'\s+$',"", line) + # Strip leading whitespace + line = re.sub(r'^\s+',"", line) + # Split on whitespace + code = re.split(r'\s+', line) + for c in code: + # Require a legal hex number, two digits + if (not(re.search(r'^[0-9A-Fa-f][0-9A-Fa-f]$', c))): + die("Unexpected octet %s" % c); + aml.append(int(c, 16)); + +# Process aml bytecode array, decoding AML +# Given method offset, find its name offset +def aml_method_name(lineno, offset): + #0x14 MethodOp PkgLength NameString MethodFlags TermList + if (aml[offset] != 0x14): + die( "Method after input line $lineno offset $offset: " + " expected 0x14 actual 0x%x" % aml[offset]); + offset += 1; + # PkgLength can be multibyte. Bits 8-7 give the # of extra bytes. + pkglenbytes = aml[offset] >> 6; + offset += 1 + pkglenbytes; + return offset; + +for line in fileinput.input(): + # Strip trailing newline + line.rstrip(); + # line number and debug string to output in case of errors + lineno = lineno + 1 + debug = "input line %d: %s" % (lineno, line) + #ASL listing: space, then line#, then ...., then code + pasl = re.compile('^\s+([0-9]+)\.\.\.\.\s*') + m = pasl.search(line) + if (m): + add_asl(pasl.sub("", line)); + # AML listing: offset in hex, then ...., then code + paml = re.compile('^([0-9A-Fa-f]+)\.\.\.\.\s*') + m = paml.search(line) + if (m): + add_aml(m.group(1), paml.sub("", line)) + +# Now go over code, look for EJ0_ methods +# For each such method, output slot mask from the +# preceding _ADR line, as well as the method name offset. + +for i in range(len(asl)): + l = asl[i].line + debug = "input line %d: %s" % (asl[i].lineno, asl[i].line) + # match: Method (EJ0_,1) + if (not(re.search(r'^Method\s*$\s*EJ0_\s*[,)]', l))): + # Make sure we do not miss any EJ0_: + # die if EJ0_ is found anywhere else in source code + if (re.search(r'EJ0_', l)): + die("Stray EJ0_ detected"); + continue + # EJ0_ found. Previous line must be _ADR + p = asl[i - 1].line + # match: Name (_ADR, 0x<address>) + padr = re.compile('Name\s*\(\s*_ADR\s*,\s*0x([0-9A-Fa-f]+)\s*$') + m = padr.search(p); + if (not m): + die("_ADR not found before EJ0_ ") + + adr = int(m.group(1), 16) + slot = adr >> 16; + if (slot > 31): + die("_ADR device out of range: actual %d expected 0 to 31" % slot) + + # We have offset of EJ0_ method in code + # Now find EJ0_ itself + ej0 = aml_method_name(asl[i].lineno, asl[i].aml_offset) + # Verify AML: name must be EJ0_: + if ((aml[ej0 + 0] != ord('E')) or + (aml[ej0 + 1] != ord('J')) or + (aml[ej0 + 2] != ord('0')) or + (aml[ej0 + 3] != ord('_'))): + die("AML offset 0x%x does not match EJ0_" % ej0) + + # OK we are done. Output slot mask and offset + output.append(" {.slot_mask = 0x%x, .offset = 0x%x}" % + (0x1 << slot, ej0)) + +debug = "at end of file" + +# Pretty print output +if (not len(output)): + die("No EJ0_ Method found!") + +print ''' +static struct aml_ej0_data { + unsigned slot_mask; + unsigned offset; +} aml_ej0_data[] = {''' + +print ",\n".join(output) +print '};\n' + -- 1.7.5.53.gc233e

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Re: [SeaBIOS] [PATCH 2/4] acpi: add aml/asl parsing script
by Gleb Natapov 21 Sep '11

21 Sep '11

On Wed, Sep 21, 2011 at 03:44:29PM +0300, Michael S. Tsirkin wrote: > script ./src/find_ej0.pl finds all instances of > method named EJ0_ and the matching _ADR information, > and outputs the AML offset and slot mask of each. > There is tools/ directory for such kind of scripts. Most (if not all) of scripts there are in python though. Perl should die painful death. This approach delivers nice result, but since the script does not really decodes AML, but tries to match ASL source code with regular expressions, it introduces some assumptions to the code that make DSDT code less hackable. I'll hate to be the one who will have to change PCI device definitions in DSDT next time. Generally speaking finding an offset of some scope in AML is useful not only for PCI hotplug. For instance we want to make S3/S4 capability configurable by a command line switch, but this also requires DSDT patching and having automatic way to find _S3_/_S4_ offset is required for that too (we do not what to find it by hand each time DSDT is recompiled). > Signed-off-by: Michael S. Tsirkin <mst(a)redhat.com> > --- > src/find_ej0.pl | 136 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ > 1 files changed, 136 insertions(+), 0 deletions(-) > create mode 100755 src/find_ej0.pl > > diff --git a/src/find_ej0.pl b/src/find_ej0.pl > new file mode 100755 > index 0000000..37e8a8c > --- /dev/null > +++ b/src/find_ej0.pl > @@ -0,0 +1,136 @@ > +#!/usr/bin/perl > + > +# Process mixed ASL/AML listing (.lst file) produced by iasl -l > +# Locate all occurences of Name _ADR followed by Method EJ0_ > +# Output slot info from _ADR and offset of method name in AML > + > +use strict; > + > +my @aml = (); > +my @asl = (); > +my @asl_lineno = (); > +my @asl_to_aml_offset = (); > +my @output = (); > + > +#Store an ASL command, matching AML offset, and input line (for debugging) > +sub add_asl { > + my $srcline = shift(@_); > + my $line = shift(@_); > + push @asl, $line; > + push @asl_lineno, $.; > + push @asl_to_aml_offset, $#aml + 1; > +} > + > +#Store an AML byte sequence > +#Verify that offset output by iasl matches # of bytes so far > +sub add_aml { > + my $offset = shift(@_); > + my $line = shift(@_); > + my $o = hex($offset); > + # Sanity check: offset must match > + die "Offset $o != " .($#aml + 1) if ($o != $#aml + 1); > + # Strip any traling dots and ASCII dump after " > + $line =~ s/\s*\.*\s*".*//; > + > + my @code = split(' ', $line); > + foreach my $c (@code) { > + if (not($c =~ m/^[0-9A-Fa-f][0-9A-Fa-f]$/)) { > + die "Unexpected octet $c"; > + } > + push @aml, hex($c); > + } > +} > + > +# Process aml bytecode array, decoding AML > +# Given method offset, find its name offset > +sub aml_method_name { > + my $lineno = shift(@_); > + my $offset = shift(@_); > + #0x14 MethodOp PkgLength NameString MethodFlags TermList > + if ($aml[$offset] != 0x14) { > + die "Method after input line $lineno offset $offset: " . > + " expected 0x14 actual ". sprintf("0x%x", $aml[$offset]); > + } > + $offset += 1; > + # PkgLength can be multibyte. Bits 8-7 give the # of extra bytes. > + my $pkglenbytes = $aml[$offset] >> 6; > + $offset += 1 + $pkglenbytes; > + return $offset; > +} > + > +while (<>) { > + #Strip trailing newline > + chomp; > + #ASL listing: space, then line#, then ...., then code > + if (s#^\s+([0-9]+)\.\.\.\.\s*##) { > + add_asl($1, $_); > + } > + # AML listing: offset in hex, then ...., then code > + if (s#^([0-9A-F]+)\.\.\.\.\s*##) { > + add_aml($1, $_); > + } > + # Ignore everything else > +} > + > +# Now go over code, look for EJ0_ methods > +# For each such method, output slot mask from the > +# preceding _ADR line, as well as the method name offset. > +for (my $i = 0; $i <= $#asl; $i++) { > + my $l = $asl[$i]; > + # match: Method (EJ0_,1) > + if (not $l =~ m#^Method\s*$\s*EJ0_\s*[,)]#) { > + # Make sure we do not miss any EJ0_: > + # die if EJ0_ is found anywhere else in source code > + if ($l =~ m#EJ0_#) { > + die "Stray EJ0_ detected at input line $asl_lineno[$i]: $asl[$i]"; > + } > + next; > + } > + # EJ0_ found. Previous line must be _ADR > + my $p = $i > 0 ? $asl[$i - 1] : ""; > + # match: Name (_ADR, 0x<address>) > + if (not ($p =~ m#Name\s*\(\s*_ADR\s*,\s*0x([0-9A-Fa-f]+)\s*$#)) { > + die "_ADR not found before EJ0_ ". > + "at input line $asl_lineno[$i]: $asl[$i]"; > + } > + my $adr = hex($1); > + my $slot = $adr >> 16; > + if ($slot > 31) { > + die "_ADR device out of range: actual $slot " . > + "expected 0 to 31 at input line $asl_lineno[$i]: $asl[$i]"; > + } > + > + # We have offset of EJ0_ method in code > + # Now find EJ0_ itself > + my $offset = $asl_to_aml_offset[$i]; > + my $ej0 = aml_method_name($asl_lineno[$i], $offset); > + # Verify AML: name must be EJ0_: > + if (($aml[$ej0 + 0] != ord('E')) or > + ($aml[$ej0 + 1] != ord('J')) or > + ($aml[$ej0 + 2] != ord('0')) or > + ($aml[$ej0 + 3] != ord('_'))) { > + die "AML after input line $asl_lineno[$i] offset $ej0 " . > + "does not match EJ0_"; > + } > + > + # OK we are done. Output slot mask and offset > + push @output, sprintf(" {.slot_mask = 0x%x, .offset = 0x%x}", > + 0x1 << $slot, $ej0); > +} > + > +# Pretty print output > +if ($#output < 0) { > + die "No EJ0_ Method found!" > +} > +print <<EOF; > +static struct aml_ej0_data { > + unsigned slot_mask; > + unsigned offset; > +} aml_ej0_data[] = { > +EOF > +print join(",\n", @output); > +print <<EOF; > + > +}; > +EOF > + > -- > 1.7.5.53.gc233e -- Gleb.

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Re: [SeaBIOS] [PATCH 1/4] acpi: generate mixed asl/aml listing
by Michael S. Tsirkin 21 Sep '11

21 Sep '11

On Wed, Sep 21, 2011 at 03:44:21PM +0300, Michael S. Tsirkin wrote: > Use iasl -l flag to produce a mixed listing, where a > source line is followed by matching AML. > Since we use a preprocessed input, this generates long lines with > multiple commands per line. To make it possible to match > AML to source exactly, split the input that we supply iasl, > with each command on a separate line. > > Signed-off-by: Michael S. Tsirkin <mst(a)redhat.com> I thought I'd add an example listing here: 467.... Device (S1) { 0000080B....5B 82 25 53 31 5F 5F ... "[.%S1__" 468.... Name (_ADR, 0x00010000) 00000812....08 5F 41 44 52 0C 00 00 "._ADR..." 0000081A....01 00 .................. ".." 469.... Method (EJ0_,1) { 0000081C....14 0F 45 4A 30 5F 01 ... "..EJ0_." 470.... Store(ShiftLeft(1, 0x0001), B0EJ) -- MST

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Re: [SeaBIOS] [SeaBIOS PATCH v2] hotplug: Add device per func in ACPI DSDT tables
by Kevin O'Connor 21 Sep '11

21 Sep '11

On Tue, Sep 20, 2011 at 06:45:57AM -0400, Amos Kong wrote: > From 48ea1c9188334b89a60b4f9e853e86fc04fda4a5 Mon Sep 17 00:00:00 2001 > From: Amos Kong <akong(a)redhat.com> > Date: Tue, 20 Sep 2011 15:38:43 +0800 > Subject: [SeaBIOS PATCH v2] hotplug: Add device per func in ACPI DSDT tables > > Only func 0 is registered to guest driver (we can > only found func 0 in slot->funcs list of driver), > the other functions could not be cleaned when > hot-removing the whole slot. This patch adds > device per function in ACPI DSDT tables. > > Have tested with linux/winxp/win7, hot-adding/hot-remving, > single/multiple function device, they are all fine. > --- > Changes from v1: > - cleanup the macros, bios.bin gets back to 128K > - notify only when func0 is added and removed How about moving code into functions so that it isn't duplicated for each PCI device. See the patch below as an example (100% untested). The CPU hotplug stuff works this way, except it run-time generates the equivalent of "Device(S???)" and "PCNT". (It may make sense to run-time generate the PCI hotplug as well - it consumes about 10K of space to statically generate the 31 devices.) -Kevin diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl index 08412e2..31ac5eb 100644 --- a/src/acpi-dsdt.dsl +++ b/src/acpi-dsdt.dsl @@ -128,48 +128,6 @@ DefinitionBlock ( PCRM, 32, } -#define hotplug_slot(name, nr) \ - Device (S##name) { \ - Name (_ADR, nr##0000) \ - Method (_EJ0,1) { \ - Store(ShiftLeft(1, nr), B0EJ) \ - Return (0x0) \ - } \ - Name (_SUN, name) \ - } - - hotplug_slot(1, 0x0001) - hotplug_slot(2, 0x0002) - hotplug_slot(3, 0x0003) - hotplug_slot(4, 0x0004) - hotplug_slot(5, 0x0005) - hotplug_slot(6, 0x0006) - hotplug_slot(7, 0x0007) - hotplug_slot(8, 0x0008) - hotplug_slot(9, 0x0009) - hotplug_slot(10, 0x000a) - hotplug_slot(11, 0x000b) - hotplug_slot(12, 0x000c) - hotplug_slot(13, 0x000d) - hotplug_slot(14, 0x000e) - hotplug_slot(15, 0x000f) - hotplug_slot(16, 0x0010) - hotplug_slot(17, 0x0011) - hotplug_slot(18, 0x0012) - hotplug_slot(19, 0x0013) - hotplug_slot(20, 0x0014) - hotplug_slot(21, 0x0015) - hotplug_slot(22, 0x0016) - hotplug_slot(23, 0x0017) - hotplug_slot(24, 0x0018) - hotplug_slot(25, 0x0019) - hotplug_slot(26, 0x001a) - hotplug_slot(27, 0x001b) - hotplug_slot(28, 0x001c) - hotplug_slot(29, 0x001d) - hotplug_slot(30, 0x001e) - hotplug_slot(31, 0x001f) - Name (_CRS, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, @@ -762,6 +720,119 @@ DefinitionBlock ( Zero /* reserved */ }) + /* PCI hotplug */ + Scope(\_SB.PCI0) { + /* Methods called by bulk generated PCI devices below */ + Method (PCEJ, 1, NotSerialized) { + // _EJ0 method - eject callback + Store(ShiftLeft(1, Arg0), B0EJ) + Return (0x0) + } + + /* Bulk generated PCI hotplug devices */ +#define hotplug_func(nr, fn) \ + Device (S##nr##fn) { \ + Name (_ADR, 0x##nr##000##fn) \ + Method (_EJ0, 1) { Return(PCEJ(0x##nr)) } \ + Name (_SUN, 0x##nr) \ + } + +#define hotplug_slot(nr) \ + hotplug_func(nr, 0) \ + hotplug_func(nr, 1) \ + hotplug_func(nr, 2) \ + hotplug_func(nr, 3) \ + hotplug_func(nr, 4) \ + hotplug_func(nr, 5) \ + hotplug_func(nr, 6) \ + hotplug_func(nr, 7) + + hotplug_slot(01) + hotplug_slot(02) + hotplug_slot(03) + hotplug_slot(04) + hotplug_slot(05) + hotplug_slot(06) + hotplug_slot(07) + hotplug_slot(08) + hotplug_slot(09) + hotplug_slot(0a) + hotplug_slot(0b) + hotplug_slot(0c) + hotplug_slot(0d) + hotplug_slot(0e) + hotplug_slot(0f) + hotplug_slot(10) + hotplug_slot(11) + hotplug_slot(12) + hotplug_slot(13) + hotplug_slot(14) + hotplug_slot(15) + hotplug_slot(16) + hotplug_slot(17) + hotplug_slot(18) + hotplug_slot(19) + hotplug_slot(1a) + hotplug_slot(1b) + hotplug_slot(1c) + hotplug_slot(1d) + hotplug_slot(1e) + hotplug_slot(1f) + + /* PCI hotplug notify method */ + Method(PCNF, 0) { + // Local0 = iterator + Store (Zero, Local0) + While (LLess(Local0, 31)) { + Increment(Local0) + If (And(PCIU, ShiftLeft(1, Local0))) { + PCNT(Local0, 1) + } + If (And(PCID, ShiftLeft(1, Local0))) { + PCNT(Local0, 3) + } + } + Return(One) + } + +#define hotplug_notify(nr) \ + If (LEqual(Arg0, 0x##nr)) {Notify(S##nr##0, Arg1)} + + Method(PCNT, 2) { + hotplug_notify(01) + hotplug_notify(02) + hotplug_notify(03) + hotplug_notify(04) + hotplug_notify(05) + hotplug_notify(06) + hotplug_notify(07) + hotplug_notify(08) + hotplug_notify(09) + hotplug_notify(0a) + hotplug_notify(0b) + hotplug_notify(0c) + hotplug_notify(0d) + hotplug_notify(0e) + hotplug_notify(0f) + hotplug_notify(10) + hotplug_notify(11) + hotplug_notify(12) + hotplug_notify(13) + hotplug_notify(14) + hotplug_notify(15) + hotplug_notify(16) + hotplug_notify(17) + hotplug_notify(18) + hotplug_notify(19) + hotplug_notify(1a) + hotplug_notify(1b) + hotplug_notify(1c) + hotplug_notify(1d) + hotplug_notify(1e) + hotplug_notify(1f) + } + } + /* CPU hotplug */ Scope(\_SB) { /* Objects filled in by run-time generated SSDT */ @@ -842,49 +913,9 @@ DefinitionBlock ( Return(0x01) } -#define gen_pci_hotplug(nr) \ - If (And(\_SB.PCI0.PCIU, ShiftLeft(1, nr))) { \ - Notify(\_SB.PCI0.S##nr, 1) \ - } \ - If (And(\_SB.PCI0.PCID, ShiftLeft(1, nr))) { \ - Notify(\_SB.PCI0.S##nr, 3) \ - } - Method(_L01) { - gen_pci_hotplug(1) - gen_pci_hotplug(2) - gen_pci_hotplug(3) - gen_pci_hotplug(4) - gen_pci_hotplug(5) - gen_pci_hotplug(6) - gen_pci_hotplug(7) - gen_pci_hotplug(8) - gen_pci_hotplug(9) - gen_pci_hotplug(10) - gen_pci_hotplug(11) - gen_pci_hotplug(12) - gen_pci_hotplug(13) - gen_pci_hotplug(14) - gen_pci_hotplug(15) - gen_pci_hotplug(16) - gen_pci_hotplug(17) - gen_pci_hotplug(18) - gen_pci_hotplug(19) - gen_pci_hotplug(20) - gen_pci_hotplug(21) - gen_pci_hotplug(22) - gen_pci_hotplug(23) - gen_pci_hotplug(24) - gen_pci_hotplug(25) - gen_pci_hotplug(26) - gen_pci_hotplug(27) - gen_pci_hotplug(28) - gen_pci_hotplug(29) - gen_pci_hotplug(30) - gen_pci_hotplug(31) - - Return (0x01) - + // PCI hotplug event + Return(\_SB.PCI0.PCNF()) } Method(_L02) { // CPU hotplug event

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Re: [SeaBIOS] [SeaBIOS PATCH v2] Fix regression of commit 87b533bf
by Kevin O'Connor 21 Sep '11

21 Sep '11

On Tue, Sep 20, 2011 at 04:00:57AM -0400, Amos Kong wrote: > From 4678a3cb0e0a3cd7a4bc3d284c5719fdba90bc61 Mon Sep 17 00:00:00 2001 > From: Kevin O'Connor <kevin(a)koconnor.net> > Date: Tue, 20 Sep 2011 15:43:55 +0800 > Subject: [PATCH V2] Fix regression of commit 87b533bf > > From: Kevin O'Connor <kevin(a)koconnor.net> > > After adding more device entries in ACPI DSDT tables, > the filesize of bios.bin changed from 128K to 256K. > But bios could not initialize successfully. > > This is a regression since seabios commit 87b533bf. Prior to > that commit, seabios did not mark the early 32bit initialization > code as init code. However, a side effect of marking that code > (handle_post) as init code is that it is more likely the linker > could place the code at an address less than 0xe0000. > The patch (just a hack) would cover up the issue. Thanks. I committed a slightly different patch (but similar concept) to the seabios repo. -Kevin

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Re: [SeaBIOS] [SeaBIOS PATCH v2] hotplug: Add device per func in ACPI DSDT tables
by Marcelo Tosatti 20 Sep '11

20 Sep '11

On Tue, Sep 20, 2011 at 06:45:57AM -0400, Amos Kong wrote: > >From 48ea1c9188334b89a60b4f9e853e86fc04fda4a5 Mon Sep 17 00:00:00 2001 > From: Amos Kong <akong(a)redhat.com> > Date: Tue, 20 Sep 2011 15:38:43 +0800 > Subject: [SeaBIOS PATCH v2] hotplug: Add device per func in ACPI DSDT tables > > Only func 0 is registered to guest driver (we can > only found func 0 in slot->funcs list of driver), > the other functions could not be cleaned when > hot-removing the whole slot. This patch adds > device per function in ACPI DSDT tables. > > Have tested with linux/winxp/win7, hot-adding/hot-remving, > single/multiple function device, they are all fine. > --- > Changes from v1: > - cleanup the macros, bios.bin gets back to 128K > - notify only when func0 is added and removed > > Signed-off-by: Amos Kong <akong(a)redhat.com> > Signed-off-by: Michael S. Tsirkin <mst(a)redhat.com> > --- > src/acpi-dsdt.dsl | 106 ++++++++++++++++++++++++++++++---------------------- > 1 files changed, 61 insertions(+), 45 deletions(-) > > diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl > index 08412e2..707c3d6 100644 > --- a/src/acpi-dsdt.dsl > +++ b/src/acpi-dsdt.dsl > @@ -128,9 +128,9 @@ DefinitionBlock ( > PCRM, 32, > } > > -#define hotplug_slot(name, nr) \ > - Device (S##name) { \ > - Name (_ADR, nr##0000) \ > +#define hotplug_func(name, nr, adr, fn) \ > + Device (S##name##fn) { \ > + Name (_ADR, adr) \ > Method (_EJ0,1) { \ > Store(ShiftLeft(1, nr), B0EJ) \ > Return (0x0) \ > @@ -138,6 +138,16 @@ DefinitionBlock ( > Name (_SUN, name) \ > } > > +#define hotplug_slot(name, nr) \ > + hotplug_func(name, nr, nr##0000, 0) \ > + hotplug_func(name, nr, nr##0001, 1) \ > + hotplug_func(name, nr, nr##0002, 2) \ > + hotplug_func(name, nr, nr##0003, 3) \ > + hotplug_func(name, nr, nr##0004, 4) \ > + hotplug_func(name, nr, nr##0005, 5) \ > + hotplug_func(name, nr, nr##0006, 6) \ > + hotplug_func(name, nr, nr##0007, 7) > + > hotplug_slot(1, 0x0001) > hotplug_slot(2, 0x0002) > hotplug_slot(3, 0x0003) > @@ -460,7 +470,7 @@ DefinitionBlock ( > } > } > > -#define gen_pci_device(name, nr) \ > +#define gen_pci_device(name, nr) \ > Device(SL##name) { \ > Name (_ADR, nr##0000) \ > Method (_RMV) { \ > @@ -502,6 +512,52 @@ DefinitionBlock ( > gen_pci_device(29, 0x001d) > gen_pci_device(30, 0x001e) > gen_pci_device(31, 0x001f) > + > +#define gen_pci_hotplug(nr) \ > + If (And(PCIU, ShiftLeft(1, nr))) { \ > + Notify(S##nr##0, 1) \ > + } \ > + If (And(PCID, ShiftLeft(1, nr))) { \ > + Notify(S##nr##0, 3) \ > + } > + > + Method(HPLG) { > + gen_pci_hotplug(1) > + gen_pci_hotplug(2) > + gen_pci_hotplug(3) > + gen_pci_hotplug(4) > + gen_pci_hotplug(5) > + gen_pci_hotplug(6) > + gen_pci_hotplug(7) > + gen_pci_hotplug(8) > + gen_pci_hotplug(9) > + gen_pci_hotplug(10) > + gen_pci_hotplug(11) > + gen_pci_hotplug(12) > + gen_pci_hotplug(13) > + gen_pci_hotplug(14) > + gen_pci_hotplug(15) > + gen_pci_hotplug(16) > + gen_pci_hotplug(17) > + gen_pci_hotplug(18) > + gen_pci_hotplug(19) > + gen_pci_hotplug(20) > + gen_pci_hotplug(21) > + gen_pci_hotplug(22) > + gen_pci_hotplug(23) > + gen_pci_hotplug(24) > + gen_pci_hotplug(25) > + gen_pci_hotplug(26) > + gen_pci_hotplug(27) > + gen_pci_hotplug(28) > + gen_pci_hotplug(29) > + gen_pci_hotplug(30) > + gen_pci_hotplug(31) > + > + Return (0x01) > + } > + > + > } > > /* PCI IRQs */ > @@ -842,49 +898,9 @@ DefinitionBlock ( > Return(0x01) > } > > -#define gen_pci_hotplug(nr) \ > - If (And(\_SB.PCI0.PCIU, ShiftLeft(1, nr))) { \ > - Notify(\_SB.PCI0.S##nr, 1) \ > - } \ > - If (And(\_SB.PCI0.PCID, ShiftLeft(1, nr))) { \ > - Notify(\_SB.PCI0.S##nr, 3) \ > - } > - > Method(_L01) { > - gen_pci_hotplug(1) > - gen_pci_hotplug(2) > - gen_pci_hotplug(3) > - gen_pci_hotplug(4) > - gen_pci_hotplug(5) > - gen_pci_hotplug(6) > - gen_pci_hotplug(7) > - gen_pci_hotplug(8) > - gen_pci_hotplug(9) > - gen_pci_hotplug(10) > - gen_pci_hotplug(11) > - gen_pci_hotplug(12) > - gen_pci_hotplug(13) > - gen_pci_hotplug(14) > - gen_pci_hotplug(15) > - gen_pci_hotplug(16) > - gen_pci_hotplug(17) > - gen_pci_hotplug(18) > - gen_pci_hotplug(19) > - gen_pci_hotplug(20) > - gen_pci_hotplug(21) > - gen_pci_hotplug(22) > - gen_pci_hotplug(23) > - gen_pci_hotplug(24) > - gen_pci_hotplug(25) > - gen_pci_hotplug(26) > - gen_pci_hotplug(27) > - gen_pci_hotplug(28) > - gen_pci_hotplug(29) > - gen_pci_hotplug(30) > - gen_pci_hotplug(31) > - > + \_SB.PCI0.HPLG() What is the point of this new method?

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SeaBIOS September 2011