coreboot-gerrit September 2022

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[M] Change in coreboot[master]: soc/amd/acpi: Add low/no battery mode to DPTC
by Tim Van Patten (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Matt DeVillier, Tim Wawrzynczak, Martin Roth, Fred Reitberger, Karthik Ramasubramanian, Felix Held. Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66804 ) Change subject: soc/amd/acpi: Add low/no battery mode to DPTC ...................................................................... Patch Set 18: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/66804/comment/8601240f_d1bc3d3f PS16, Line 7: soc/amd > soc/amd/common/acpi Done https://review.coreboot.org/c/coreboot/+/66804/comment/9812aea2_abc2b647 PS16, Line 13: refactor CL > It's not really a refactor CL, it's adding new functionality. Done File src/soc/amd/common/acpi/dptc.asl: https://review.coreboot.org/c/coreboot/+/66804/comment/59e4163a_0108799c PS16, Line 20: ( > Do we need to group these? Ah, no. That's a relic from when these were being generated. -- To view, visit https://review.coreboot.org/c/coreboot/+/66804 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icea10a3876a29744ad8485be1557e184bcbfa397 Gerrit-Change-Number: 66804 Gerrit-PatchSet: 18 Gerrit-Owner: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 06 Sep 2022 17:11:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd: Refactor DPTC Tablet Mode
by Tim Van Patten (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Jason Nien, Marshall Dawson, Matt DeVillier, Tim Wawrzynczak, Martin Roth, Fred Reitberger, Felix Held. Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66994 ) Change subject: soc/amd: Refactor DPTC Tablet Mode ...................................................................... Patch Set 12: (3 comments) File src/mainboard/google/zork/variants/morphius/overridetree.cb: https://review.coreboot.org/c/coreboot/+/66994/comment/a1c40fca_ef5125e3 PS9, Line 34: true > quote Done File src/soc/amd/cezanne/chip.h: https://review.coreboot.org/c/coreboot/+/66994/comment/baeff4f4_41b5c41a PS10, Line 91: /* Enable dptc tablet mode */ : bool dptc_tablet_mode_enable; > Hrmm, how about you reorder your Cls. Move the CL that deletes the tablet mode before this one. `acpigen_write_alib_dptc()` requires good (non-null) values for `tablet_param` and `tablet_param_len`, so we can't remove tablet mode without this refactor first. > I would also just delete the dptc_enable bit in that CL. See the comment below. File src/soc/amd/picasso/chip.h: https://review.coreboot.org/c/coreboot/+/66994/comment/1a7e5845_c913a0ab PS10, Line 120: /* Enable dptc for tablet mode */ : bool dptc_enable; > So in reality this bit is already doing what you want. […] As you pointed out, removing `dptc_enable` means the default DPTC settings can't be set without also including either tablet or no battery settings also. I'm going to leave it, since I these are three distinct options: 1. Default DPTC 2. Tablet DPTC 3. No Battery DPTC The only thing special about the default DPTC is that it must be specified if tablet or no battery are enabled, so we have default values to restore when the device leaves those modes. -- To view, visit https://review.coreboot.org/c/coreboot/+/66994 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2518fdd526868c9d5668a6018fd3570392e809c0 Gerrit-Change-Number: 66994 Gerrit-PatchSet: 12 Gerrit-Owner: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 06 Sep 2022 17:10:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: amd: Convert dptc_enable to bool
by Tim Van Patten (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Paul Menzel, Fred Reitberger, Karthik Ramasubramanian. Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67188 ) Change subject: amd: Convert dptc_enable to bool ...................................................................... Patch Set 8: (1 comment) File src/mainboard/google/zork/variants/morphius/overridetree.cb: https://review.coreboot.org/c/coreboot/+/67188/comment/a7c0f194_d58fbe50 PS5, Line 33: true > I would say quote it to keep the consistency. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/67188 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0e93d892b3b8016221812c8b9ec6c257dcf13ef5 Gerrit-Change-Number: 67188 Gerrit-PatchSet: 8 Gerrit-Owner: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 06 Sep 2022 17:10:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Tim Van Patten <timvp(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: skyrim/overridetree: Add "Normal" DPTC values
by Tim Van Patten (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Fred Reitberger, Felix Held. Tim Van Patten has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/67378 ) Change subject: skyrim/overridetree: Add "Normal" DPTC values ...................................................................... skyrim/overridetree: Add "Normal" DPTC values Add the Normal Mode DPTC values for Skyrim. These values were generated by AMD. BRANCH=none BUG=b:217911928 TEST=Build skyrim Signed-off-by: Tim Van Patten <timvp(a)google.com> Change-Id: Ie62129d967192f9a9cf654b1854d7dbe4324802a --- M src/mainboard/google/skyrim/variants/skyrim/overridetree.cb M src/soc/amd/mendocino/chip.h 2 files changed, 33 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/67378/1 diff --git a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb index 945ea19..b60c14a 100644 --- a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb +++ b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb @@ -245,4 +245,15 @@ end end # UART1 + # Normal + register "slow_ppt_limit_mW" = "25000" + register "fast_ppt_limit_mW" = "30000" + register "slow_ppt_time_constant_s" = "5" + register "stapm_time_constant_s" = "275" + register "sustained_power_limit_mW" = "15000" + register "thermctl_limit_degreeC" = "100" + register "vrm_current_limit_mA" = "28000" + register "vrm_maximum_current_limit_mA" = "50000" + register "vrm_soc_current_limit_mA" = "10000" + end # chip soc/amd/mendocino diff --git a/src/soc/amd/mendocino/chip.h b/src/soc/amd/mendocino/chip.h index 7b33340..0863f9c 100644 --- a/src/soc/amd/mendocino/chip.h +++ b/src/soc/amd/mendocino/chip.h @@ -56,6 +56,7 @@ uint16_t stt_error_coeff; uint16_t stt_error_rate_coefficient; + /* Default */ uint8_t stapm_boost; uint32_t stapm_time_constant_s; uint32_t apu_only_sppt_limit; @@ -64,6 +65,9 @@ uint32_t slow_ppt_limit_mW; uint32_t slow_ppt_time_constant_s; uint32_t thermctl_limit_degreeC; + uint32_t vrm_current_limit_mA; + uint32_t vrm_maximum_current_limit_mA; + uint32_t vrm_soc_current_limit_mA; uint8_t smartshift_enable; -- To view, visit https://review.coreboot.org/c/coreboot/+/67378 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie62129d967192f9a9cf654b1854d7dbe4324802a Gerrit-Change-Number: 67378 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: skyrim/overridetree: Enable DPTC and No Battery Mode
by Tim Van Patten (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Jason Nien, Tim Van Patten. Hello build bot (Jenkins), Jason Nien, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/67211 to look at the new patch set (#5). Change subject: skyrim/overridetree: Enable DPTC and No Battery Mode ...................................................................... skyrim/overridetree: Enable DPTC and No Battery Mode Enable DPTC and No Battery Mode for Skyrim. This allows Skyrim to boot without a battery or with a critically low battery. BRANCH=none BUG=b:217911928 TEST=Boot skyrim with low & no battery Signed-off-by: Tim Van Patten <timvp(a)google.com> Change-Id: Icc4084476916cc8e142908d8e58baf7124568b8b --- M src/mainboard/google/skyrim/variants/skyrim/overridetree.cb 1 file changed, 20 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/67211/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/67211 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icc4084476916cc8e142908d8e58baf7124568b8b Gerrit-Change-Number: 67211 Gerrit-PatchSet: 5 Gerrit-Owner: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/amd: Throttle SOC during low/no battery
by Tim Van Patten (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Jason Glenesk, Jason Nien, Matt DeVillier, Martin Roth, Tim Van Patten, Fred Reitberger, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Fred Reitberger, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/67189 to look at the new patch set (#9). Change subject: soc/amd: Throttle SOC during low/no battery ...................................................................... soc/amd: Throttle SOC during low/no battery Use dynamic power and thermal configuration (DPTC) via ACPI ALIB calls to throttle the SOC when there is no battery or critically low battery, to enable the SOC to boot without overwhelming the AC charger and browning out. DPTC is not enabled for low/no battery mode with this CL. It will be enabled for Skyrim in a following CL. BRANCH=none BUG=b:217911928 TEST=Boot skyrim Signed-off-by: Tim Van Patten <timvp(a)google.com> Change-Id: Ifeddb99e97af93b40a5aad960d760e4c101cf086 --- M src/mainboard/google/skyrim/variants/skyrim/overridetree.cb M src/soc/amd/mendocino/acpi/soc.asl M src/soc/amd/mendocino/chip.h M src/soc/amd/mendocino/root_complex.c 4 files changed, 72 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/67189/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/67189 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifeddb99e97af93b40a5aad960d760e4c101cf086 Gerrit-Change-Number: 67189 Gerrit-PatchSet: 9 Gerrit-Owner: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/amd/acpi: Add low/no battery mode to DPTC
by Tim Van Patten (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Jason Glenesk, Marshall Dawson, Matt DeVillier, Tim Wawrzynczak, Martin Roth, Tim Van Patten, Fred Reitberger, Karthik Ramasubramanian, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Matt DeVillier, Tim Wawrzynczak, Fred Reitberger, Karthik Ramasubramanian, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/66804 to look at the new patch set (#18). Change subject: soc/amd/acpi: Add low/no battery mode to DPTC ...................................................................... soc/amd/acpi: Add low/no battery mode to DPTC Update acpigen_write_alib_dptc() to support "low/no battery mode", which throttles the SOC when there is no battery connected or the battery charge is critically low. This is in preparation for enabling this functionality for Mendocino. BUG=b:217911928 TEST=Build zork TEST=Boot nipperkin TEST=Boot skyrim Signed-off-by: Tim Van Patten <timvp(a)google.com> Change-Id: Icea10a3876a29744ad8485be1557e184bcbfa397 --- M src/soc/amd/common/acpi/dptc.asl M src/soc/amd/common/block/acpi/alib.c M src/soc/amd/common/block/include/amdblocks/alib.h 3 files changed, 61 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/66804/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/66804 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icea10a3876a29744ad8485be1557e184bcbfa397 Gerrit-Change-Number: 66804 Gerrit-PatchSet: 18 Gerrit-Owner: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/amd: Refactor DPTC Tablet Mode
by Tim Van Patten (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Jason Glenesk, Jason Nien, Marshall Dawson, Matt DeVillier, Tim Wawrzynczak, Martin Roth, Tim Van Patten, Fred Reitberger, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Jason Nien, Marshall Dawson, Matt DeVillier, Tim Wawrzynczak, Martin Roth, Fred Reitberger, Karthik Ramasubramanian, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/66994 to look at the new patch set (#12). Change subject: soc/amd: Refactor DPTC Tablet Mode ...................................................................... soc/amd: Refactor DPTC Tablet Mode Refactor AMD DPTC tablet mode in preparation for adding low/no battery DPTC settings. 1. Refactor and simplify acpigen_write_alib_dptc() into the following functions: - acpigen_write_alib_dptc_default() - acpigen_write_alib_dptc_tablet() 2. Add device tree register value dptc_tablet_mode_enabled to control whether DPTC tablet mode is enabled for a variant. 3. Add dptc.asl to perform the necessary ACPI checking before modifying the DPTC settings. BRANCH=none BUG=b:217911928 TEST=Build zork TEST=Build nipperkin TEST=Boot skyrim Change-Id: I2518fdd526868c9d5668a6018fd3570392e809c0 Signed-off-by: Tim Van Patten <timvp(a)google.com> --- M src/soc/amd/cezanne/acpi/soc.asl M src/soc/amd/cezanne/chip.h M src/soc/amd/cezanne/root_complex.c A src/soc/amd/common/acpi/dptc.asl M src/soc/amd/common/block/acpi/alib.c M src/soc/amd/common/block/include/amdblocks/alib.h M src/soc/amd/mendocino/Kconfig M src/soc/amd/mendocino/acpi/soc.asl M src/soc/amd/mendocino/chip.h M src/soc/amd/mendocino/root_complex.c M src/soc/amd/picasso/acpi/soc.asl M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/root_complex.c 13 files changed, 161 insertions(+), 49 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/66994/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/66994 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2518fdd526868c9d5668a6018fd3570392e809c0 Gerrit-Change-Number: 66994 Gerrit-PatchSet: 12 Gerrit-Owner: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: amd: Convert dptc_enable to bool
by Tim Van Patten (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Jason Glenesk, Jason Nien, Matt DeVillier, Paul Menzel, Tim Van Patten, Fred Reitberger, Karthik Ramasubramanian. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Fred Reitberger, Karthik Ramasubramanian, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/67188 to look at the new patch set (#8). Change subject: amd: Convert dptc_enable to bool ...................................................................... amd: Convert dptc_enable to bool dptc_enable is being treated as a bool, so convert to explicitly be a bool. BRANCH=none BUG=b:217911928 TEST=Build zork TEST=Build guybrush TEST=Build skyrim Change-Id: I0e93d892b3b8016221812c8b9ec6c257dcf13ef5 Signed-off-by: Tim Van Patten <timvp(a)google.com> --- M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/soc/amd/cezanne/chip.h M src/soc/amd/mendocino/chip.h M src/soc/amd/picasso/chip.h 4 files changed, 26 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/67188/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/67188 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0e93d892b3b8016221812c8b9ec6c257dcf13ef5 Gerrit-Change-Number: 67188 Gerrit-PatchSet: 8 Gerrit-Owner: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/prodrive/hermes: Add libgfxinit support
by build bot (Jenkins) (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Arthur Heymans, Patrick Rudolph, Christian Walter. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62648 ) Change subject: mb/prodrive/hermes: Add libgfxinit support ...................................................................... Patch Set 6: Verified+1 (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-158139): https://review.coreboot.org/c/coreboot/+/62648/comment/5ebfcb60_b6cb97a0 PS6, Line 8: Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/62648 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib71d06e1d83cd26b0fef37acc64f699c452c13dc Gerrit-Change-Number: 62648 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Comment-Date: Tue, 06 Sep 2022 17:02:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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