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Change subject: skyrim/overridetree: Enable DPTC and No Battery Mode
......................................................................
skyrim/overridetree: Enable DPTC and No Battery Mode
Enable DPTC and No Battery Mode for Skyrim. This allows Skyrim to boot
without a battery or with a critically low battery.
BRANCH=none
BUG=b:217911928
TEST=Boot skyrim with low & no battery
Signed-off-by: Tim Van Patten <timvp(a)google.com>
Change-Id: Icc4084476916cc8e142908d8e58baf7124568b8b
---
M src/mainboard/google/skyrim/variants/skyrim/overridetree.cb
1 file changed, 20 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/67211/5
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Change subject: soc/amd: Throttle SOC during low/no battery
......................................................................
soc/amd: Throttle SOC during low/no battery
Use dynamic power and thermal configuration (DPTC) via ACPI ALIB calls
to throttle the SOC when there is no battery or critically low battery,
to enable the SOC to boot without overwhelming the AC charger and
browning out.
DPTC is not enabled for low/no battery mode with this CL. It will be
enabled for Skyrim in a following CL.
BRANCH=none
BUG=b:217911928
TEST=Boot skyrim
Signed-off-by: Tim Van Patten <timvp(a)google.com>
Change-Id: Ifeddb99e97af93b40a5aad960d760e4c101cf086
---
M src/mainboard/google/skyrim/variants/skyrim/overridetree.cb
M src/soc/amd/mendocino/acpi/soc.asl
M src/soc/amd/mendocino/chip.h
M src/soc/amd/mendocino/root_complex.c
4 files changed, 72 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/67189/9
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Change subject: soc/amd/acpi: Add low/no battery mode to DPTC
......................................................................
soc/amd/acpi: Add low/no battery mode to DPTC
Update acpigen_write_alib_dptc() to support "low/no battery mode",
which throttles the SOC when there is no battery connected or the
battery charge is critically low.
This is in preparation for enabling this functionality for Mendocino.
BUG=b:217911928
TEST=Build zork
TEST=Boot nipperkin
TEST=Boot skyrim
Signed-off-by: Tim Van Patten <timvp(a)google.com>
Change-Id: Icea10a3876a29744ad8485be1557e184bcbfa397
---
M src/soc/amd/common/acpi/dptc.asl
M src/soc/amd/common/block/acpi/alib.c
M src/soc/amd/common/block/include/amdblocks/alib.h
3 files changed, 61 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/66804/18
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Change subject: soc/amd: Refactor DPTC Tablet Mode
......................................................................
soc/amd: Refactor DPTC Tablet Mode
Refactor AMD DPTC tablet mode in preparation for adding low/no battery
DPTC settings.
1. Refactor and simplify acpigen_write_alib_dptc() into the following
functions:
- acpigen_write_alib_dptc_default()
- acpigen_write_alib_dptc_tablet()
2. Add device tree register value dptc_tablet_mode_enabled to control
whether DPTC tablet mode is enabled for a variant.
3. Add dptc.asl to perform the necessary ACPI checking before modifying
the DPTC settings.
BRANCH=none
BUG=b:217911928
TEST=Build zork
TEST=Build nipperkin
TEST=Boot skyrim
Change-Id: I2518fdd526868c9d5668a6018fd3570392e809c0
Signed-off-by: Tim Van Patten <timvp(a)google.com>
---
M src/soc/amd/cezanne/acpi/soc.asl
M src/soc/amd/cezanne/chip.h
M src/soc/amd/cezanne/root_complex.c
A src/soc/amd/common/acpi/dptc.asl
M src/soc/amd/common/block/acpi/alib.c
M src/soc/amd/common/block/include/amdblocks/alib.h
M src/soc/amd/mendocino/Kconfig
M src/soc/amd/mendocino/acpi/soc.asl
M src/soc/amd/mendocino/chip.h
M src/soc/amd/mendocino/root_complex.c
M src/soc/amd/picasso/acpi/soc.asl
M src/soc/amd/picasso/chip.h
M src/soc/amd/picasso/root_complex.c
13 files changed, 161 insertions(+), 49 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/66994/12
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Change subject: amd: Convert dptc_enable to bool
......................................................................
amd: Convert dptc_enable to bool
dptc_enable is being treated as a bool, so convert to explicitly be a
bool.
BRANCH=none
BUG=b:217911928
TEST=Build zork
TEST=Build guybrush
TEST=Build skyrim
Change-Id: I0e93d892b3b8016221812c8b9ec6c257dcf13ef5
Signed-off-by: Tim Van Patten <timvp(a)google.com>
---
M src/mainboard/google/zork/variants/morphius/overridetree.cb
M src/soc/amd/cezanne/chip.h
M src/soc/amd/mendocino/chip.h
M src/soc/amd/picasso/chip.h
4 files changed, 26 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/67188/8
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Change subject: mb/prodrive/hermes: Add libgfxinit support
......................................................................
Patch Set 6: Verified+1
(1 comment)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-158139):
https://review.coreboot.org/c/coreboot/+/62648/comment/5ebfcb60_b6cb97a0
PS6, Line 8:
Possible unwrapped commit description (prefer a maximum 72 chars per line)
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Angel Pons has uploaded a new patch set (#6) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/62649 )
Change subject: mb/prodrive/hermes: Skip setting up ASPEED if primary is IGD
......................................................................
mb/prodrive/hermes: Skip setting up ASPEED if primary is IGD
This allows the payload to be usable on the Intel integrated graphic
device instead of the BMC depending on an eeprom variable.
TODO Angel: We also need to skip stuff when coreboot enumerates buses,
otherwise coreboot sets up VGA for the ASPEED instead of the Intel iGPU.
Change-Id: I24d9ebc2055dc246e7f257aa2f3853b22c8af370
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/mainboard/prodrive/hermes/eeprom.c
M src/mainboard/prodrive/hermes/mainboard.c
M src/mainboard/prodrive/hermes/romstage.c
3 files changed, 59 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/62649/6
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Change subject: mb/prodrive/hermes: Add libgfxinit support
......................................................................
mb/prodrive/hermes: Add libgfxinit support
Tested DP port works. HDMI seems broken, but that is also the case in Linux.
Change-Id: Ib71d06e1d83cd26b0fef37acc64f699c452c13dc
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/mainboard/prodrive/hermes/Kconfig
M src/mainboard/prodrive/hermes/Makefile.inc
A src/mainboard/prodrive/hermes/gma-mainboard.ads
3 files changed, 35 insertions(+), 0 deletions(-)
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Change subject: guybrush: remove RO_GSCVD area from FMAP
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
adding julius werner, can you please quote the reason for not using gscvd on CR50 devices by default, and about the possibility of using it over the same.
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