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Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/67381 )
Change subject: [RFC] mb/prodrive/hermes: Make board settings less error-prone
......................................................................
[RFC] mb/prodrive/hermes: Make board settings less error-prone
If the board settings definition differs between coreboot and the BMC,
the CRC will not match. Allow coreboot to use the BMC settings provided
by older BMC firmware revisions which have less settings, if the CRC of
the first N bytes matches the expected CRC.
TEST=Boot coreboot master with BMC FW 4.05, observe board settings being
honored even though coreboot's definition has an extra option.
Change-Id: I0f009b21ef0850a2af6edef1818c770171358314
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
M src/mainboard/prodrive/hermes/eeprom.c
1 file changed, 32 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/67381/1
diff --git a/src/mainboard/prodrive/hermes/eeprom.c b/src/mainboard/prodrive/hermes/eeprom.c
index 7a92fe3..8ce671b 100644
--- a/src/mainboard/prodrive/hermes/eeprom.c
+++ b/src/mainboard/prodrive/hermes/eeprom.c
@@ -51,6 +51,20 @@
if (crc != board_cfg->signature) {
printk(BIOS_ERR, "CFG EEPROM: Board settings have invalid checksum\n");
+
+ /*
+ * coreboot's board settings definition may be newer than the BMC's,
+ * try to see if the CRC of the first i bytes matches the expected CRC.
+ */
+ for (size_t i = 1; i < sizeof(board_cfg->raw_settings); i++) {
+ const uint32_t crc_part = CRC(&board_cfg->raw_settings, i, crc32_byte);
+ if (crc_part == board_cfg->signature) {
+ for (; i < sizeof(board_cfg->raw_settings); i++)
+ board_cfg->raw_settings[i] = 0;
+ printk(BIOS_ERR, "CFG EEPROM: Checksum OK for %zu bytes\n", i);
+ return true;
+ }
+ }
return false;
}
return true;
--
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Angel Pons has uploaded a new patch set (#7) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/62649 )
Change subject: mb/prodrive/hermes: Allow using the Intel iGPU as primary
......................................................................
mb/prodrive/hermes: Allow using the Intel iGPU as primary
Configure the Intel iGPU as primary video adapter if enabled according
to EEPROM settings. The default is to use the ASPEED BMC as primary
video adapter, which only has a VGA output and the remote KVM output.
TODO: Figure out why iGPU video stops working after booting Linux and
doing a warm (no power cycle) reboot.
TEST=Test that DP and HDMI outputs work in pre-OS and on Linux using
the Poseidon piggy-back board, which has two DisplayPort outputs
and one HDMI output from a LSPCON.
Change-Id: I24d9ebc2055dc246e7f257aa2f3853b22c8af370
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/mainboard/prodrive/hermes/eeprom.h
M src/mainboard/prodrive/hermes/mainboard.c
M src/mainboard/prodrive/hermes/romstage.c
3 files changed, 56 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/62649/7
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Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67301 )
Change subject: soc/amd/common/block/apob: Add hashed APOB support
......................................................................
Patch Set 4:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/67301/comment/5fcf02b8_cde8215e
PS4, Line 15: chausie
> Can you try it on a guybrush device?
I don't have a guybrush to test with. I did test this on chausie with the option both enabled and disabled, and it behaved as expected. I think it should work on guybrush, but have no way to verify.
File src/soc/amd/common/block/apob/apob_cache.c:
https://review.coreboot.org/c/coreboot/+/67301/comment/de952afd_1c15f4c3
PS4, Line 57: apob_header_ptr->size + MRC_HASH_SIZE
> You could probably do this as a `_Static_assert` above
If this check fails, the device can still boot. The actual size is not known at compile time. Added a temp variable to make this more readable.
https://review.coreboot.org/c/coreboot/+/67301/comment/df2ebfc3_b0987a00
PS4, Line 195: xxh64
> I wonder if coreboot has an existing has function. […]
I looked into vboot sha256, but it took ~800 microseconds compared to ~60 for xxhash.
https://review.coreboot.org/c/coreboot/+/67301/comment/7126332c_90161071
PS4, Line 214: !update_needed &&
> You can probably skip this part since `apob_rom` will be `NULL` if `update_needed == true`
Done
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Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Matt DeVillier, Martin Roth, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/67301
to look at the new patch set (#5).
Change subject: soc/amd/common/block/apob: Add hashed APOB support
......................................................................
soc/amd/common/block/apob: Add hashed APOB support
Comparing the APOB in RAM to flash takes a significant amount of time
(~11ms). Instead of comparing the entire APOB, use a fast hash function
and compare just that. Reading, hashing, and comparing the hash take
~70 microseconds.
BUG=b:193557430
TEST=compile and boot to OS in chausie with and without this option set
Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com>
Change-Id: I241968b115aaf41af63445410660bdd5199ceaba
---
M src/soc/amd/common/block/apob/Kconfig
M src/soc/amd/common/block/apob/apob_cache.c
2 files changed, 78 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/67301/5
--
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67337 )
Change subject: lint/checkpatch: Fix incorrect camelcase detection on numeric constant
......................................................................
lint/checkpatch: Fix incorrect camelcase detection on numeric constant
This reduce the difference with linux v6.0-rc3.
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
Change-Id: I15e1a935665c38b8a2109d412b1d16f935cbb402
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67337
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Martin L Roth <gaumless(a)gmail.com>
---
M util/lint/checkpatch.pl
1 file changed, 16 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Martin L Roth: Looks good to me, approved
diff --git a/util/lint/checkpatch.pl b/util/lint/checkpatch.pl
index 650ddff..ef2faee 100755
--- a/util/lint/checkpatch.pl
+++ b/util/lint/checkpatch.pl
@@ -5326,7 +5326,7 @@
$var !~ /^(?:[a-z0-9_]*|[A-Z0-9_]*)?_?[a-z][A-Z](?:_[a-z0-9_]+|_[A-Z0-9_]+)?$/ &&
#Ignore some three character SI units explicitly, like MiB and KHz
$var !~ /^(?:[a-z_]*?)_?(?:[KMGT]iB|[KMGT]?Hz)(?:_[a-z_]+)?$/) {
- while ($var =~ m{($Ident)}g) {
+ while ($var =~ m{\b($Ident)}g) {
my $word = $1;
next if ($word !~ /[A-Z][a-z]|[a-z][A-Z]/);
if ($check) {
--
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Gerrit-Change-Number: 67337
Gerrit-PatchSet: 2
Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com>
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Gerrit-MessageType: merged
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67350 )
Change subject: util/lint: Add rules.h & compiler.h to 019-header-files linter
......................................................................
util/lint: Add rules.h & compiler.h to 019-header-files linter
The rules.h & compiler.h includes were removed in previous commits, so
add the checks to keep them out to the linter.
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: If4964ff26f5e83abbbdd26c2b1cd9a2eab5a0a0d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67350
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr>
---
M util/lint/lint-stable-019-header-files
1 file changed, 17 insertions(+), 2 deletions(-)
Approvals:
build bot (Jenkins): Verified
Elyes Haouas: Looks good to me, approved
diff --git a/util/lint/lint-stable-019-header-files b/util/lint/lint-stable-019-header-files
index c839dc5..6495d15 100755
--- a/util/lint/lint-stable-019-header-files
+++ b/util/lint/lint-stable-019-header-files
@@ -9,8 +9,7 @@
INCLUDED_DIRS='^src/'
EXCLUDED_FILES='src/include/kconfig.h'
-# TODO: Add rules when those patches are complete
-HEADER_FILES="k*config"
+HEADER_FILES="k\?config rules compiler"
# Use git grep if the code is in a git repo, otherwise use grep.
if [ -n "$(command -v git)" ] && \
--
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Gerrit-Change-Id: If4964ff26f5e83abbbdd26c2b1cd9a2eab5a0a0d
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67349 )
Change subject: src/soc/intel: remove force-included header compiler.h from file
......................................................................
src/soc/intel: remove force-included header compiler.h from file
The header file `compiler.h` is automatically included in the build by
the top level makefile using the command:
`-include $(src)/commonlib/bsd/include/commonlib/bsd/compiler.h`.
Similar to `config.h`, 'kconfig.h`, and 'rules.h`, this file does not
need to be included manually, so remove it.
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: I5d3eb3f5e5f940910b2d45e0a2ae508e5ce91609
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67349
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr>
---
M src/soc/intel/common/block/scs/early_mmc.c
1 file changed, 20 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Elyes Haouas: Looks good to me, approved
diff --git a/src/soc/intel/common/block/scs/early_mmc.c b/src/soc/intel/common/block/scs/early_mmc.c
index caee7d9..4e76533 100644
--- a/src/soc/intel/common/block/scs/early_mmc.c
+++ b/src/soc/intel/common/block/scs/early_mmc.c
@@ -5,7 +5,6 @@
#include <commonlib/storage/sd_mmc.h>
#include <commonlib/sd_mmc_ctrlr.h>
#include <commonlib/sdhci.h>
-#include <compiler.h>
#include <console/console.h>
#include <device/pci.h>
#include <intelblocks/mmc.h>
--
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