February 2020 - coreboot-gerrit

Change in coreboot[master]: drivers/ipmi: Add Supermicro OEM commands

by Patrick Rudolph (Code Review)

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38002 ) Change subject: drivers/ipmi: Add Supermicro OEM commands ...................................................................... drivers/ipmi: Add Supermicro OEM commands Add a new driver for OEM commands an select if from x11-lga1151-series. The driver communicates the BIOS version and date to the BMC using OEM commands. The command should be supported on all X11 series, but might work with older BMC, too. Tested on X11SSH-TF: The BIOS version strings are updated on boot and are visible in the BMC web UI. Change-Id: I51c22f83383affb70abb0efbcdc33ea925b5ff9f Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/drivers/ipmi/Kconfig M src/drivers/ipmi/Makefile.inc M src/drivers/ipmi/ipmi_kcs_ops.c A src/drivers/ipmi/ipmi_supermicro_oem.h A src/drivers/ipmi/supermicro_oem.c M src/mainboard/supermicro/x11-lga1151-series/Kconfig 6 files changed, 121 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/38002/1 diff --git a/src/drivers/ipmi/Kconfig b/src/drivers/ipmi/Kconfig index 0f7152d..e098bc8 100644 --- a/src/drivers/ipmi/Kconfig +++ b/src/drivers/ipmi/Kconfig @@ -8,3 +8,14 @@ depends on IPMI_KCS help KCS status and command register IO port address spacing + +config DRIVER_SUPERMICRO_IPMI_OEM + bool "Supermicro IPMI OEM BMC support" + depends on IPMI_KCS + default n + help + Tested on X11SSH only. Different BMCs might have different OEM + commands. + The following features are implemented: + * Communicates the BIOS version to the BMC + * Communicates the BIOS date to the BMC diff --git a/src/drivers/ipmi/Makefile.inc b/src/drivers/ipmi/Makefile.inc index 9d5b3d4..9fccccf 100644 --- a/src/drivers/ipmi/Makefile.inc +++ b/src/drivers/ipmi/Makefile.inc @@ -1,3 +1,4 @@ ramstage-$(CONFIG_IPMI_KCS) += ipmi_kcs.c ramstage-$(CONFIG_IPMI_KCS) += ipmi_kcs_ops.c ramstage-$(CONFIG_IPMI_KCS) += ipmi_ops.c +ramstage-$(CONFIG_DRIVER_SUPERMICRO_IPMI_OEM) += supermicro_oem.c diff --git a/src/drivers/ipmi/ipmi_kcs_ops.c b/src/drivers/ipmi/ipmi_kcs_ops.c index 5cb8995..ba8487f 100644 --- a/src/drivers/ipmi/ipmi_kcs_ops.c +++ b/src/drivers/ipmi/ipmi_kcs_ops.c @@ -34,6 +34,7 @@ #include <delay.h> #include <timer.h> #include "ipmi_kcs.h" +#include "ipmi_supermicro_oem.h" #include "chip.h" /* 4 bit encoding */ @@ -170,6 +171,12 @@ /* Don't write tables if communication failed */ dev->enabled = 0; } + + if (!dev->enabled) + return; + + if (CONFIG(DRIVER_SUPERMICRO_IPMI_OEM)) + supermicro_ipmi_oem(dev->path.pnp.port); } #if CONFIG(HAVE_ACPI_TABLES) diff --git a/src/drivers/ipmi/ipmi_supermicro_oem.h b/src/drivers/ipmi/ipmi_supermicro_oem.h new file mode 100644 index 0000000..742b97d --- /dev/null +++ b/src/drivers/ipmi/ipmi_supermicro_oem.h @@ -0,0 +1,20 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __IPMI_SUPERMICRO_OEM_H +#define __IPMI_SUPERMICRO_OEM_H + +void supermicro_ipmi_oem(const uint16_t kcs_port); + +#endif /* __IPMI_SUPERMICRO_OEM_H */ diff --git a/src/drivers/ipmi/supermicro_oem.c b/src/drivers/ipmi/supermicro_oem.c new file mode 100644 index 0000000..ea01fef --- /dev/null +++ b/src/drivers/ipmi/supermicro_oem.c @@ -0,0 +1,81 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <types.h> + +#include <console/console.h> +#include <drivers/ipmi/ipmi_kcs.h> +#include <string.h> +#include <build.h> +#include "ipmi_supermicro_oem.h" + +#define IPMI_NETFN_OEM 0x30 +#define IPMI_LUN0_AC_SET_BIOS_VER 0x100 +#define IPMI_LUN0_AC_SET_BIOS_DATE 0x101 +#define IPMI_LUN0_SET_BIOS_STRING 0xac + +struct ipmi_oem_set_bios_str { + uint16_t ver; + char str[16]; // NULL terminated string +} __packed; + +static void set_coreboot_ver(const uint16_t kcs_port) +{ + const char *coreboot_ver = COREBOOT_VERSION; + struct ipmi_oem_set_bios_str bios_ver; + struct ipmi_rsp rsp; + int ret; + size_t i; + + /* Only 8 charactars are visible in UI. Cut of on first dash */ + for (i = 0; i < 15; i++) { + if (coreboot_ver[i] == '-') + break; + bios_ver.str[i] = coreboot_ver[i]; + } + bios_ver.str[i] = 0; + bios_ver.ver = IPMI_LUN0_AC_SET_BIOS_VER; + + ret = ipmi_kcs_message(kcs_port, IPMI_NETFN_OEM, 0, IPMI_LUN0_SET_BIOS_STRING, + (const unsigned char *) &bios_ver, sizeof(bios_ver), + (unsigned char *) &rsp, sizeof(rsp)); + if (ret < sizeof(rsp) || rsp.completion_code) { + printk(BIOS_ERR, "BMC_IPMI: %s command failed (ret=%d resp=0x%x)\n", + __func__, ret, rsp.completion_code); + } +} + +static void set_coreboot_date(const uint16_t kcs_port) +{ + struct ipmi_oem_set_bios_str bios_ver; + struct ipmi_rsp rsp; + int ret; + + strncpy(bios_ver.str, COREBOOT_DMI_DATE, 15); + bios_ver.str[15] = 0; + bios_ver.ver = IPMI_LUN0_AC_SET_BIOS_DATE; + + ret = ipmi_kcs_message(kcs_port, IPMI_NETFN_OEM, 0, IPMI_LUN0_SET_BIOS_STRING, + (const unsigned char *) &bios_ver, sizeof(bios_ver), + (unsigned char *) &rsp, sizeof(rsp)); + if (ret < sizeof(rsp) || rsp.completion_code) { + printk(BIOS_ERR, "BMC_IPMI: %s command failed (ret=%d resp=0x%x)\n", + __func__, ret, rsp.completion_code); + } +} + +void supermicro_ipmi_oem(const uint16_t kcs_port) +{ + set_coreboot_ver(kcs_port); + set_coreboot_date(kcs_port); +} diff --git a/src/mainboard/supermicro/x11-lga1151-series/Kconfig b/src/mainboard/supermicro/x11-lga1151-series/Kconfig index 5a99f7a..53ae398 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/Kconfig +++ b/src/mainboard/supermicro/x11-lga1151-series/Kconfig @@ -12,6 +12,7 @@ select SUPERIO_ASPEED_AST2400 select GENERATE_SMBIOS_TABLES select IPMI_KCS + select DRIVER_SUPERMICRO_IPMI_OEM select MAINBOARD_NO_FSP_GOP select SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND select NO_FADT_8042 -- To view, visit https://review.coreboot.org/c/coreboot/+/38002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I51c22f83383affb70abb0efbcdc33ea925b5ff9f Gerrit-Change-Number: 38002 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

1 hour, 29 minutes

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Change in coreboot[master]: sc7180: enable bl31

by mturney mturney (Code Review)

Hello ashk(a)codeaurora.org, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/35504 to review the following change. Change subject: sc7180: enable bl31 ...................................................................... sc7180: enable bl31 Developer/Reviewer, be aware of this patch from Napali: https://review.coreboot.org/c/coreboot/+/28014/44 Change-Id: Ia961ee0e30478e21fd786ce464655977449df510 Signed-off-by: ashk <ashk(a)codeaurora.org> --- M src/soc/qualcomm/sc7180/Kconfig M src/soc/qualcomm/sc7180/include/soc/memlayout.ld 2 files changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/35504/1 diff --git a/src/soc/qualcomm/sc7180/Kconfig b/src/soc/qualcomm/sc7180/Kconfig index df5d116..28f7522 100644 --- a/src/soc/qualcomm/sc7180/Kconfig +++ b/src/soc/qualcomm/sc7180/Kconfig @@ -6,6 +6,7 @@ select ARCH_RAMSTAGE_ARMV8_64 select ARCH_ROMSTAGE_ARMV8_64 select ARCH_VERSTAGE_ARMV8_64 + select ARM64_USE_ARM_TRUSTED_FIRMWARE select GENERIC_GPIO_LIB select GENERIC_UDELAY select HAVE_MONOTONIC_TIMER diff --git a/src/soc/qualcomm/sc7180/include/soc/memlayout.ld b/src/soc/qualcomm/sc7180/include/soc/memlayout.ld index f4e6f05..e47f881 100644 --- a/src/soc/qualcomm/sc7180/include/soc/memlayout.ld +++ b/src/soc/qualcomm/sc7180/include/soc/memlayout.ld @@ -72,7 +72,7 @@ REGION(dram_reserved1, 0x80820000, 0x20000, 0x1000) REGION(dram_reserved, 0x80900000, 0x200000, 0x1000) /* Various hardware/software subsystems make use of this area */ - BL31(0x85000000, 0x1A800000) + BL31(0x80C00000, 0x1A800000) POSTRAM_CBFS_CACHE(0x9F800000, 384K) RAMSTAGE(0x9F860000, 2M) } -- To view, visit https://review.coreboot.org/c/coreboot/+/35504 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia961ee0e30478e21fd786ce464655977449df510 Gerrit-Change-Number: 35504 Gerrit-PatchSet: 1 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: ashk(a)codeaurora.org Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-MessageType: newchange

20 hours, 43 minutes

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Change in coreboot[master]: [RFC] sconfig: Allow to give static device nodes a name

by Nico Huber (Code Review)

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35456 ) Change subject: [RFC] sconfig: Allow to give static device nodes a name ...................................................................... [RFC] sconfig: Allow to give static device nodes a name The idea is to give device nodes in the `devicetree.cb` a name that can later be used in C code to identify the device (without having to look it up by fragile means). For this, we add an optional `as <identifier>` to the device declaration, for instance: device i2c 0x50 as serial_eeprom on end This leads to a `struct device __static_serial_eeprom;` that can then be used throughout coreboot. Change-Id: I058a319f9b968924fbef9485a96c9e3f900a3ee8 Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- M Makefile.inc M util/sconfig/lex.yy.c_shipped M util/sconfig/main.c M util/sconfig/sconfig.h M util/sconfig/sconfig.l M util/sconfig/sconfig.tab.c_shipped M util/sconfig/sconfig.tab.h_shipped M util/sconfig/sconfig.y 8 files changed, 589 insertions(+), 505 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/35456/1 diff --git a/Makefile.inc b/Makefile.inc index 3c3088d..ed4874a 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -386,7 +386,7 @@ COREBOOT_EXPORTS += COREBOOT_EXTRA_VERSION endif -CPPFLAGS_common := -Isrc -Isrc/include -Isrc/commonlib/include -I$(obj) +CPPFLAGS_common := -Isrc -Isrc/include -Isrc/commonlib/include -I$(obj) -I$(obj)/mainboard/$(MAINBOARDDIR) VBOOT_SOURCE ?= 3rdparty/vboot CPPFLAGS_common += -I$(VBOOT_SOURCE)/firmware/include CPPFLAGS_common += -include $(src)/include/kconfig.h diff --git a/util/sconfig/lex.yy.c_shipped b/util/sconfig/lex.yy.c_shipped index 14ffeff..c8202a1 100644 --- a/util/sconfig/lex.yy.c_shipped +++ b/util/sconfig/lex.yy.c_shipped @@ -6,7 +6,7 @@ #define FLEX_SCANNER #define YY_FLEX_MAJOR_VERSION 2 #define YY_FLEX_MINOR_VERSION 6 -#define YY_FLEX_SUBMINOR_VERSION 1 +#define YY_FLEX_SUBMINOR_VERSION 4 #if YY_FLEX_SUBMINOR_VERSION > 0 #define FLEX_BETA #endif @@ -81,10 +81,16 @@ #define UINT32_MAX (4294967295U) #endif +#ifndef SIZE_MAX +#define SIZE_MAX (~(size_t)0) +#endif + #endif /* ! C99 */ #endif /* ! FLEXINT_H */ +/* begin standard C++ headers. */ + /* TODO: this is always defined, so inline it */ #define yyconst const @@ -97,32 +103,26 @@ /* Returned upon end-of-file. */ #define YY_NULL 0 -/* Promotes a possibly negative, possibly signed char to an unsigned - * integer for use as an array index. If the signed char is negative, - * we want to instead treat it as an 8-bit unsigned char, hence the - * double cast. +/* Promotes a possibly negative, possibly signed char to an + * integer in range [0..255] for use as an array index. */ -#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) +#define YY_SC_TO_UI(c) ((YY_CHAR) (c)) /* Enter a start condition. This macro really ought to take a parameter, * but we do it the disgusting crufty way forced on us by the ()-less * definition of BEGIN. */ #define BEGIN (yy_start) = 1 + 2 * - /* Translate the current start state into a value that can be later handed * to BEGIN to return to the state. The YYSTATE alias is for lex * compatibility. */ #define YY_START (((yy_start) - 1) / 2) #define YYSTATE YY_START - /* Action number for EOF rule of a given start state. */ #define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) - /* Special action meaning "start processing a new file". */ -#define YY_NEW_FILE yyrestart(yyin ) - +#define YY_NEW_FILE yyrestart( yyin ) #define YY_END_OF_BUFFER_CHAR 0 /* Size of default input buffer. */ @@ -159,7 +159,7 @@ #define EOB_ACT_CONTINUE_SCAN 0 #define EOB_ACT_END_OF_FILE 1 #define EOB_ACT_LAST_MATCH 2 - + #define YY_LESS_LINENO(n) #define YY_LINENO_REWIND_TO(ptr) @@ -168,7 +168,7 @@ do \ { \ /* Undo effects of setting up yytext. */ \ - yy_size_t yyless_macro_arg = (n); \ + int yyless_macro_arg = (n); \ YY_LESS_LINENO(yyless_macro_arg);\ *yy_cp = (yy_hold_char); \ YY_RESTORE_YY_MORE_OFFSET \ @@ -176,7 +176,6 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ \ } \ while ( 0 ) - #define unput(c) yyunput( c, (yytext_ptr) ) #ifndef YY_STRUCT_YY_BUFFER_STATE @@ -258,7 +257,6 @@ #define YY_CURRENT_BUFFER ( (yy_buffer_stack) \ ? (yy_buffer_stack)[(yy_buffer_stack_top)] \ : NULL) - /* Same as previous macro, but useful when we know that the buffer stack is not * NULL or when we need an lvalue. For internal use only. */ @@ -279,62 +277,56 @@ */ static int yy_did_buffer_switch_on_eof; -void yyrestart (FILE *input_file ); -void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ); -YY_BUFFER_STATE yy_create_buffer (FILE *file,int size ); -void yy_delete_buffer (YY_BUFFER_STATE b ); -void yy_flush_buffer (YY_BUFFER_STATE b ); -void yypush_buffer_state (YY_BUFFER_STATE new_buffer ); -void yypop_buffer_state (void ); +void yyrestart ( FILE *input_file ); +void yy_switch_to_buffer ( YY_BUFFER_STATE new_buffer ); +YY_BUFFER_STATE yy_create_buffer ( FILE *file, int size ); +void yy_delete_buffer ( YY_BUFFER_STATE b ); +void yy_flush_buffer ( YY_BUFFER_STATE b ); +void yypush_buffer_state ( YY_BUFFER_STATE new_buffer ); +void yypop_buffer_state ( void ); -static void yyensure_buffer_stack (void ); -static void yy_load_buffer_state (void ); -static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file ); +static void yyensure_buffer_stack ( void ); +static void yy_load_buffer_state ( void ); +static void yy_init_buffer ( YY_BUFFER_STATE b, FILE *file ); +#define YY_FLUSH_BUFFER yy_flush_buffer( YY_CURRENT_BUFFER ) -#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER ) +YY_BUFFER_STATE yy_scan_buffer ( char *base, yy_size_t size ); +YY_BUFFER_STATE yy_scan_string ( const char *yy_str ); +YY_BUFFER_STATE yy_scan_bytes ( const char *bytes, int len ); -YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size ); -YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str ); -YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,int len ); - -void *yyalloc (yy_size_t ); -void *yyrealloc (void *,yy_size_t ); -void yyfree (void * ); +void *yyalloc ( yy_size_t ); +void *yyrealloc ( void *, yy_size_t ); +void yyfree ( void * ); #define yy_new_buffer yy_create_buffer - #define yy_set_interactive(is_interactive) \ { \ if ( ! YY_CURRENT_BUFFER ){ \ yyensure_buffer_stack (); \ YY_CURRENT_BUFFER_LVALUE = \ - yy_create_buffer(yyin,YY_BUF_SIZE ); \ + yy_create_buffer( yyin, YY_BUF_SIZE ); \ } \ YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ } - #define yy_set_bol(at_bol) \ { \ if ( ! YY_CURRENT_BUFFER ){\ yyensure_buffer_stack (); \ YY_CURRENT_BUFFER_LVALUE = \ - yy_create_buffer(yyin,YY_BUF_SIZE ); \ + yy_create_buffer( yyin, YY_BUF_SIZE ); \ } \ YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ } - #define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) /* Begin user sect3 */ - -typedef unsigned char YY_CHAR; +typedef flex_uint8_t YY_CHAR; FILE *yyin = NULL, *yyout = NULL; typedef int yy_state_type; extern int yylineno; - int yylineno = 1; extern char *yytext; @@ -343,10 +335,10 @@ #endif #define yytext_ptr yytext -static yy_state_type yy_get_previous_state (void ); -static yy_state_type yy_try_NUL_trans (yy_state_type current_state ); -static int yy_get_next_buffer (void ); -static void yynoreturn yy_fatal_error (yyconst char* msg ); +static yy_state_type yy_get_previous_state ( void ); +static yy_state_type yy_try_NUL_trans ( yy_state_type current_state ); +static int yy_get_next_buffer ( void ); +static void yynoreturn yy_fatal_error ( const char* msg ); /* Done after the current pattern has been matched and before the * corresponding action - sets up yytext. @@ -357,9 +349,8 @@ (yy_hold_char) = *yy_cp; \ *yy_cp = '\0'; \ (yy_c_buf_p) = yy_cp; - -#define YY_NUM_RULES 38 -#define YY_END_OF_BUFFER 39 +#define YY_NUM_RULES 39 +#define YY_END_OF_BUFFER 40 /* This struct is not used in this scanner, but its presence is necessary. */ struct yy_trans_info @@ -367,28 +358,29 @@ flex_int32_t yy_verify; flex_int32_t yy_nxt; }; -static yyconst flex_int16_t yy_accept[160] = +static const flex_int16_t yy_accept[162] = { 0, - 0, 0, 39, 37, 1, 3, 37, 37, 37, 32, - 32, 30, 33, 37, 33, 33, 33, 37, 37, 37, - 37, 37, 37, 37, 37, 37, 37, 37, 1, 3, - 37, 0, 37, 37, 0, 2, 32, 33, 37, 37, - 37, 37, 33, 37, 37, 37, 37, 37, 37, 37, - 24, 37, 37, 37, 37, 7, 37, 37, 37, 37, - 37, 37, 37, 36, 36, 37, 0, 31, 37, 37, - 16, 37, 37, 23, 28, 37, 37, 13, 37, 37, - 22, 37, 37, 8, 10, 12, 37, 37, 20, 37, - 21, 37, 0, 34, 4, 37, 37, 37, 37, 37, + 0, 0, 40, 38, 1, 3, 38, 38, 38, 33, + 33, 31, 34, 38, 34, 34, 34, 34, 38, 38, + 38, 38, 38, 38, 38, 38, 38, 38, 38, 1, + 3, 38, 0, 38, 38, 0, 2, 33, 34, 38, + 38, 7, 38, 38, 34, 38, 38, 38, 38, 38, + 38, 38, 25, 38, 38, 38, 38, 8, 38, 38, + 38, 38, 38, 38, 38, 37, 37, 38, 0, 32, + 38, 38, 17, 38, 38, 24, 29, 38, 38, 14, + 38, 38, 23, 38, 38, 9, 11, 13, 38, 38, + 21, 38, 22, 38, 0, 35, 4, 38, 38, 38, - 37, 37, 37, 19, 37, 37, 37, 35, 35, 37, - 37, 37, 37, 37, 37, 37, 14, 37, 37, 37, - 37, 5, 17, 37, 9, 37, 11, 37, 37, 37, - 37, 18, 26, 37, 37, 37, 37, 37, 37, 6, - 37, 37, 37, 37, 37, 37, 37, 25, 37, 37, - 15, 37, 27, 37, 37, 37, 37, 29, 0 + 38, 38, 38, 38, 38, 20, 38, 38, 38, 36, + 36, 38, 38, 38, 38, 38, 38, 38, 15, 38, + 38, 38, 38, 5, 18, 38, 10, 38, 12, 38, + 38, 38, 38, 19, 27, 38, 38, 38, 38, 38, + 38, 6, 38, 38, 38, 38, 38, 38, 38, 26, + 38, 38, 16, 38, 28, 38, 38, 38, 38, 30, + 0 } ; -static yyconst YY_CHAR yy_ec[256] = +static const YY_CHAR yy_ec[256] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, 1, 1, 4, 1, 1, 1, 1, 1, 1, 1, @@ -420,7 +412,7 @@ 1, 1, 1, 1, 1 } ; -static yyconst YY_CHAR yy_meta[39] = +static const YY_CHAR yy_meta[39] = { 0, 1, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, @@ -428,114 +420,114 @@ 1, 1, 1, 1, 1, 1, 1, 1 } ; -static yyconst flex_uint16_t yy_base[167] = +static const flex_int16_t yy_base[169] = { 0, - 0, 0, 227, 0, 224, 228, 222, 37, 41, 38, - 187, 0, 44, 209, 54, 78, 60, 201, 196, 45, - 203, 192, 42, 47, 197, 62, 184, 0, 214, 228, - 77, 210, 88, 69, 211, 228, 0, 87, 104, 198, - 187, 176, 93, 183, 178, 188, 179, 186, 186, 180, - 186, 171, 171, 175, 177, 0, 173, 167, 173, 177, - 169, 175, 174, 0, 228, 101, 186, 0, 179, 159, - 172, 162, 169, 0, 0, 164, 164, 0, 162, 152, - 0, 156, 151, 0, 0, 0, 154, 153, 0, 144, - 0, 171, 170, 0, 0, 155, 154, 147, 139, 149, + 0, 0, 231, 0, 228, 232, 226, 37, 41, 38, + 191, 0, 44, 213, 54, 58, 82, 64, 205, 200, + 65, 207, 196, 26, 49, 201, 48, 188, 0, 218, + 232, 93, 214, 97, 67, 215, 232, 0, 72, 108, + 202, 0, 191, 180, 77, 187, 182, 192, 183, 190, + 190, 184, 190, 175, 175, 179, 181, 0, 177, 171, + 177, 181, 173, 179, 178, 0, 232, 102, 190, 0, + 183, 163, 176, 166, 173, 0, 0, 168, 168, 0, + 166, 156, 0, 160, 155, 0, 0, 0, 158, 157, + 0, 148, 0, 175, 174, 0, 0, 159, 158, 151, - 137, 143, 148, 0, 133, 136, 126, 0, 228, 137, - 141, 133, 135, 131, 133, 138, 0, 122, 122, 121, - 118, 0, 0, 133, 0, 117, 134, 128, 132, 113, - 113, 0, 0, 120, 112, 110, 121, 94, 95, 0, - 94, 92, 97, 86, 85, 84, 76, 0, 71, 78, - 0, 67, 0, 61, 55, 32, 29, 0, 228, 40, - 129, 131, 133, 135, 137, 139 + 143, 153, 141, 147, 152, 0, 137, 140, 130, 0, + 232, 141, 145, 137, 139, 135, 137, 142, 0, 126, + 126, 125, 122, 0, 0, 137, 0, 121, 138, 132, + 136, 117, 117, 0, 0, 124, 116, 114, 125, 111, + 112, 0, 117, 97, 102, 91, 92, 93, 80, 0, + 76, 89, 0, 92, 0, 86, 80, 43, 45, 0, + 232, 40, 130, 132, 134, 136, 138, 140 } ; -static yyconst flex_int16_t yy_def[167] = +static const flex_int16_t yy_def[169] = { 0, - 159, 1, 159, 160, 159, 159, 160, 161, 162, 160, - 10, 160, 10, 160, 10, 10, 10, 160, 160, 160, - 160, 160, 160, 160, 160, 160, 160, 160, 159, 159, - 161, 163, 164, 162, 165, 159, 10, 10, 10, 160, - 160, 160, 10, 160, 160, 160, 160, 160, 160, 160, - 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, - 160, 160, 160, 160, 159, 164, 166, 39, 160, 160, - 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, - 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, - 160, 160, 159, 160, 160, 160, 160, 160, 160, 160, + 161, 1, 161, 162, 161, 161, 162, 163, 164, 162, + 10, 162, 10, 162, 10, 10, 10, 10, 162, 162, + 162, 162, 162, 162, 162, 162, 162, 162, 162, 161, + 161, 163, 165, 166, 164, 167, 161, 10, 10, 10, + 162, 162, 162, 162, 10, 162, 162, 162, 162, 162, + 162, 162, 162, 162, 162, 162, 162, 162, 162, 162, + 162, 162, 162, 162, 162, 162, 161, 166, 168, 40, + 162, 162, 162, 162, 162, 162, 162, 162, 162, 162, + 162, 162, 162, 162, 162, 162, 162, 162, 162, 162, + 162, 162, 162, 162, 161, 162, 162, 162, 162, 162, - 160, 160, 160, 160, 160, 160, 160, 160, 159, 160, - 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, - 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, - 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, - 160, 160, 160, 160, 160, 160, 160, 160, 160, 160, - 160, 160, 160, 160, 160, 160, 160, 160, 0, 159, - 159, 159, 159, 159, 159, 159 + 162, 162, 162, 162, 162, 162, 162, 162, 162, 162, + 161, 162, 162, 162, 162, 162, 162, 162, 162, 162, + 162, 162, 162, 162, 162, 162, 162, 162, 162, 162, + 162, 162, 162, 162, 162, 162, 162, 162, 162, 162, + 162, 162, 162, 162, 162, 162, 162, 162, 162, 162, + 162, 162, 162, 162, 162, 162, 162, 162, 162, 162, + 0, 161, 161, 161, 161, 161, 161, 161 } ; -static yyconst flex_uint16_t yy_nxt[267] = +static const flex_int16_t yy_nxt[271] = { 0, 4, 5, 6, 7, 8, 9, 10, 11, 10, 12, - 13, 13, 14, 4, 4, 4, 13, 13, 15, 16, - 17, 13, 18, 19, 20, 21, 22, 4, 23, 24, - 4, 25, 26, 4, 27, 4, 4, 4, 32, 32, - 28, 33, 35, 36, 37, 37, 37, 158, 38, 38, - 38, 38, 38, 49, 38, 38, 38, 38, 38, 38, - 38, 38, 38, 55, 157, 57, 38, 38, 38, 56, - 35, 36, 50, 51, 58, 156, 52, 41, 32, 32, - 155, 64, 154, 42, 38, 38, 38, 46, 60, 67, - 67, 61, 28, 38, 38, 38, 62, 153, 43, 38, + 13, 13, 14, 4, 4, 4, 15, 13, 16, 17, + 18, 13, 19, 20, 21, 22, 23, 4, 24, 25, + 4, 26, 27, 4, 28, 4, 4, 4, 33, 33, + 29, 34, 36, 37, 38, 38, 38, 57, 39, 39, + 39, 39, 39, 58, 39, 39, 39, 39, 39, 39, + 39, 39, 39, 160, 39, 39, 39, 59, 36, 37, + 39, 39, 39, 51, 62, 159, 60, 63, 39, 39, + 39, 43, 64, 39, 39, 39, 42, 44, 39, 39, + 39, 48, 52, 53, 33, 33, 54, 66, 69, 69, - 38, 38, 67, 67, 152, 92, 44, 151, 150, 45, - 68, 68, 68, 149, 68, 68, 148, 147, 146, 145, - 68, 68, 68, 68, 68, 68, 144, 143, 72, 31, - 31, 34, 34, 32, 32, 66, 66, 35, 35, 67, - 67, 142, 141, 140, 139, 138, 137, 136, 135, 134, - 133, 132, 131, 130, 129, 128, 127, 126, 125, 124, - 123, 122, 121, 120, 119, 118, 117, 116, 115, 114, - 113, 112, 111, 110, 109, 108, 107, 106, 105, 104, - 103, 102, 101, 100, 99, 98, 97, 96, 95, 94, - 93, 91, 90, 89, 88, 87, 86, 85, 84, 83, + 158, 29, 45, 69, 69, 157, 94, 156, 155, 154, + 46, 153, 74, 47, 70, 70, 70, 152, 70, 70, + 151, 150, 149, 148, 70, 70, 70, 70, 70, 70, + 32, 32, 35, 35, 33, 33, 68, 68, 36, 36, + 69, 69, 147, 146, 145, 144, 143, 142, 141, 140, + 139, 138, 137, 136, 135, 134, 133, 132, 131, 130, + 129, 128, 127, 126, 125, 124, 123, 122, 121, 120, + 119, 118, 117, 116, 115, 114, 113, 112, 111, 110, + 109, 108, 107, 106, 105, 104, 103, 102, 101, 100, + 99, 98, 97, 96, 95, 93, 92, 91, 90, 89, - 82, 81, 80, 79, 78, 77, 76, 75, 74, 73, - 71, 70, 69, 36, 65, 29, 63, 59, 54, 53, - 48, 47, 40, 39, 30, 29, 159, 3, 159, 159, - 159, 159, 159, 159, 159, 159, 159, 159, 159, 159, - 159, 159, 159, 159, 159, 159, 159, 159, 159, 159, - 159, 159, 159, 159, 159, 159, 159, 159, 159, 159, - 159, 159, 159, 159, 159, 159 + 88, 87, 86, 85, 84, 83, 82, 81, 80, 79, + 78, 77, 76, 75, 73, 72, 71, 37, 67, 30, + 65, 61, 56, 55, 50, 49, 41, 40, 31, 30, + 161, 3, 161, 161, 161, 161, 161, 161, 161, 161, + 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, + 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, + 161, 161, 161, 161, 161, 161, 161, 161, 161, 161 } ; -static yyconst flex_int16_t yy_chk[267] = +static const flex_int16_t yy_chk[271] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 8, 8, - 160, 8, 9, 9, 10, 10, 10, 157, 10, 10, - 13, 13, 13, 20, 10, 10, 10, 10, 10, 10, - 15, 15, 15, 23, 156, 24, 17, 17, 17, 23, - 34, 34, 20, 20, 24, 155, 20, 15, 31, 31, - 154, 31, 152, 15, 16, 16, 16, 17, 26, 33, - 33, 26, 33, 38, 38, 38, 26, 150, 16, 43, + 162, 8, 9, 9, 10, 10, 10, 24, 10, 10, + 13, 13, 13, 24, 10, 10, 10, 10, 10, 10, + 15, 15, 15, 159, 16, 16, 16, 25, 35, 35, + 18, 18, 18, 21, 27, 158, 25, 27, 39, 39, + 39, 16, 27, 45, 45, 45, 15, 16, 17, 17, + 17, 18, 21, 21, 32, 32, 21, 32, 34, 34, - 43, 43, 66, 66, 149, 66, 16, 147, 146, 16, - 39, 39, 39, 145, 39, 39, 144, 143, 142, 141, - 39, 39, 39, 39, 39, 39, 139, 138, 43, 161, - 161, 162, 162, 163, 163, 164, 164, 165, 165, 166, - 166, 137, 136, 135, 134, 131, 130, 129, 128, 127, - 126, 124, 121, 120, 119, 118, 116, 115, 114, 113, - 112, 111, 110, 107, 106, 105, 103, 102, 101, 100, - 99, 98, 97, 96, 93, 92, 90, 88, 87, 83, - 82, 80, 79, 77, 76, 73, 72, 71, 70, 69, - 67, 63, 62, 61, 60, 59, 58, 57, 55, 54, + 157, 34, 17, 68, 68, 156, 68, 154, 152, 151, + 17, 149, 45, 17, 40, 40, 40, 148, 40, 40, + 147, 146, 145, 144, 40, 40, 40, 40, 40, 40, + 163, 163, 164, 164, 165, 165, 166, 166, 167, 167, + 168, 168, 143, 141, 140, 139, 138, 137, 136, 133, + 132, 131, 130, 129, 128, 126, 123, 122, 121, 120, + 118, 117, 116, 115, 114, 113, 112, 109, 108, 107, + 105, 104, 103, 102, 101, 100, 99, 98, 95, 94, + 92, 90, 89, 85, 84, 82, 81, 79, 78, 75, + 74, 73, 72, 71, 69, 65, 64, 63, 62, 61, - 53, 52, 51, 50, 49, 48, 47, 46, 45, 44, - 42, 41, 40, 35, 32, 29, 27, 25, 22, 21, - 19, 18, 14, 11, 7, 5, 3, 159, 159, 159, - 159, 159, 159, 159, 159, 159, 159, 159, 159, 159, - 159, 159, 159, 159, 159, 159, 159, 159, 159, 159, - 159, 159, 159, 159, 159, 159, 159, 159, 159, 159, - 159, 159, 159, 159, 159, 159 + 60, 59, 57, 56, 55, 54, 53, 52, 51, 50, + 49, 48, 47, 46, 44, 43, 41, 36, 33, 30, + 28, 26, 23, 22, 20, 19, 14, 11, 7, 5, + 3, 161, 161, 161, 161, 161, 161, 161, 161, 161, + 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, + 161, 161, 161, 161, 161, 161, 161, 161, 161, 161, + 161, 161, 161, 161, 161, 161, 161, 161, 161, 161 } ; static yy_state_type yy_last_accepting_state; @@ -586,36 +578,36 @@ #define YY_EXTRA_TYPE void * #endif -static int yy_init_globals (void ); +static int yy_init_globals ( void ); /* Accessor methods to globals. These are made visible to non-reentrant scanners for convenience. */ -int yylex_destroy (void ); +int yylex_destroy ( void ); -int yyget_debug (void ); +int yyget_debug ( void ); -void yyset_debug (int debug_flag ); +void yyset_debug ( int debug_flag ); -YY_EXTRA_TYPE yyget_extra (void ); +YY_EXTRA_TYPE yyget_extra ( void ); -void yyset_extra (YY_EXTRA_TYPE user_defined ); +void yyset_extra ( YY_EXTRA_TYPE user_defined ); -FILE *yyget_in (void ); +FILE *yyget_in ( void ); -void yyset_in (FILE * _in_str ); +void yyset_in ( FILE * _in_str ); -FILE *yyget_out (void ); +FILE *yyget_out ( void ); -void yyset_out (FILE * _out_str ); +void yyset_out ( FILE * _out_str ); - int yyget_leng (void ); + int yyget_leng ( void ); -char *yyget_text (void ); +char *yyget_text ( void ); -int yyget_lineno (void ); +int yyget_lineno ( void ); -void yyset_lineno (int _line_number ); +void yyset_lineno ( int _line_number ); /* Macros after this point can all be overridden by user definitions in * section 1. @@ -623,32 +615,31 @@ #ifndef YY_SKIP_YYWRAP #ifdef __cplusplus -extern "C" int yywrap (void ); +extern "C" int yywrap ( void ); #else -extern int yywrap (void ); +extern int yywrap ( void ); #endif #endif #ifndef YY_NO_UNPUT - static void yyunput (int c,char *buf_ptr ); + static void yyunput ( int c, char *buf_ptr ); #endif #ifndef yytext_ptr -static void yy_flex_strncpy (char *,yyconst char *,int ); +static void yy_flex_strncpy ( char *, const char *, int ); #endif #ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * ); +static int yy_flex_strlen ( const char * ); #endif #ifndef YY_NO_INPUT - #ifdef __cplusplus -static int yyinput (void ); +static int yyinput ( void ); #else -static int input (void ); +static int input ( void ); #endif #endif @@ -781,10 +772,10 @@ if ( ! YY_CURRENT_BUFFER ) { yyensure_buffer_stack (); YY_CURRENT_BUFFER_LVALUE = - yy_create_buffer(yyin,YY_BUF_SIZE ); + yy_create_buffer( yyin, YY_BUF_SIZE ); } - yy_load_buffer_state( ); + yy_load_buffer_state( ); } { @@ -814,13 +805,13 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 160 ) - yy_c = yy_meta[(unsigned int) yy_c]; + if ( yy_current_state >= 162 ) + yy_c = yy_meta[yy_c]; } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c]; + yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; ++yy_cp; } - while ( yy_base[yy_current_state] != 228 ); + while ( yy_base[yy_current_state] != 232 ); yy_find_action: yy_act = yy_accept[yy_current_state]; @@ -872,103 +863,103 @@ YY_BREAK case 7: YY_RULE_SETUP -{yylval.number=1; return(BOOL);} +{return(MNEMONIC);} YY_BREAK case 8: YY_RULE_SETUP -{yylval.number=0; return(BOOL);} +{yylval.number=1; return(BOOL);} YY_BREAK case 9: YY_RULE_SETUP -{yylval.number=3; return(HIDDEN);} +{yylval.number=0; return(BOOL);} YY_BREAK case 10: YY_RULE_SETUP -{yylval.number=PCI; return(BUS);} +{yylval.number=3; return(HIDDEN);} YY_BREAK case 11: YY_RULE_SETUP -{yylval.number=IOAPIC; return(BUS);} +{yylval.number=PCI; return(BUS);} YY_BREAK case 12: YY_RULE_SETUP -{yylval.number=PNP; return(BUS);} +{yylval.number=IOAPIC; return(BUS);} YY_BREAK case 13: YY_RULE_SETUP -{yylval.number=I2C; return(BUS);} +{yylval.number=PNP; return(BUS);} YY_BREAK case 14: YY_RULE_SETUP -{yylval.number=APIC; return(BUS);} +{yylval.number=I2C; return(BUS);} YY_BREAK case 15: YY_RULE_SETUP -{yylval.number=CPU_CLUSTER; return(BUS);} +{yylval.number=APIC; return(BUS);} YY_BREAK case 16: YY_RULE_SETUP -{yylval.number=CPU; return(BUS);} +{yylval.number=CPU_CLUSTER; return(BUS);} YY_BREAK case 17: YY_RULE_SETUP -{yylval.number=DOMAIN; return(BUS);} +{yylval.number=CPU; return(BUS);} YY_BREAK case 18: YY_RULE_SETUP -{yylval.number=GENERIC; return(BUS);} +{yylval.number=DOMAIN; return(BUS);} YY_BREAK case 19: YY_RULE_SETUP -{yylval.number=MMIO; return(BUS);} +{yylval.number=GENERIC; return(BUS);} YY_BREAK case 20: YY_RULE_SETUP -{yylval.number=SPI; return(BUS);} +{yylval.number=MMIO; return(BUS);} YY_BREAK case 21: YY_RULE_SETUP -{yylval.number=USB; return(BUS);} +{yylval.number=SPI; return(BUS);} YY_BREAK case 22: YY_RULE_SETUP -{yylval.number=IRQ; return(RESOURCE);} +{yylval.number=USB; return(BUS);} YY_BREAK case 23: YY_RULE_SETUP -{yylval.number=DRQ; return(RESOURCE);} +{yylval.number=IRQ; return(RESOURCE);} YY_BREAK case 24: YY_RULE_SETUP -{yylval.number=IO; return(RESOURCE);} +{yylval.number=DRQ; return(RESOURCE);} YY_BREAK case 25: YY_RULE_SETUP -{return(IOAPIC_IRQ);} +{yylval.number=IO; return(RESOURCE);} YY_BREAK case 26: YY_RULE_SETUP -{return(INHERIT);} +{return(IOAPIC_IRQ);} YY_BREAK case 27: YY_RULE_SETUP -{return(SUBSYSTEMID);} +{return(INHERIT);} YY_BREAK case 28: YY_RULE_SETUP -{return(END);} +{return(SUBSYSTEMID);} YY_BREAK case 29: YY_RULE_SETUP -{return(SLOT_DESC);} +{return(END);} YY_BREAK case 30: YY_RULE_SETUP -{return(EQUALS);} +{return(SLOT_DESC);} YY_BREAK case 31: YY_RULE_SETUP -{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} +{return(EQUALS);} YY_BREAK case 32: YY_RULE_SETUP @@ -980,12 +971,11 @@ YY_BREAK case 34: YY_RULE_SETUP -{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(PCIINT);} +{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} YY_BREAK case 35: -/* rule 35 can match eol */ YY_RULE_SETUP -{yylval.string = malloc(yyleng-1); strncpy(yylval.string, yytext+1, yyleng-2); yylval.string[yyleng-2]='\0'; return(STRING);} +{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(PCIINT);} YY_BREAK case 36: /* rule 36 can match eol */ @@ -993,10 +983,15 @@ {yylval.string = malloc(yyleng-1); strncpy(yylval.string, yytext+1, yyleng-2); yylval.string[yyleng-2]='\0'; return(STRING);} YY_BREAK case 37: +/* rule 37 can match eol */ +YY_RULE_SETUP +{yylval.string = malloc(yyleng-1); strncpy(yylval.string, yytext+1, yyleng-2); yylval.string[yyleng-2]='\0'; return(STRING);} + YY_BREAK +case 38: YY_RULE_SETUP {yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(STRING);} YY_BREAK -case 38: +case 39: YY_RULE_SETUP ECHO; YY_BREAK @@ -1077,7 +1072,7 @@ { (yy_did_buffer_switch_on_eof) = 0; - if ( yywrap( ) ) + if ( yywrap( ) ) { /* Note: because we've taken care in * yy_get_next_buffer() to have set up @@ -1144,7 +1139,7 @@ { char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; char *source = (yytext_ptr); - yy_size_t number_to_move, i; + int number_to_move, i; int ret_val; if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] ) @@ -1173,7 +1168,7 @@ /* Try to read more data. */ /* First move last chars to start of buffer. */ - number_to_move = (yy_size_t) ((yy_c_buf_p) - (yytext_ptr)) - 1; + number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr) - 1); for ( i = 0; i < number_to_move; ++i ) *(dest++) = *(source++); @@ -1209,7 +1204,8 @@ b->yy_ch_buf = (char *) /* Include room in for 2 EOB chars. */ - yyrealloc((void *) b->yy_ch_buf,(yy_size_t) (b->yy_buf_size + 2) ); + yyrealloc( (void *) b->yy_ch_buf, + (yy_size_t) (b->yy_buf_size + 2) ); } else /* Can't grow it, we don't own it. */ @@ -1241,7 +1237,7 @@ if ( number_to_move == YY_MORE_ADJ ) { ret_val = EOB_ACT_END_OF_FILE; - yyrestart(yyin ); + yyrestart( yyin ); } else @@ -1255,12 +1251,15 @@ else ret_val = EOB_ACT_CONTINUE_SCAN; - if ((int) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { + if (((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { /* Extend the array by 50%, plus the number we really need. */ int new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1); - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,(yy_size_t) new_size ); + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc( + (void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf, (yy_size_t) new_size ); if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); + /* "- 2" to take care of EOB's */ + YY_CURRENT_BUFFER_LVALUE->yy_buf_size = (int) (new_size - 2); } (yy_n_chars) += number_to_move; @@ -1292,10 +1291,10 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 160 ) - yy_c = yy_meta[(unsigned int) yy_c]; + if ( yy_current_state >= 162 ) + yy_c = yy_meta[yy_c]; } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c]; + yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; } return yy_current_state; @@ -1320,11 +1319,11 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 160 ) - yy_c = yy_meta[(unsigned int) yy_c]; + if ( yy_current_state >= 162 ) + yy_c = yy_meta[yy_c]; } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c]; - yy_is_jam = (yy_current_state == 159); + yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; + yy_is_jam = (yy_current_state == 161); return yy_is_jam ? 0 : yy_current_state; } @@ -1394,7 +1393,7 @@ else { /* need more input */ - int offset = (yy_c_buf_p) - (yytext_ptr); + int offset = (int) ((yy_c_buf_p) - (yytext_ptr)); ++(yy_c_buf_p); switch ( yy_get_next_buffer( ) ) @@ -1411,13 +1410,13 @@ */ /* Reset buffer status. */ - yyrestart(yyin ); + yyrestart( yyin ); /*FALLTHROUGH*/ case EOB_ACT_END_OF_FILE: { - if ( yywrap( ) ) + if ( yywrap( ) ) return 0; if ( ! (yy_did_buffer_switch_on_eof) ) @@ -1455,11 +1454,11 @@ if ( ! YY_CURRENT_BUFFER ){ yyensure_buffer_stack (); YY_CURRENT_BUFFER_LVALUE = - yy_create_buffer(yyin,YY_BUF_SIZE ); + yy_create_buffer( yyin, YY_BUF_SIZE ); } - yy_init_buffer(YY_CURRENT_BUFFER,input_file ); - yy_load_buffer_state( ); + yy_init_buffer( YY_CURRENT_BUFFER, input_file ); + yy_load_buffer_state( ); } /** Switch to a different input buffer. @@ -1487,7 +1486,7 @@ } YY_CURRENT_BUFFER_LVALUE = new_buffer; - yy_load_buffer_state( ); + yy_load_buffer_state( ); /* We don't actually know whether we did this switch during * EOF (yywrap()) processing, but the only time this flag @@ -1515,7 +1514,7 @@ { YY_BUFFER_STATE b; - b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); + b = (YY_BUFFER_STATE) yyalloc( sizeof( struct yy_buffer_state ) ); if ( ! b ) YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); @@ -1524,13 +1523,13 @@ /* yy_ch_buf has to be 2 characters longer than the size given because * we need to put in 2 end-of-buffer characters. */ - b->yy_ch_buf = (char *) yyalloc((yy_size_t) (b->yy_buf_size + 2) ); + b->yy_ch_buf = (char *) yyalloc( (yy_size_t) (b->yy_buf_size + 2) ); if ( ! b->yy_ch_buf ) YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); b->yy_is_our_buffer = 1; - yy_init_buffer(b,file ); + yy_init_buffer( b, file ); return b; } @@ -1549,9 +1548,9 @@ YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0; if ( b->yy_is_our_buffer ) - yyfree((void *) b->yy_ch_buf ); + yyfree( (void *) b->yy_ch_buf ); - yyfree((void *) b ); + yyfree( (void *) b ); } /* Initializes or reinitializes a buffer. @@ -1563,7 +1562,7 @@ { int oerrno = errno; - yy_flush_buffer(b ); + yy_flush_buffer( b ); b->yy_input_file = file; b->yy_fill_buffer = 1; @@ -1606,7 +1605,7 @@ b->yy_buffer_status = YY_BUFFER_NEW; if ( b == YY_CURRENT_BUFFER ) - yy_load_buffer_state( ); + yy_load_buffer_state( ); } /** Pushes the new state onto the stack. The new state becomes @@ -1637,7 +1636,7 @@ YY_CURRENT_BUFFER_LVALUE = new_buffer; /* copied from yy_switch_to_buffer. */ - yy_load_buffer_state( ); + yy_load_buffer_state( ); (yy_did_buffer_switch_on_eof) = 1; } @@ -1656,7 +1655,7 @@ --(yy_buffer_stack_top); if (YY_CURRENT_BUFFER) { - yy_load_buffer_state( ); + yy_load_buffer_state( ); (yy_did_buffer_switch_on_eof) = 1; } } @@ -1666,7 +1665,7 @@ */ static void yyensure_buffer_stack (void) { - int num_to_alloc; + yy_size_t num_to_alloc; if (!(yy_buffer_stack)) { @@ -1723,7 +1722,7 @@ /* They forgot to leave room for the EOB's. */ return NULL; - b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); + b = (YY_BUFFER_STATE) yyalloc( sizeof( struct yy_buffer_state ) ); if ( ! b ) YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" ); @@ -1737,7 +1736,7 @@ b->yy_fill_buffer = 0; b->yy_buffer_status = YY_BUFFER_NEW; - yy_switch_to_buffer(b ); + yy_switch_to_buffer( b ); return b; } @@ -1750,10 +1749,10 @@ * @note If you want to scan bytes that may contain NUL values, then use * yy_scan_bytes() instead. */ -YY_BUFFER_STATE yy_scan_string (yyconst char * yystr ) +YY_BUFFER_STATE yy_scan_string (const char * yystr ) { - return yy_scan_bytes(yystr,(int) strlen(yystr) ); + return yy_scan_bytes( yystr, (int) strlen(yystr) ); } /** Setup the input buffer state to scan the given bytes. The next call to yylex() will @@ -1763,7 +1762,7 @@ * * @return the newly allocated buffer state object. */ -YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, int _yybytes_len ) +YY_BUFFER_STATE yy_scan_bytes (const char * yybytes, int _yybytes_len ) { YY_BUFFER_STATE b; char *buf; @@ -1772,7 +1771,7 @@ /* Get memory for full buffer, including space for trailing EOB's. */ n = (yy_size_t) (_yybytes_len + 2); - buf = (char *) yyalloc(n ); + buf = (char *) yyalloc( n ); if ( ! buf ) YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" ); @@ -1781,7 +1780,7 @@ buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR; - b = yy_scan_buffer(buf,n ); + b = yy_scan_buffer( buf, n ); if ( ! b ) YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" ); @@ -1797,9 +1796,9 @@ #define YY_EXIT_FAILURE 2 #endif -static void yynoreturn yy_fatal_error (yyconst char* msg ) +static void yynoreturn yy_fatal_error (const char* msg ) { - (void) fprintf( stderr, "%s\n", msg ); + fprintf( stderr, "%s\n", msg ); exit( YY_EXIT_FAILURE ); } @@ -1810,7 +1809,7 @@ do \ { \ /* Undo effects of setting up yytext. */ \ - yy_size_t yyless_macro_arg = (n); \ + int yyless_macro_arg = (n); \ YY_LESS_LINENO(yyless_macro_arg);\ yytext[yyleng] = (yy_hold_char); \ (yy_c_buf_p) = yytext + yyless_macro_arg; \ @@ -1934,7 +1933,7 @@ /* Pop the buffer stack, destroying each element. */ while(YY_CURRENT_BUFFER){ - yy_delete_buffer(YY_CURRENT_BUFFER ); + yy_delete_buffer( YY_CURRENT_BUFFER ); YY_CURRENT_BUFFER_LVALUE = NULL; yypop_buffer_state(); } @@ -1955,7 +1954,7 @@ */ #ifndef yytext_ptr -static void yy_flex_strncpy (char* s1, yyconst char * s2, int n ) +static void yy_flex_strncpy (char* s1, const char * s2, int n ) { int i; @@ -1965,7 +1964,7 @@ #endif #ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * s ) +static int yy_flex_strlen (const char * s ) { int n; for ( n = 0; s[n]; ++n ) diff --git a/util/sconfig/main.c b/util/sconfig/main.c index 6b421ec..4d15c8f 100644 --- a/util/sconfig/main.c +++ b/util/sconfig/main.c @@ -483,9 +483,9 @@ struct device *new_device(struct bus *parent, struct chip_instance *chip_instance, const int bustype, const char *devnum, - int status) + const char *const mnemonic, int status) { - char *tmp; + char *tmp, *name; int path_a; int path_b = 0; struct device *new_d; @@ -510,8 +510,14 @@ new_d->path_a = path_a; new_d->path_b = path_b; - char *name = S_ALLOC(10); - sprintf(name, "_dev%d", new_d->id); + if (mnemonic) { + name = S_ALLOC(strlen("__static_") + strlen(mnemonic) + 1); + sprintf(name, "__static_%s", mnemonic); + new_d->has_mnemonic = 1; + } else { + name = S_ALLOC(10); + sprintf(name, "_dev%d", new_d->id); + } new_d->name = name; new_d->enabled = status & 0x01; @@ -696,7 +702,7 @@ return 0; } -static void pass0(FILE *fil, struct device *ptr, struct device *next) +static void pass0(FILE *fil, FILE *head, struct device *ptr, struct device *next) { if (ptr == &base_root_dev) { fprintf(fil, "STORAGE struct bus %s_links[];\n", @@ -704,7 +710,8 @@ return; } - fprintf(fil, "STORAGE struct device %s;\n", ptr->name); + if (!ptr->has_mnemonic) + fprintf(fil, "STORAGE struct device %s;\n", ptr->name); if (ptr->res) fprintf(fil, "STORAGE struct resource %s_res[];\n", ptr->name); @@ -781,13 +788,13 @@ fprintf(fil, "\t};\n"); } -static void pass1(FILE *fil, struct device *ptr, struct device *next) +static void pass1(FILE *fil, FILE *head, struct device *ptr, struct device *next) { int pin; struct chip_instance *chip_ins = ptr->chip_instance; int has_children = dev_has_children(ptr); - if (ptr == &base_root_dev) + if (ptr == &base_root_dev || ptr->has_mnemonic) fprintf(fil, "DEVTREE_CONST struct device %s = {\n", ptr->name); else fprintf(fil, "STORAGE struct device %s = {\n", ptr->name); @@ -883,16 +890,25 @@ emit_dev_links(fil, ptr); } -static void expose_device_names(FILE *fil, struct device *ptr, struct device *next) +static void expose_device_names(FILE *fil, FILE *head, struct device *ptr, struct device *next) { /* Only devices on root bus here. */ - if (ptr->bustype == PCI && ptr->parent->dev->bustype == DOMAIN) + if (ptr->bustype == PCI && ptr->parent->dev->bustype == DOMAIN) { + fprintf(head, "extern DEVTREE_CONST struct device *DEVTREE_CONST __pci_0_%02x_%d;\n", + ptr->path_a, ptr->path_b); fprintf(fil, "DEVTREE_CONST struct device *DEVTREE_CONST __pci_0_%02x_%d = &%s;\n", ptr->path_a, ptr->path_b, ptr->name); + } - if (ptr->bustype == PNP) + if (ptr->bustype == PNP) { + fprintf(head, "extern DEVTREE_CONST struct device *DEVTREE_CONST __pnp_%04x_%02x;\n", + ptr->path_a, ptr->path_b); fprintf(fil, "DEVTREE_CONST struct device *DEVTREE_CONST __pnp_%04x_%02x = &%s;\n", ptr->path_a, ptr->path_b, ptr->name); + } + + if (ptr->has_mnemonic) + fprintf(head, "extern DEVTREE_CONST struct device %s;\n", ptr->name); } static void add_siblings_to_queue(struct queue_entry **bfs_q_head, @@ -916,8 +932,8 @@ } } -static void walk_device_tree(FILE *fil, struct device *ptr, - void (*func)(FILE *, struct device *, +static void walk_device_tree(FILE *fil, FILE *head, struct device *ptr, + void (*func)(FILE *, FILE *, struct device *, struct device *)) { struct queue_entry *bfs_q_head = NULL; @@ -926,7 +942,7 @@ while ((ptr = dequeue_head(&bfs_q_head))) { add_children_to_queue(&bfs_q_head, ptr); - func(fil, ptr, peek_queue_head(bfs_q_head)); + func(fil, head, ptr, peek_queue_head(bfs_q_head)); } } @@ -995,7 +1011,7 @@ } } -static void inherit_subsystem_ids(FILE *file, struct device *dev, +static void inherit_subsystem_ids(FILE *file, FILE *head, struct device *dev, struct device *next) { struct device *p; @@ -1360,11 +1376,13 @@ int main(int argc, char **argv) { + unsigned int i; + if ((argc < MANDATORY_ARG_COUNT) || (argc > TOTAL_ARG_COUNT)) usage(); const char *base_devtree = argv[DEVICEFILE_ARG]; - const char *outputc = argv[OUTPUTFILE_ARG]; + char *outputf = argv[OUTPUTFILE_ARG]; const char *override_devtree; parse_devicetree(base_devtree, &base_root_bus); @@ -1381,26 +1399,49 @@ override_devicetree(&base_root_bus, &override_root_bus); } - FILE *autogen = fopen(outputc, "w"); + FILE *autogen = fopen(outputf, "w"); if (!autogen) { fprintf(stderr, "Could not open file '%s' for writing: ", - outputc); + outputf); perror(NULL); exit(1); } + outputf[strlen(outputf) - 1] = 'h'; + FILE *autohead = fopen(outputf, "w"); + if (!autohead) { + fprintf(stderr, "Could not open file '%s' for writing: ", outputf); + perror(NULL); + fclose(autogen); + exit(1); + } + fprintf(autohead, "#ifndef __STATIC_DEVICE_TREE_H\n"); + fprintf(autohead, "#define __STATIC_DEVICE_TREE_H\n\n"); + fprintf(autohead, "#include <device/device.h>\n\n"); + + char *header_name = outputf; + for (i = strlen(outputf) - 1; i > 0; --i) { + if (outputf[i] == '/') { + header_name = outputf + i + 1; + break; + } + } + fprintf(autogen, "#include \"%s\"\n", header_name); + emit_chips(autogen); - walk_device_tree(autogen, &base_root_dev, inherit_subsystem_ids); + walk_device_tree(autogen, autohead, &base_root_dev, inherit_subsystem_ids); fprintf(autogen, "\n/* pass 0 */\n"); - walk_device_tree(autogen, &base_root_dev, pass0); + walk_device_tree(autogen, autohead, &base_root_dev, pass0); fprintf(autogen, "\n/* pass 1 */\n"); - walk_device_tree(autogen, &base_root_dev, pass1); + walk_device_tree(autogen, autohead, &base_root_dev, pass1); /* Expose static devicenames to global namespace. */ fprintf(autogen, "\n/* expose_device_names */\n"); - walk_device_tree(autogen, &base_root_dev, expose_device_names); + walk_device_tree(autogen, autohead, &base_root_dev, expose_device_names); + fprintf(autohead, "\n#endif /* __STATIC_DEVICE_TREE_H */\n"); + fclose(autohead); fclose(autogen); return 0; diff --git a/util/sconfig/sconfig.h b/util/sconfig/sconfig.h index eea2a14..ca834e8 100644 --- a/util/sconfig/sconfig.h +++ b/util/sconfig/sconfig.h @@ -112,6 +112,7 @@ /* Name of this device. */ char *name; + int has_mnemonic; /* Path of this device. */ char *path; @@ -159,7 +160,7 @@ struct device *new_device(struct bus *parent, struct chip_instance *chip_instance, const int bustype, const char *devnum, - int status); + const char *mnemonic, int status); void add_resource(struct bus *bus, int type, int index, int base); diff --git a/util/sconfig/sconfig.l b/util/sconfig/sconfig.l index 87de6e2..4752cca 100755 --- a/util/sconfig/sconfig.l +++ b/util/sconfig/sconfig.l @@ -27,6 +27,7 @@ chip {return(CHIP);} device {return(DEVICE);} register {return(REGISTER);} +as {return(MNEMONIC);} on {yylval.number=1; return(BOOL);} off {yylval.number=0; return(BOOL);} hidden {yylval.number=3; return(HIDDEN);} diff --git a/util/sconfig/sconfig.tab.c_shipped b/util/sconfig/sconfig.tab.c_shipped index 8e1e57d..9fd57e0 100644 --- a/util/sconfig/sconfig.tab.c_shipped +++ b/util/sconfig/sconfig.tab.c_shipped @@ -1,8 +1,9 @@ -/* A Bison parser, made by GNU Bison 3.0.5. */ +/* A Bison parser, made by GNU Bison 3.3.2. */ /* Bison implementation for Yacc-like parsers in C - Copyright (C) 1984, 1989-1990, 2000-2015, 2018 Free Software Foundation, Inc. + Copyright (C) 1984, 1989-1990, 2000-2015, 2018-2019 Free Software Foundation, + Inc. This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -40,11 +41,14 @@ define necessary library symbols; they are noted "INFRINGES ON USER NAME SPACE" below. */ +/* Undocumented macros, especially those whose name start with YY_, + are private implementation details. Do not rely on them. */ + /* Identify Bison output. */ #define YYBISON 1 /* Bison version. */ -#define YYBISON_VERSION "3.0.5" +#define YYBISON_VERSION "3.3.2" /* Skeleton name. */ #define YYSKELETON_NAME "yacc.c" @@ -61,7 +65,7 @@ -/* Copy the first part of user declarations. */ +/* First part of user prologue. */ /* @@ -90,12 +94,15 @@ - # ifndef YY_NULLPTR -# if defined __cplusplus && 201103L <= __cplusplus -# define YY_NULLPTR nullptr +# if defined __cplusplus +# if 201103L <= __cplusplus +# define YY_NULLPTR nullptr +# else +# define YY_NULLPTR 0 +# endif # else -# define YY_NULLPTR 0 +# define YY_NULLPTR ((void*)0) # endif # endif @@ -109,8 +116,8 @@ /* In a future release of Bison, this section will be replaced by #include "sconfig.tab.h_shipped". */ -#ifndef YY_YY_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED -# define YY_YY_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED +#ifndef YY_YY_HOME_ICON_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED +# define YY_YY_HOME_ICON_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED /* Debug traces. */ #ifndef YYDEBUG # define YYDEBUG 0 @@ -127,35 +134,36 @@ CHIP = 258, DEVICE = 259, REGISTER = 260, - BOOL = 261, - HIDDEN = 262, - BUS = 263, - RESOURCE = 264, - END = 265, - EQUALS = 266, - HEX = 267, - STRING = 268, - PCI = 269, - PNP = 270, - I2C = 271, - APIC = 272, - CPU_CLUSTER = 273, - CPU = 274, - DOMAIN = 275, - IRQ = 276, - DRQ = 277, - SLOT_DESC = 278, - IO = 279, - NUMBER = 280, - SUBSYSTEMID = 281, - INHERIT = 282, - IOAPIC_IRQ = 283, - IOAPIC = 284, - PCIINT = 285, - GENERIC = 286, - SPI = 287, - USB = 288, - MMIO = 289 + MNEMONIC = 261, + BOOL = 262, + HIDDEN = 263, + BUS = 264, + RESOURCE = 265, + END = 266, + EQUALS = 267, + HEX = 268, + STRING = 269, + PCI = 270, + PNP = 271, + I2C = 272, + APIC = 273, + CPU_CLUSTER = 274, + CPU = 275, + DOMAIN = 276, + IRQ = 277, + DRQ = 278, + SLOT_DESC = 279, + IO = 280, + NUMBER = 281, + SUBSYSTEMID = 282, + INHERIT = 283, + IOAPIC_IRQ = 284, + IOAPIC = 285, + PCIINT = 286, + GENERIC = 287, + SPI = 288, + USB = 289, + MMIO = 290 }; #endif @@ -184,9 +192,7 @@ int yyparse (void); -#endif /* !YY_YY_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED */ - -/* Copy the second part of user declarations. */ +#endif /* !YY_YY_HOME_ICON_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED */ @@ -209,13 +215,13 @@ #ifdef YYTYPE_UINT16 typedef YYTYPE_UINT16 yytype_uint16; #else -typedef unsigned short int yytype_uint16; +typedef unsigned short yytype_uint16; #endif #ifdef YYTYPE_INT16 typedef YYTYPE_INT16 yytype_int16; #else -typedef short int yytype_int16; +typedef short yytype_int16; #endif #ifndef YYSIZE_T @@ -227,7 +233,7 @@ # include <stddef.h> /* INFRINGES ON USER NAME SPACE */ # define YYSIZE_T size_t # else -# define YYSIZE_T unsigned int +# define YYSIZE_T unsigned # endif #endif @@ -263,15 +269,6 @@ # define YY_ATTRIBUTE_UNUSED YY_ATTRIBUTE ((__unused__)) #endif -#if !defined _Noreturn \ - && (!defined __STDC_VERSION__ || __STDC_VERSION__ < 201112) -# if defined _MSC_VER && 1200 <= _MSC_VER -# define _Noreturn __declspec (noreturn) -# else -# define _Noreturn YY_ATTRIBUTE ((__noreturn__)) -# endif -#endif - /* Suppress unused-variable warnings by "using" E. */ #if ! defined lint || defined __GNUC__ # define YYUSE(E) ((void) (E)) @@ -279,7 +276,7 @@ # define YYUSE(E) /* empty */ #endif -#if defined __GNUC__ && 407 <= __GNUC__ * 100 + __GNUC_MINOR__ +#if defined __GNUC__ && ! defined __ICC && 407 <= __GNUC__ * 100 + __GNUC_MINOR__ /* Suppress an incorrect diagnostic about yylval being uninitialized. */ # define YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN \ _Pragma ("GCC diagnostic push") \ @@ -430,27 +427,27 @@ /* YYFINAL -- State number of the termination state. */ #define YYFINAL 3 /* YYLAST -- Last index in YYTABLE. */ -#define YYLAST 43 +#define YYLAST 47 /* YYNTOKENS -- Number of terminals. */ -#define YYNTOKENS 35 +#define YYNTOKENS 36 /* YYNNTS -- Number of nonterminals. */ -#define YYNNTS 15 +#define YYNNTS 16 /* YYNRULES -- Number of rules. */ -#define YYNRULES 28 +#define YYNRULES 30 /* YYNSTATES -- Number of states. */ -#define YYNSTATES 49 +#define YYNSTATES 52 -/* YYTRANSLATE[YYX] -- Symbol number corresponding to YYX as returned - by yylex, with out-of-bounds checking. */ #define YYUNDEFTOK 2 -#define YYMAXUTOK 289 +#define YYMAXUTOK 290 +/* YYTRANSLATE(TOKEN-NUM) -- Symbol number corresponding to TOKEN-NUM + as returned by yylex, with out-of-bounds checking. */ #define YYTRANSLATE(YYX) \ - ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) + ((unsigned) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) /* YYTRANSLATE[TOKEN-NUM] -- Symbol number corresponding to TOKEN-NUM - as returned by yylex, without out-of-bounds checking. */ + as returned by yylex. */ static const yytype_uint8 yytranslate[] = { 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, @@ -481,7 +478,8 @@ 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, - 25, 26, 27, 28, 29, 30, 31, 32, 33, 34 + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, + 35 }; #if YYDEBUG @@ -490,7 +488,8 @@ { 0, 36, 36, 36, 38, 38, 38, 38, 40, 40, 40, 40, 40, 40, 40, 42, 42, 51, 51, 59, - 59, 61, 64, 67, 70, 73, 76, 79, 82 + 61, 65, 65, 67, 70, 73, 76, 79, 82, 85, + 88 }; #endif @@ -499,14 +498,14 @@ First, the terminals, then, starting at YYNTOKENS, nonterminals. */ static const char *const yytname[] = { - "$end", "error", "$undefined", "CHIP", "DEVICE", "REGISTER", "BOOL", - "HIDDEN", "BUS", "RESOURCE", "END", "EQUALS", "HEX", "STRING", "PCI", - "PNP", "I2C", "APIC", "CPU_CLUSTER", "CPU", "DOMAIN", "IRQ", "DRQ", - "SLOT_DESC", "IO", "NUMBER", "SUBSYSTEMID", "INHERIT", "IOAPIC_IRQ", - "IOAPIC", "PCIINT", "GENERIC", "SPI", "USB", "MMIO", "$accept", - "devtree", "$@1", "chipchildren", "devicechildren", "chip", "@2", - "device", "@3", "status", "resource", "registers", "subsystemid", - "ioapic_irq", "smbios_slot_desc", YY_NULLPTR + "$end", "error", "$undefined", "CHIP", "DEVICE", "REGISTER", "MNEMONIC", + "BOOL", "HIDDEN", "BUS", "RESOURCE", "END", "EQUALS", "HEX", "STRING", + "PCI", "PNP", "I2C", "APIC", "CPU_CLUSTER", "CPU", "DOMAIN", "IRQ", + "DRQ", "SLOT_DESC", "IO", "NUMBER", "SUBSYSTEMID", "INHERIT", + "IOAPIC_IRQ", "IOAPIC", "PCIINT", "GENERIC", "SPI", "USB", "MMIO", + "$accept", "devtree", "$@1", "chipchildren", "devicechildren", "chip", + "@2", "device", "@3", "mnemonic", "status", "resource", "registers", + "subsystemid", "ioapic_irq", "smbios_slot_desc", YY_NULLPTR }; #endif @@ -518,7 +517,7 @@ 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, - 285, 286, 287, 288, 289 + 285, 286, 287, 288, 289, 290 }; # endif @@ -536,11 +535,12 @@ STATE-NUM. */ static const yytype_int8 yypact[] = { - -12, 11, 9, -12, 1, -12, -12, -12, 0, 5, - 3, -12, -12, -12, -12, -10, 6, 2, 8, -12, - -12, -12, -12, -12, -3, -1, -12, 13, 4, 7, - -12, -12, -12, -12, -12, -12, 16, 15, 10, -11, - 12, 17, -5, 14, -12, 18, -12, -12, -12 + -12, 11, -1, -12, 0, -12, -12, -12, 1, 4, + 3, -12, -12, -12, -12, -11, 6, 10, 5, 9, + 2, -12, -12, -12, -12, -12, -12, -3, -6, -12, + 13, 7, 8, -12, -12, -12, -12, -12, -12, 16, + 15, 12, 14, 17, 18, 19, 20, -12, 21, -12, + -12, -12 }; /* YYDEFACT[STATE-NUM] -- Default reduction number in state STATE-NUM. @@ -549,24 +549,25 @@ static const yytype_uint8 yydefact[] = { 2, 0, 0, 1, 0, 3, 15, 7, 0, 0, - 0, 16, 5, 4, 6, 0, 0, 0, 0, 19, - 20, 17, 22, 14, 0, 0, 18, 0, 0, 0, - 9, 8, 10, 11, 12, 13, 0, 0, 0, 0, - 0, 28, 23, 0, 21, 27, 24, 25, 26 + 0, 16, 5, 4, 6, 0, 0, 19, 0, 0, + 0, 24, 20, 21, 22, 17, 14, 0, 0, 18, + 0, 0, 0, 9, 8, 10, 11, 12, 13, 0, + 0, 0, 0, 0, 30, 25, 0, 23, 29, 26, + 27, 28 }; /* YYPGOTO[NTERM-NUM]. */ static const yytype_int8 yypgoto[] = { - -12, -12, -12, -12, -12, -6, -12, 19, -12, -12, - -12, -12, -12, -12, -12 + -12, -12, -12, -12, -12, -5, -12, -2, -12, -12, + -12, -12, -12, -12, -12, -12 }; /* YYDEFGOTO[NTERM-NUM]. */ static const yytype_int8 yydefgoto[] = { - -1, 1, 2, 8, 24, 5, 7, 13, 23, 21, - 32, 14, 33, 34, 35 + -1, 1, 2, 8, 27, 5, 7, 13, 26, 20, + 25, 35, 14, 36, 37, 38 }; /* YYTABLE[YYPACT[STATE-NUM]] -- What to do in state STATE-NUM. If @@ -574,47 +575,50 @@ number is the opposite. If YYTABLE_NINF, syntax error. */ static const yytype_uint8 yytable[] = { - 4, 9, 12, 4, 9, 10, 25, 26, 19, 20, - 11, 3, 4, 15, 6, 17, 16, 18, 30, 43, - 27, 22, 46, 28, 36, 29, 37, 40, 41, 38, - 45, 48, 39, 0, 0, 42, 0, 44, 0, 47, - 0, 0, 0, 31 + 4, 9, 4, 12, 4, 9, 10, 28, 29, 23, + 24, 3, 11, 15, 6, 17, 19, 16, 18, 21, + 39, 30, 33, 22, 31, 34, 32, 40, 43, 44, + 0, 0, 48, 41, 42, 51, 0, 0, 45, 0, + 0, 0, 0, 47, 0, 46, 50, 49 }; static const yytype_int8 yycheck[] = { - 3, 4, 8, 3, 4, 5, 9, 10, 6, 7, - 10, 0, 3, 8, 13, 25, 13, 11, 24, 30, - 23, 13, 27, 26, 25, 28, 13, 11, 13, 25, - 13, 13, 25, -1, -1, 25, -1, 25, -1, 25, - -1, -1, -1, 24 + 3, 4, 3, 8, 3, 4, 5, 10, 11, 7, + 8, 0, 11, 9, 14, 26, 6, 14, 12, 14, + 26, 24, 27, 14, 27, 27, 29, 14, 12, 14, + -1, -1, 14, 26, 26, 14, -1, -1, 26, -1, + -1, -1, -1, 26, -1, 31, 26, 28 }; /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing symbol of state STATE-NUM. */ static const yytype_uint8 yystos[] = { - 0, 36, 37, 0, 3, 40, 13, 41, 38, 4, - 5, 10, 40, 42, 46, 8, 13, 25, 11, 6, - 7, 44, 13, 43, 39, 9, 10, 23, 26, 28, - 40, 42, 45, 47, 48, 49, 25, 13, 25, 25, - 11, 13, 25, 30, 25, 13, 27, 25, 13 + 0, 37, 38, 0, 3, 41, 14, 42, 39, 4, + 5, 11, 41, 43, 48, 9, 14, 26, 12, 6, + 45, 14, 14, 7, 8, 46, 44, 40, 10, 11, + 24, 27, 29, 41, 43, 47, 49, 50, 51, 26, + 14, 26, 26, 12, 14, 26, 31, 26, 14, 28, + 26, 14 }; /* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ static const yytype_uint8 yyr1[] = { - 0, 35, 37, 36, 38, 38, 38, 38, 39, 39, - 39, 39, 39, 39, 39, 41, 40, 43, 42, 44, - 44, 45, 46, 47, 47, 48, 49, 49, 49 + 0, 36, 38, 37, 39, 39, 39, 39, 40, 40, + 40, 40, 40, 40, 40, 42, 41, 44, 43, 45, + 45, 46, 46, 47, 48, 49, 49, 50, 51, 51, + 51 }; /* YYR2[YYN] -- Number of symbols on the right hand side of rule YYN. */ static const yytype_uint8 yyr2[] = { 0, 2, 0, 2, 2, 2, 2, 0, 2, 2, - 2, 2, 2, 2, 0, 0, 5, 0, 7, 1, - 1, 4, 4, 3, 4, 4, 5, 4, 3 + 2, 2, 2, 2, 0, 0, 5, 0, 8, 0, + 2, 1, 1, 4, 4, 3, 4, 4, 5, 4, + 3 }; @@ -630,22 +634,22 @@ #define YYRECOVERING() (!!yyerrstatus) -#define YYBACKUP(Token, Value) \ -do \ - if (yychar == YYEMPTY) \ - { \ - yychar = (Token); \ - yylval = (Value); \ - YYPOPSTACK (yylen); \ - yystate = *yyssp; \ - goto yybackup; \ - } \ - else \ - { \ - yyerror (YY_("syntax error: cannot back up")); \ - YYERROR; \ - } \ -while (0) +#define YYBACKUP(Token, Value) \ + do \ + if (yychar == YYEMPTY) \ + { \ + yychar = (Token); \ + yylval = (Value); \ + YYPOPSTACK (yylen); \ + yystate = *yyssp; \ + goto yybackup; \ + } \ + else \ + { \ + yyerror (YY_("syntax error: cannot back up")); \ + YYERROR; \ + } \ + while (0) /* Error token number */ #define YYTERROR 1 @@ -685,37 +689,37 @@ } while (0) -/*----------------------------------------. -| Print this symbol's value on YYOUTPUT. | -`----------------------------------------*/ +/*-----------------------------------. +| Print this symbol's value on YYO. | +`-----------------------------------*/ static void -yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +yy_symbol_value_print (FILE *yyo, int yytype, YYSTYPE const * const yyvaluep) { - FILE *yyo = yyoutput; - YYUSE (yyo); + FILE *yyoutput = yyo; + YYUSE (yyoutput); if (!yyvaluep) return; # ifdef YYPRINT if (yytype < YYNTOKENS) - YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); + YYPRINT (yyo, yytoknum[yytype], *yyvaluep); # endif YYUSE (yytype); } -/*--------------------------------. -| Print this symbol on YYOUTPUT. | -`--------------------------------*/ +/*---------------------------. +| Print this symbol on YYO. | +`---------------------------*/ static void -yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +yy_symbol_print (FILE *yyo, int yytype, YYSTYPE const * const yyvaluep) { - YYFPRINTF (yyoutput, "%s %s (", + YYFPRINTF (yyo, "%s %s (", yytype < YYNTOKENS ? "token" : "nterm", yytname[yytype]); - yy_symbol_value_print (yyoutput, yytype, yyvaluep); - YYFPRINTF (yyoutput, ")"); + yy_symbol_value_print (yyo, yytype, yyvaluep); + YYFPRINTF (yyo, ")"); } /*------------------------------------------------------------------. @@ -749,7 +753,7 @@ static void yy_reduce_print (yytype_int16 *yyssp, YYSTYPE *yyvsp, int yyrule) { - unsigned long int yylno = yyrline[yyrule]; + unsigned long yylno = yyrline[yyrule]; int yynrhs = yyr2[yyrule]; int yyi; YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n", @@ -760,7 +764,7 @@ YYFPRINTF (stderr, " $%d = ", yyi + 1); yy_symbol_print (stderr, yystos[yyssp[yyi + 1 - yynrhs]], - &(yyvsp[(yyi + 1) - (yynrhs)]) + &yyvsp[(yyi + 1) - (yynrhs)] ); YYFPRINTF (stderr, "\n"); } @@ -864,7 +868,10 @@ case '\\': if (*++yyp != '\\') goto do_not_strip_quotes; - /* Fall through. */ + else + goto append; + + append: default: if (yyres) yyres[yyn] = *yyp; @@ -882,7 +889,7 @@ if (! yyres) return yystrlen (yystr); - return yystpcpy (yyres, yystr) - yyres; + return (YYSIZE_T) (yystpcpy (yyres, yystr) - yyres); } # endif @@ -960,10 +967,10 @@ yyarg[yycount++] = yytname[yyx]; { YYSIZE_T yysize1 = yysize + yytnamerr (YY_NULLPTR, yytname[yyx]); - if (! (yysize <= yysize1 - && yysize1 <= YYSTACK_ALLOC_MAXIMUM)) + if (yysize <= yysize1 && yysize1 <= YYSTACK_ALLOC_MAXIMUM) + yysize = yysize1; + else return 2; - yysize = yysize1; } } } @@ -987,9 +994,10 @@ { YYSIZE_T yysize1 = yysize + yystrlen (yyformat); - if (! (yysize <= yysize1 && yysize1 <= YYSTACK_ALLOC_MAXIMUM)) + if (yysize <= yysize1 && yysize1 <= YYSTACK_ALLOC_MAXIMUM) + yysize = yysize1; + else return 2; - yysize = yysize1; } if (*yymsg_alloc < yysize) @@ -1115,23 +1123,31 @@ yychar = YYEMPTY; /* Cause a token to be read. */ goto yysetstate; + /*------------------------------------------------------------. -| yynewstate -- Push a new state, which is found in yystate. | +| yynewstate -- push a new state, which is found in yystate. | `------------------------------------------------------------*/ - yynewstate: +yynewstate: /* In all cases, when you get here, the value and location stacks have just been pushed. So pushing a state here evens the stacks. */ yyssp++; - yysetstate: - *yyssp = yystate; + +/*--------------------------------------------------------------------. +| yynewstate -- set current state (the top of the stack) to yystate. | +`--------------------------------------------------------------------*/ +yysetstate: + *yyssp = (yytype_int16) yystate; if (yyss + yystacksize - 1 <= yyssp) +#if !defined yyoverflow && !defined YYSTACK_RELOCATE + goto yyexhaustedlab; +#else { /* Get the current used size of the three stacks, in elements. */ - YYSIZE_T yysize = yyssp - yyss + 1; + YYSIZE_T yysize = (YYSIZE_T) (yyssp - yyss + 1); -#ifdef yyoverflow +# if defined yyoverflow { /* Give user a chance to reallocate the stack. Use copies of these so that the &'s don't force the real ones into @@ -1147,14 +1163,10 @@ &yyss1, yysize * sizeof (*yyssp), &yyvs1, yysize * sizeof (*yyvsp), &yystacksize); - yyss = yyss1; yyvs = yyvs1; } -#else /* no yyoverflow */ -# ifndef YYSTACK_RELOCATE - goto yyexhaustedlab; -# else +# else /* defined YYSTACK_RELOCATE */ /* Extend the stack our own way. */ if (YYMAXDEPTH <= yystacksize) goto yyexhaustedlab; @@ -1170,22 +1182,22 @@ goto yyexhaustedlab; YYSTACK_RELOCATE (yyss_alloc, yyss); YYSTACK_RELOCATE (yyvs_alloc, yyvs); -# undef YYSTACK_RELOCATE +# undef YYSTACK_RELOCATE if (yyss1 != yyssa) YYSTACK_FREE (yyss1); } # endif -#endif /* no yyoverflow */ yyssp = yyss + yysize - 1; yyvsp = yyvs + yysize - 1; YYDPRINTF ((stderr, "Stack size increased to %lu\n", - (unsigned long int) yystacksize)); + (unsigned long) yystacksize)); if (yyss + yystacksize - 1 <= yyssp) YYABORT; } +#endif /* !defined yyoverflow && !defined YYSTACK_RELOCATE */ YYDPRINTF ((stderr, "Entering state %d\n", yystate)); @@ -1194,11 +1206,11 @@ goto yybackup; + /*-----------. | yybackup. | `-----------*/ yybackup: - /* Do appropriate processing given the current state. Read a lookahead token if we need one and don't already have one. */ @@ -1271,7 +1283,7 @@ /*-----------------------------. -| yyreduce -- Do a reduction. | +| yyreduce -- do a reduction. | `-----------------------------*/ yyreduce: /* yyn is the number of a rule to reduce with. */ @@ -1318,7 +1330,7 @@ case 17: { - (yyval.dev) = new_device(cur_parent, cur_chip_instance, (yyvsp[-2].number), (yyvsp[-1].string), (yyvsp[0].number)); + (yyval.dev) = new_device(cur_parent, cur_chip_instance, (yyvsp[-3].number), (yyvsp[-2].string), (yyvsp[-1].string), (yyvsp[0].number)); cur_parent = (yyval.dev)->last_bus; } @@ -1332,50 +1344,66 @@ break; - case 21: + case 19: - { add_resource(cur_parent, (yyvsp[-3].number), strtol((yyvsp[-2].string), NULL, 0), strtol((yyvsp[0].string), NULL, 0)); } + { + (yyval.string) = NULL; +} break; - case 22: + case 20: - { add_register(cur_chip_instance, (yyvsp[-2].string), (yyvsp[0].string)); } + { + (yyval.string) = (yyvsp[0].string); +} break; case 23: - { add_pci_subsystem_ids(cur_parent, strtol((yyvsp[-1].string), NULL, 16), strtol((yyvsp[0].string), NULL, 16), 0); } + { add_resource(cur_parent, (yyvsp[-3].number), strtol((yyvsp[-2].string), NULL, 0), strtol((yyvsp[0].string), NULL, 0)); } break; case 24: - { add_pci_subsystem_ids(cur_parent, strtol((yyvsp[-2].string), NULL, 16), strtol((yyvsp[-1].string), NULL, 16), 1); } + { add_register(cur_chip_instance, (yyvsp[-2].string), (yyvsp[0].string)); } break; case 25: - { add_ioapic_info(cur_parent, strtol((yyvsp[-2].string), NULL, 16), (yyvsp[-1].string), strtol((yyvsp[0].string), NULL, 16)); } + { add_pci_subsystem_ids(cur_parent, strtol((yyvsp[-1].string), NULL, 16), strtol((yyvsp[0].string), NULL, 16), 0); } break; case 26: - { add_slot_desc(cur_parent, (yyvsp[-3].string), (yyvsp[-2].string), (yyvsp[-1].string), (yyvsp[0].string)); } + { add_pci_subsystem_ids(cur_parent, strtol((yyvsp[-2].string), NULL, 16), strtol((yyvsp[-1].string), NULL, 16), 1); } break; case 27: - { add_slot_desc(cur_parent, (yyvsp[-2].string), (yyvsp[-1].string), (yyvsp[0].string), NULL); } + { add_ioapic_info(cur_parent, strtol((yyvsp[-2].string), NULL, 16), (yyvsp[-1].string), strtol((yyvsp[0].string), NULL, 16)); } break; case 28: + { add_slot_desc(cur_parent, (yyvsp[-3].string), (yyvsp[-2].string), (yyvsp[-1].string), (yyvsp[0].string)); } + + break; + + case 29: + + { add_slot_desc(cur_parent, (yyvsp[-2].string), (yyvsp[-1].string), (yyvsp[0].string), NULL); } + + break; + + case 30: + { add_slot_desc(cur_parent, (yyvsp[-1].string), (yyvsp[0].string), NULL, NULL); } break; @@ -1406,14 +1434,13 @@ /* Now 'shift' the result of the reduction. Determine what state that goes to, based on the state we popped back to and the rule number reduced by. */ - - yyn = yyr1[yyn]; - - yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; - if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) - yystate = yytable[yystate]; - else - yystate = yydefgoto[yyn - YYNTOKENS]; + { + const int yylhs = yyr1[yyn] - YYNTOKENS; + const int yyi = yypgoto[yylhs] + *yyssp; + yystate = (0 <= yyi && yyi <= YYLAST && yycheck[yyi] == *yyssp + ? yytable[yyi] + : yydefgoto[yylhs]); + } goto yynewstate; @@ -1496,12 +1523,10 @@ | yyerrorlab -- error raised explicitly by YYERROR. | `---------------------------------------------------*/ yyerrorlab: - - /* Pacify compilers like GCC when the user code never invokes - YYERROR and the label yyerrorlab therefore never appears in user - code. */ - if (/*CONSTCOND*/ 0) - goto yyerrorlab; + /* Pacify compilers when the user code never invokes YYERROR and the + label yyerrorlab therefore never appears in user code. */ + if (0) + YYERROR; /* Do not reclaim the symbols of the rule whose action triggered this YYERROR. */ @@ -1563,6 +1588,7 @@ yyresult = 0; goto yyreturn; + /*-----------------------------------. | yyabortlab -- YYABORT comes here. | `-----------------------------------*/ @@ -1570,6 +1596,7 @@ yyresult = 1; goto yyreturn; + #if !defined yyoverflow || YYERROR_VERBOSE /*-------------------------------------------------. | yyexhaustedlab -- memory exhaustion comes here. | @@ -1580,6 +1607,10 @@ /* Fall through. */ #endif + +/*-----------------------------------------------------. +| yyreturn -- parsing is finished, return the result. | +`-----------------------------------------------------*/ yyreturn: if (yychar != YYEMPTY) { diff --git a/util/sconfig/sconfig.tab.h_shipped b/util/sconfig/sconfig.tab.h_shipped index bcbd644..8af828e 100644 --- a/util/sconfig/sconfig.tab.h_shipped +++ b/util/sconfig/sconfig.tab.h_shipped @@ -1,8 +1,9 @@ -/* A Bison parser, made by GNU Bison 3.0.5. */ +/* A Bison parser, made by GNU Bison 3.3.2. */ /* Bison interface for Yacc-like parsers in C - Copyright (C) 1984, 1989-1990, 2000-2015, 2018 Free Software Foundation, Inc. + Copyright (C) 1984, 1989-1990, 2000-2015, 2018-2019 Free Software Foundation, + Inc. This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -30,8 +31,11 @@ This special exception was added by the Free Software Foundation in version 2.2 of Bison. */ -#ifndef YY_YY_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED -# define YY_YY_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED +/* Undocumented macros, especially those whose name start with YY_, + are private implementation details. Do not rely on them. */ + +#ifndef YY_YY_HOME_ICON_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED +# define YY_YY_HOME_ICON_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED /* Debug traces. */ #ifndef YYDEBUG # define YYDEBUG 0 @@ -48,35 +52,36 @@ CHIP = 258, DEVICE = 259, REGISTER = 260, - BOOL = 261, - HIDDEN = 262, - BUS = 263, - RESOURCE = 264, - END = 265, - EQUALS = 266, - HEX = 267, - STRING = 268, - PCI = 269, - PNP = 270, - I2C = 271, - APIC = 272, - CPU_CLUSTER = 273, - CPU = 274, - DOMAIN = 275, - IRQ = 276, - DRQ = 277, - SLOT_DESC = 278, - IO = 279, - NUMBER = 280, - SUBSYSTEMID = 281, - INHERIT = 282, - IOAPIC_IRQ = 283, - IOAPIC = 284, - PCIINT = 285, - GENERIC = 286, - SPI = 287, - USB = 288, - MMIO = 289 + MNEMONIC = 261, + BOOL = 262, + HIDDEN = 263, + BUS = 264, + RESOURCE = 265, + END = 266, + EQUALS = 267, + HEX = 268, + STRING = 269, + PCI = 270, + PNP = 271, + I2C = 272, + APIC = 273, + CPU_CLUSTER = 274, + CPU = 275, + DOMAIN = 276, + IRQ = 277, + DRQ = 278, + SLOT_DESC = 279, + IO = 280, + NUMBER = 281, + SUBSYSTEMID = 282, + INHERIT = 283, + IOAPIC_IRQ = 284, + IOAPIC = 285, + PCIINT = 286, + GENERIC = 287, + SPI = 288, + USB = 289, + MMIO = 290 }; #endif @@ -105,4 +110,4 @@ int yyparse (void); -#endif /* !YY_YY_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED */ +#endif /* !YY_YY_HOME_ICON_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED */ diff --git a/util/sconfig/sconfig.y b/util/sconfig/sconfig.y index 0d894a9..1f225c1 100755 --- a/util/sconfig/sconfig.y +++ b/util/sconfig/sconfig.y @@ -31,7 +31,7 @@ int number; } -%token CHIP DEVICE REGISTER BOOL HIDDEN BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC CPU_CLUSTER CPU DOMAIN IRQ DRQ SLOT_DESC IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT GENERIC SPI USB MMIO +%token CHIP DEVICE REGISTER MNEMONIC BOOL HIDDEN BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC CPU_CLUSTER CPU DOMAIN IRQ DRQ SLOT_DESC IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT GENERIC SPI USB MMIO %% devtree: { cur_parent = root_parent; } chip; @@ -48,12 +48,18 @@ cur_chip_instance = chip_dequeue_tail(); }; -device: DEVICE BUS NUMBER /* == devnum */ status { - $<dev>$ = new_device(cur_parent, cur_chip_instance, $<number>2, $<string>3, $<number>4); +device: DEVICE BUS NUMBER /* == devnum */ mnemonic status { + $<dev>$ = new_device(cur_parent, cur_chip_instance, $<number>2, $<string>3, $<string>4, $<number>5); cur_parent = $<dev>$->last_bus; } devicechildren END { - cur_parent = $<dev>5->parent; + cur_parent = $<dev>6->parent; +}; + +mnemonic: /* empty */ { + $<string>$ = NULL; +} | MNEMONIC STRING { + $<string>$ = $<string>2; }; status: BOOL | HIDDEN; -- To view, visit https://review.coreboot.org/c/coreboot/+/35456 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I058a319f9b968924fbef9485a96c9e3f900a3ee8 Gerrit-Change-Number: 35456 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: [TEST] mb/supermicro/x11-lga1151-series: rewrite gpio.h using intelp2m

by Maxim Polyakov (Code Review)

Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35679 ) Change subject: [TEST] mb/supermicro/x11-lga1151-series: rewrite gpio.h using intelp2m ...................................................................... [TEST] mb/supermicro/x11-lga1151-series: rewrite gpio.h using intelp2m gpio.h was generated using the Intel Pad 2 Macro utility (intelp2m) [1] Please review and test coreboot image with this patch [1] https://review.coreboot.org/c/coreboot/+/35643 These changes are not tested on real hardware. Change-Id: Idad7536854d4b1ae7dcf7934e81de438478fe059 Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- M src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h 1 file changed, 213 insertions(+), 213 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/35679/1 diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h index a5eed6b..5320298 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h @@ -21,210 +21,210 @@ #ifndef __ACPI__ static const struct pad_config gpio_table[] = { -/* RCIN# */ _PAD_CFG_STRUCT(GPP_A0, 0x44000702, 0x00000000), -/* LAD0 */ _PAD_CFG_STRUCT(GPP_A1, 0x44000702, 0x00000000), -/* LAD1 */ _PAD_CFG_STRUCT(GPP_A2, 0x44000700, 0x00000000), -/* LAD2 */ _PAD_CFG_STRUCT(GPP_A3, 0x44000702, 0x00000000), -/* LAD3 */ _PAD_CFG_STRUCT(GPP_A4, 0x44000700, 0x00000000), -/* LFRAME# */ _PAD_CFG_STRUCT(GPP_A5, 0x44000700, 0x00000000), -/* SERIRQ */ _PAD_CFG_STRUCT(GPP_A6, 0x44000700, 0x00000000), -/* PIRQA# */ _PAD_CFG_STRUCT(GPP_A7, 0x44000702, 0x00000000), -/* CLKRUN# */ _PAD_CFG_STRUCT(GPP_A8, 0x44000700, 0x00000000), -/* CLKOUT_LPC0 */ _PAD_CFG_STRUCT(GPP_A9, 0x44000700, 0x00000000), -/* CLKOUT_LPC1 */ _PAD_CFG_STRUCT(GPP_A10, 0x44000700, 0x00000000), -/* PME# */ _PAD_CFG_STRUCT(GPP_A11, 0x44000702, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_A12, 0x80080201, 0x00000000), -/* SUSWARN# */ _PAD_CFG_STRUCT(GPP_A13, 0x44000700, 0x00000000), -/* SUS_STAT# */ _PAD_CFG_STRUCT(GPP_A14, 0x44000700, 0x00000000), -/* SUS_ACK# */ _PAD_CFG_STRUCT(GPP_A15, 0x44000702, 0x00000000), -/* CLKOUT_48 */ _PAD_CFG_STRUCT(GPP_A16, 0x44000700, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_A17, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_A18, 0x84000100, 0x00000000), -/* RESERVED */ //_PAD_CFG_STRUCT(GPP_A19, 0xffffffff, 0xffffff00), -/* GPIO */ _PAD_CFG_STRUCT(GPP_A20, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_A21, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_A22, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_A23, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B0, 0x44000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B1, 0x44000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B2, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B3, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B4, 0x44000301, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B5, 0x44000301, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B6, 0x84000301, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B7, 0x44000301, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B8, 0x44000301, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B9, 0x44000301, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B10, 0x44000301, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B11, 0x44000200, 0x00000000), -/* SLP_S0# */ _PAD_CFG_STRUCT(GPP_B12, 0x44000700, 0x00000000), -/* PLTRST# */ _PAD_CFG_STRUCT(GPP_B13, 0x44000700, 0x00000000), -/* SPKR */ _PAD_CFG_STRUCT(GPP_B14, 0x84000700, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B15, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B16, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B17, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B18, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B19, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B20, 0x84000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B21, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_B22, 0x44000300, 0x00000000), -/* PCHHOT# */ _PAD_CFG_STRUCT(GPP_B23, 0x40000b00, 0x00000000), -/* RESERVED */ //_PAD_CFG_STRUCT(GPP_C0, 0xffffffff, 0xffffff00), -/* RESERVED */ //_PAD_CFG_STRUCT(GPP_C1, 0xffffffff, 0xffffff00), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C2, 0x44000300, 0x00000000), -/* RESERVED */ //_PAD_CFG_STRUCT(GPP_C3, 0xffffffff, 0xffffff00), -/* RESERVED */ //_PAD_CFG_STRUCT(GPP_C4, 0xffffffff, 0xffffff00), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C5, 0x44000201, 0x00000000), -/* RESERVED */ //_PAD_CFG_STRUCT(GPP_C6, 0xffffffff, 0xffffff00), -/* RESERVED */ //_PAD_CFG_STRUCT(GPP_C7, 0xffffffff, 0xffffff00), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C8, 0x84000102, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C9, 0x84000100, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C10, 0x84000102, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C11, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C12, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C13, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C14, 0x84000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C15, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C16, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C17, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C18, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C19, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C20, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C21, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C22, 0x42040102, 0x00003000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_C23, 0x84000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D0, 0x84000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D1, 0x44000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D2, 0x42020102, 0x00003000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D3, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D4, 0x84000200, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D5, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D6, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D7, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D8, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D9, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D10, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D11, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D12, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D13, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D14, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D15, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D16, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D17, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D18, 0x84000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D19, 0x84000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D20, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D21, 0x44000200, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D22, 0x04000102, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_D23, 0x44000300, 0x00000000), -/* SATAXPCIE0 */ _PAD_CFG_STRUCT(GPP_E0, 0x44000502, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_E1, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_E2, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_E3, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_E4, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_E5, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_E6, 0x82020102, 0x00003000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_E7, 0x44000300, 0x00000000), -/* SATA_LED# */ _PAD_CFG_STRUCT(GPP_E8, 0x44000700, 0x00000000), -/* USB_OC0# */ _PAD_CFG_STRUCT(GPP_E9, 0x44000702, 0x00000000), -/* USB_OC1# */ _PAD_CFG_STRUCT(GPP_E10, 0x44000702, 0x00000000), -/* USB_OC2# */ _PAD_CFG_STRUCT(GPP_E11, 0x44000702, 0x00000000), -/* USB_OC3# */ _PAD_CFG_STRUCT(GPP_E12, 0x44000702, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F0, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F1, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F2, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F3, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F4, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F5, 0x80100102, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F6, 0x84000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F7, 0x84000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F8, 0x84000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F9, 0x84000102, 0x00000000), -/* SATA_SCLOCK */ _PAD_CFG_STRUCT(GPP_F10, 0x44000700, 0x00000000), -/* SATA_SLOAD */ _PAD_CFG_STRUCT(GPP_F11, 0x44000700, 0x00000000), -/* SATA_SDATAOUT1 */ _PAD_CFG_STRUCT(GPP_F12, 0x44000700, 0x00000000), -/* SATA_SDATAOUT2 */ _PAD_CFG_STRUCT(GPP_F13, 0x44000700, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F14, 0x44000300, 0x00000000), -/* USB_OC4# */ _PAD_CFG_STRUCT(GPP_F15, 0x44000702, 0x00000000), -/* USB_OC5# */ _PAD_CFG_STRUCT(GPP_F16, 0x44000702, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F17, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F18, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F19, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F20, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F21, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F22, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_F23, 0x04000200, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G0, 0x44000100, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G1, 0x44000100, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G2, 0x44000102, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G3, 0x44000102, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G4, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G5, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G6, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G7, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G8, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G9, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G10, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G11, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G12, 0x84000100, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G13, 0x84000100, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G14, 0x84000102, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G15, 0x84000100, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G16, 0x84000100, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G17, 0x44000300, 0x00000000), -/* NMI# */ _PAD_CFG_STRUCT(GPP_G18, 0x44000700, 0x00000000), -/* SMI# */ _PAD_CFG_STRUCT(GPP_G19, 0x44000700, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G20, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G21, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G22, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_G23, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_H0, 0x44000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_H1, 0x84000103, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_H2, 0x44000201, 0x00000000), -/* SRCCLKREQ9# */ _PAD_CFG_STRUCT(GPP_H3, 0x44000602, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_H4, 0x84000103, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_H5, 0x84000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_H6, 0x84000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_H7, 0x84000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_H8, 0x84000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_H9, 0x84000201, 0x00000000), -/* SML2CLK */ _PAD_CFG_STRUCT(GPP_H10, 0x44000702, 0x00000000), -/* SML2DATA */ _PAD_CFG_STRUCT(GPP_H11, 0x44000702, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_H12, 0x44000300, 0x00000000), -/* SML3CLK */ _PAD_CFG_STRUCT(GPP_H13, 0x44000702, 0x00000000), -/* SML3DATA */ _PAD_CFG_STRUCT(GPP_H14, 0x44000702, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_H15, 0x44000300, 0x00000000), -/* SML4CLK */ _PAD_CFG_STRUCT(GPP_H16, 0x44000702, 0x00000000), -/* SML4DATA */ _PAD_CFG_STRUCT(GPP_H17, 0x44000702, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_H18, 0x44000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_H19, 0x84000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_H20, 0x84000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_H21, 0x84000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_H22, 0x84000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_H23, 0x84000201, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPD0, 0x04000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPD1, 0x04000300, 0x00000000), -/* LAN_WAKE# */ _PAD_CFG_STRUCT(GPD2, 0x04000702, 0x00000000), -/* PWRBTN# */ _PAD_CFG_STRUCT(GPD3, 0x04000702, 0x00000000), -/* SLP_S3# */ _PAD_CFG_STRUCT(GPD4, 0x04000700, 0x00000000), -/* SLP_S4# */ _PAD_CFG_STRUCT(GPD5, 0x04000700, 0x00000000), -/* SLP_A# */ _PAD_CFG_STRUCT(GPD6, 0x04000700, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPD7, 0x04000301, 0x00000000), -/* SUSCLK */ _PAD_CFG_STRUCT(GPD8, 0x04000700, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPD9, 0x04000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPD10, 0x04000300, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPD11, 0x04000300, 0x00000000), -/* DDPB_HPD0 */ _PAD_CFG_STRUCT(GPP_I0, 0x44000700, 0x00000000), -/* DDPC_HPD1 */ _PAD_CFG_STRUCT(GPP_I1, 0x44000700, 0x00000000), -/* DDPD_HPD2 */ _PAD_CFG_STRUCT(GPP_I2, 0x44000700, 0x00000000), -/* DDPE_HPD3 */ _PAD_CFG_STRUCT(GPP_I3, 0x84000700, 0x00000000), -/* GPIO */ _PAD_CFG_STRUCT(GPP_I4, 0x44000300, 0x00000000), -/* DDPB_CTRLCLK */ _PAD_CFG_STRUCT(GPP_I5, 0x44000700, 0x00000000), -/* DDPB_CTRLDATA */ _PAD_CFG_STRUCT(GPP_I6, 0x44000700, 0x00000000), -/* DDPC_CTRLCLK */ _PAD_CFG_STRUCT(GPP_I7, 0x44000700, 0x00000000), -/* DDPC_CTRLDATA */ _PAD_CFG_STRUCT(GPP_I8, 0x44000700, 0x00000000), -/* DDPD_CTRLCLK */ _PAD_CFG_STRUCT(GPP_I9, 0x44000700, 0x00000000), -/* DDPD_CTRLDATA */ _PAD_CFG_STRUCT(GPP_I10, 0x44000700, 0x00000000), + PAD_CFG_NF_BUF_TRIG(GPP_A0, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* RCIN# */ + PAD_CFG_NF_BUF_TRIG(GPP_A1, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* LAD0 */ + PAD_CFG_NF_BUF_TRIG(GPP_A2, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* LAD1 */ + PAD_CFG_NF_BUF_TRIG(GPP_A3, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* LAD2 */ + PAD_CFG_NF_BUF_TRIG(GPP_A4, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* LAD3 */ + PAD_CFG_NF_BUF_TRIG(GPP_A5, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* LFRAME# */ + PAD_CFG_NF_BUF_TRIG(GPP_A6, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SERIRQ */ + PAD_CFG_NF_BUF_TRIG(GPP_A7, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* PIRQA# */ + PAD_CFG_NF_BUF_TRIG(GPP_A8, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* CLKRUN# */ + PAD_CFG_NF_BUF_TRIG(GPP_A9, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* CLKOUT_LPC0 */ + PAD_CFG_NF_BUF_TRIG(GPP_A10, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* CLKOUT_LPC1 */ + PAD_CFG_NF_BUF_TRIG(GPP_A11, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* PME# */ + PAD_CFG_GPO(GPP_A12, 1, PLTRST), /* GPIO */ + PAD_CFG_NF_BUF_TRIG(GPP_A13, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SUSWARN# */ + PAD_CFG_NF_BUF_TRIG(GPP_A14, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SUS_STAT# */ + PAD_CFG_NF_BUF_TRIG(GPP_A15, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SUS_ACK# */ + PAD_CFG_NF_BUF_TRIG(GPP_A16, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* CLKOUT_48 */ + PAD_NC(GPP_A17, NONE), /* GPIO */ + PAD_CFG_GPI_INT(GPP_A18, NONE, PLTRST, OFF), /* GPIO */ + _PAD_CFG_STRUCT(GPP_A19, 0xffffffff, 0xffffff00) /* RESERVED */ + PAD_NC(GPP_A20, NONE), /* GPIO */ + PAD_NC(GPP_A21, NONE), /* GPIO */ + PAD_NC(GPP_A22, NONE), /* GPIO */ + PAD_NC(GPP_A23, NONE), /* GPIO */ + PAD_CFG_GPO(GPP_B0, 1, DEEP), /* GPIO */ + PAD_CFG_GPO(GPP_B1, 1, DEEP), /* GPIO */ + PAD_NC(GPP_B2, NONE), /* GPIO */ + PAD_NC(GPP_B3, NONE), /* GPIO */ + _PAD_CFG_STRUCT(GPP_B4, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_CFG0_TRIG_OFF | PAD_CFG0_RX_POL_NONE | PAD_BUF(TX_RX_DISABLE) | 1, PAD_PULL(NONE)), /* GPIO */ + _PAD_CFG_STRUCT(GPP_B5, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_CFG0_TRIG_OFF | PAD_CFG0_RX_POL_NONE | PAD_BUF(TX_RX_DISABLE) | 1, PAD_PULL(NONE)), /* GPIO */ + _PAD_CFG_STRUCT(GPP_B6, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_CFG0_TRIG_OFF | PAD_CFG0_RX_POL_NONE | PAD_BUF(TX_RX_DISABLE) | 1, PAD_PULL(NONE)), /* GPIO */ + _PAD_CFG_STRUCT(GPP_B7, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_CFG0_TRIG_OFF | PAD_CFG0_RX_POL_NONE | PAD_BUF(TX_RX_DISABLE) | 1, PAD_PULL(NONE)), /* GPIO */ + _PAD_CFG_STRUCT(GPP_B8, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_CFG0_TRIG_OFF | PAD_CFG0_RX_POL_NONE | PAD_BUF(TX_RX_DISABLE) | 1, PAD_PULL(NONE)), /* GPIO */ + _PAD_CFG_STRUCT(GPP_B9, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_CFG0_TRIG_OFF | PAD_CFG0_RX_POL_NONE | PAD_BUF(TX_RX_DISABLE) | 1, PAD_PULL(NONE)), /* GPIO */ + _PAD_CFG_STRUCT(GPP_B10, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_CFG0_TRIG_OFF | PAD_CFG0_RX_POL_NONE | PAD_BUF(TX_RX_DISABLE) | 1, PAD_PULL(NONE)), /* GPIO */ + PAD_CFG_GPO(GPP_B11, 0, DEEP), /* GPIO */ + PAD_CFG_NF_BUF_TRIG(GPP_B12, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SLP_S0# */ + PAD_CFG_NF_BUF_TRIG(GPP_B13, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* PLTRST# */ + PAD_CFG_NF_BUF_TRIG(GPP_B14, NONE, PLTRST, NF1, TX_RX_DISABLE, OFF), /* SPKR */ + PAD_NC(GPP_B15, NONE), /* GPIO */ + PAD_NC(GPP_B16, NONE), /* GPIO */ + PAD_NC(GPP_B17, NONE), /* GPIO */ + PAD_NC(GPP_B18, NONE), /* GPIO */ + PAD_NC(GPP_B19, NONE), /* GPIO */ + PAD_CFG_GPO(GPP_B20, 1, PLTRST), /* GPIO */ + PAD_NC(GPP_B21, NONE), /* GPIO */ + PAD_NC(GPP_B22, NONE), /* GPIO */ + PAD_CFG_NF_BUF_TRIG(GPP_B23, NONE, DEEP, NF2, TX_RX_DISABLE, LEVEL), /* PCHHOT# */ + _PAD_CFG_STRUCT(GPP_C0, 0xffffffff, 0xffffff00) /* RESERVED */ + _PAD_CFG_STRUCT(GPP_C1, 0xffffffff, 0xffffff00) /* RESERVED */ + PAD_NC(GPP_C2, NONE), /* GPIO */ + _PAD_CFG_STRUCT(GPP_C3, 0xffffffff, 0xffffff00) /* RESERVED */ + _PAD_CFG_STRUCT(GPP_C4, 0xffffffff, 0xffffff00) /* RESERVED */ + PAD_CFG_GPO(GPP_C5, 1, DEEP), /* GPIO */ + _PAD_CFG_STRUCT(GPP_C6, 0xffffffff, 0xffffff00) /* RESERVED */ + _PAD_CFG_STRUCT(GPP_C7, 0xffffffff, 0xffffff00) /* RESERVED */ + PAD_CFG_GPI_INT(GPP_C8, NONE, PLTRST, OFF), /* GPIO */ + PAD_CFG_GPI_INT(GPP_C9, NONE, PLTRST, OFF), /* GPIO */ + PAD_CFG_GPI_INT(GPP_C10, NONE, PLTRST, OFF), /* GPIO */ + PAD_NC(GPP_C11, NONE), /* GPIO */ + PAD_NC(GPP_C12, NONE), /* GPIO */ + PAD_NC(GPP_C13, NONE), /* GPIO */ + PAD_NC(GPP_C14, NONE), /* GPIO */ + PAD_NC(GPP_C15, NONE), /* GPIO */ + PAD_NC(GPP_C16, NONE), /* GPIO */ + PAD_NC(GPP_C17, NONE), /* GPIO */ + PAD_NC(GPP_C18, NONE), /* GPIO */ + PAD_NC(GPP_C19, NONE), /* GPIO */ + PAD_NC(GPP_C20, NONE), /* GPIO */ + PAD_NC(GPP_C21, NONE), /* GPIO */ + PAD_CFG_GPI_ACPI_SMI(GPP_C22, 20K_PU, DEEP, NONE), /* GPIO */ + PAD_NC(GPP_C23, NONE), /* GPIO */ + PAD_NC(GPP_D0, NONE), /* GPIO */ + PAD_CFG_GPO(GPP_D1, 1, DEEP), /* GPIO */ + PAD_CFG_GPI_NMI(GPP_D2, 20K_PU, DEEP, EDGE_SINGLE, NONE), /* GPIO */ + PAD_NC(GPP_D3, NONE), /* GPIO */ + PAD_CFG_GPO(GPP_D4, 0, PLTRST), /* GPIO */ + PAD_NC(GPP_D5, NONE), /* GPIO */ + PAD_NC(GPP_D6, NONE), /* GPIO */ + PAD_NC(GPP_D7, NONE), /* GPIO */ + PAD_NC(GPP_D8, NONE), /* GPIO */ + PAD_NC(GPP_D9, NONE), /* GPIO */ + PAD_NC(GPP_D10, NONE), /* GPIO */ + PAD_NC(GPP_D11, NONE), /* GPIO */ + PAD_NC(GPP_D12, NONE), /* GPIO */ + PAD_NC(GPP_D13, NONE), /* GPIO */ + PAD_NC(GPP_D14, NONE), /* GPIO */ + PAD_NC(GPP_D15, NONE), /* GPIO */ + PAD_NC(GPP_D16, NONE), /* GPIO */ + PAD_NC(GPP_D17, NONE), /* GPIO */ + PAD_CFG_GPO(GPP_D18, 1, PLTRST), /* GPIO */ + PAD_CFG_GPO(GPP_D19, 1, PLTRST), /* GPIO */ + PAD_NC(GPP_D20, NONE), /* GPIO */ + PAD_CFG_GPO(GPP_D21, 0, DEEP), /* GPIO */ + PAD_CFG_GPI_INT(GPP_D22, NONE, PWROK, OFF), /* GPIO */ + PAD_NC(GPP_D23, NONE), /* GPIO */ + PAD_CFG_NF_BUF_TRIG(GPP_E0, NONE, DEEP, NF1, TX_DISABLE, OFF), /* SATAXPCIE0 */ + PAD_NC(GPP_E1, NONE), /* GPIO */ + PAD_NC(GPP_E2, NONE), /* GPIO */ + PAD_NC(GPP_E3, NONE), /* GPIO */ + PAD_NC(GPP_E4, NONE), /* GPIO */ + PAD_NC(GPP_E5, NONE), /* GPIO */ + PAD_CFG_GPI_NMI(GPP_E6, 20K_PU, PLTRST, EDGE_SINGLE, NONE), /* GPIO */ + PAD_NC(GPP_E7, NONE), /* GPIO */ + PAD_CFG_NF_BUF_TRIG(GPP_E8, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SATA_LED# */ + PAD_CFG_NF_BUF_TRIG(GPP_E9, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* USB_OC0# */ + PAD_CFG_NF_BUF_TRIG(GPP_E10, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* USB_OC1# */ + PAD_CFG_NF_BUF_TRIG(GPP_E11, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* USB_OC2# */ + PAD_CFG_NF_BUF_TRIG(GPP_E12, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* USB_OC3# */ + PAD_NC(GPP_F0, NONE), /* GPIO */ + PAD_NC(GPP_F1, NONE), /* GPIO */ + PAD_NC(GPP_F2, NONE), /* GPIO */ + PAD_NC(GPP_F3, NONE), /* GPIO */ + PAD_NC(GPP_F4, NONE), /* GPIO */ + PAD_CFG_GPI_APIC(GPP_F5, NONE, PLTRST), /* GPIO */ + PAD_CFG_GPO(GPP_F6, 1, PLTRST), /* GPIO */ + PAD_CFG_GPO(GPP_F7, 1, PLTRST), /* GPIO */ + PAD_CFG_GPO(GPP_F8, 1, PLTRST), /* GPIO */ + PAD_CFG_GPI_INT(GPP_F9, NONE, PLTRST, OFF), /* GPIO */ + PAD_CFG_NF_BUF_TRIG(GPP_F10, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SATA_SCLOCK */ + PAD_CFG_NF_BUF_TRIG(GPP_F11, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SATA_SLOAD */ + PAD_CFG_NF_BUF_TRIG(GPP_F12, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SATA_SDATAOUT1 */ + PAD_CFG_NF_BUF_TRIG(GPP_F13, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SATA_SDATAOUT2 */ + PAD_NC(GPP_F14, NONE), /* GPIO */ + PAD_CFG_NF_BUF_TRIG(GPP_F15, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* USB_OC4# */ + PAD_CFG_NF_BUF_TRIG(GPP_F16, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* USB_OC5# */ + PAD_NC(GPP_F17, NONE), /* GPIO */ + PAD_NC(GPP_F18, NONE), /* GPIO */ + PAD_NC(GPP_F19, NONE), /* GPIO */ + PAD_NC(GPP_F20, NONE), /* GPIO */ + PAD_NC(GPP_F21, NONE), /* GPIO */ + PAD_NC(GPP_F22, NONE), /* GPIO */ + PAD_CFG_GPO(GPP_F23, 0, PWROK), /* GPIO */ + PAD_CFG_GPI_INT(GPP_G0, NONE, DEEP, OFF), /* GPIO */ + PAD_CFG_GPI_INT(GPP_G1, NONE, DEEP, OFF), /* GPIO */ + PAD_CFG_GPI_INT(GPP_G2, NONE, DEEP, OFF), /* GPIO */ + PAD_CFG_GPI_INT(GPP_G3, NONE, DEEP, OFF), /* GPIO */ + PAD_NC(GPP_G4, NONE), /* GPIO */ + PAD_NC(GPP_G5, NONE), /* GPIO */ + PAD_NC(GPP_G6, NONE), /* GPIO */ + PAD_NC(GPP_G7, NONE), /* GPIO */ + PAD_NC(GPP_G8, NONE), /* GPIO */ + PAD_NC(GPP_G9, NONE), /* GPIO */ + PAD_NC(GPP_G10, NONE), /* GPIO */ + PAD_NC(GPP_G11, NONE), /* GPIO */ + PAD_CFG_GPI_INT(GPP_G12, NONE, PLTRST, OFF), /* GPIO */ + PAD_CFG_GPI_INT(GPP_G13, NONE, PLTRST, OFF), /* GPIO */ + PAD_CFG_GPI_INT(GPP_G14, NONE, PLTRST, OFF), /* GPIO */ + PAD_CFG_GPI_INT(GPP_G15, NONE, PLTRST, OFF), /* GPIO */ + PAD_CFG_GPI_INT(GPP_G16, NONE, PLTRST, OFF), /* GPIO */ + PAD_NC(GPP_G17, NONE), /* GPIO */ + PAD_CFG_NF_BUF_TRIG(GPP_G18, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* NMI# */ + PAD_CFG_NF_BUF_TRIG(GPP_G19, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SMI# */ + PAD_NC(GPP_G20, NONE), /* GPIO */ + PAD_NC(GPP_G21, NONE), /* GPIO */ + PAD_NC(GPP_G22, NONE), /* GPIO */ + PAD_NC(GPP_G23, NONE), /* GPIO */ + PAD_CFG_GPO(GPP_H0, 1, DEEP), /* GPIO */ + _PAD_CFG_STRUCT(GPP_H1, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_CFG0_TRIG_OFF | PAD_CFG0_RX_POL_NONE | PAD_BUF(TX_DISABLE) | 1, PAD_PULL(NONE)), /* GPIO */ + PAD_CFG_GPO(GPP_H2, 1, DEEP), /* GPIO */ + PAD_CFG_NF_BUF_TRIG(GPP_H3, NONE, DEEP, NF1, RX_DISABLE, OFF), /* SRCCLKREQ9# */ + _PAD_CFG_STRUCT(GPP_H4, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_CFG0_TRIG_OFF | PAD_CFG0_RX_POL_NONE | PAD_BUF(TX_DISABLE) | 1, PAD_PULL(NONE)), /* GPIO */ + PAD_CFG_GPO(GPP_H5, 1, PLTRST), /* GPIO */ + PAD_CFG_GPO(GPP_H6, 1, PLTRST), /* GPIO */ + PAD_CFG_GPO(GPP_H7, 1, PLTRST), /* GPIO */ + PAD_CFG_GPO(GPP_H8, 1, PLTRST), /* GPIO */ + PAD_CFG_GPO(GPP_H9, 1, PLTRST), /* GPIO */ + PAD_CFG_NF_BUF_TRIG(GPP_H10, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SML2CLK */ + PAD_CFG_NF_BUF_TRIG(GPP_H11, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SML2DATA */ + PAD_NC(GPP_H12, NONE), /* GPIO */ + PAD_CFG_NF_BUF_TRIG(GPP_H13, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SML3CLK */ + PAD_CFG_NF_BUF_TRIG(GPP_H14, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SML3DATA */ + PAD_NC(GPP_H15, NONE), /* GPIO */ + PAD_CFG_NF_BUF_TRIG(GPP_H16, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SML4CLK */ + PAD_CFG_NF_BUF_TRIG(GPP_H17, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SML4DATA */ + PAD_NC(GPP_H18, NONE), /* GPIO */ + PAD_CFG_GPO(GPP_H19, 1, PLTRST), /* GPIO */ + PAD_CFG_GPO(GPP_H20, 1, PLTRST), /* GPIO */ + PAD_CFG_GPO(GPP_H21, 1, PLTRST), /* GPIO */ + PAD_CFG_GPO(GPP_H22, 1, PLTRST), /* GPIO */ + PAD_CFG_GPO(GPP_H23, 1, PLTRST), /* GPIO */ + PAD_NC(GPD0, NONE), /* GPIO */ + PAD_NC(GPD1, NONE), /* GPIO */ + PAD_CFG_NF_BUF_TRIG(GPD2, NONE, PWROK, NF1, TX_RX_DISABLE, OFF), /* LAN_WAKE# */ + PAD_CFG_NF_BUF_TRIG(GPD3, NONE, PWROK, NF1, TX_RX_DISABLE, OFF), /* PWRBTN# */ + PAD_CFG_NF_BUF_TRIG(GPD4, NONE, PWROK, NF1, TX_RX_DISABLE, OFF), /* SLP_S3# */ + PAD_CFG_NF_BUF_TRIG(GPD5, NONE, PWROK, NF1, TX_RX_DISABLE, OFF), /* SLP_S4# */ + PAD_CFG_NF_BUF_TRIG(GPD6, NONE, PWROK, NF1, TX_RX_DISABLE, OFF), /* SLP_A# */ + _PAD_CFG_STRUCT(GPD7, PAD_FUNC(GPIO) | PAD_RESET(PWROK) | PAD_CFG0_TRIG_OFF | PAD_CFG0_RX_POL_NONE | PAD_BUF(TX_RX_DISABLE) | 1, PAD_PULL(NONE)), /* GPIO */ + PAD_CFG_NF_BUF_TRIG(GPD8, NONE, PWROK, NF1, TX_RX_DISABLE, OFF), /* SUSCLK */ + PAD_NC(GPD9, NONE), /* GPIO */ + PAD_NC(GPD10, NONE), /* GPIO */ + PAD_NC(GPD11, NONE), /* GPIO */ + PAD_CFG_NF_BUF_TRIG(GPP_I0, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* DDPB_HPD0 */ + PAD_CFG_NF_BUF_TRIG(GPP_I1, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* DDPC_HPD1 */ + PAD_CFG_NF_BUF_TRIG(GPP_I2, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* DDPD_HPD2 */ + PAD_CFG_NF_BUF_TRIG(GPP_I3, NONE, PLTRST, NF1, TX_RX_DISABLE, OFF), /* DDPE_HPD3 */ + PAD_NC(GPP_I4, NONE), /* GPIO */ + PAD_CFG_NF_BUF_TRIG(GPP_I5, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* DDPB_CTRLCLK */ + PAD_CFG_NF_BUF_TRIG(GPP_I6, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* DDPB_CTRLDATA */ + PAD_CFG_NF_BUF_TRIG(GPP_I7, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* DDPC_CTRLCLK */ + PAD_CFG_NF_BUF_TRIG(GPP_I8, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* DDPC_CTRLDATA */ + PAD_CFG_NF_BUF_TRIG(GPP_I9, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* DDPD_CTRLCLK */ + PAD_CFG_NF_BUF_TRIG(GPP_I10, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* DDPD_CTRLDATA */ }; @@ -233,15 +233,15 @@ static const struct pad_config early_gpio_table[] = { /* LPC */ -/* LAD0 */ _PAD_CFG_STRUCT(GPP_A1, 0x44000702, 0x00000000), -/* LAD1 */ _PAD_CFG_STRUCT(GPP_A2, 0x44000700, 0x00000000), -/* LAD2 */ _PAD_CFG_STRUCT(GPP_A3, 0x44000702, 0x00000000), -/* LAD3 */ _PAD_CFG_STRUCT(GPP_A4, 0x44000700, 0x00000000), -/* LFRAME# */ _PAD_CFG_STRUCT(GPP_A5, 0x44000700, 0x00000000), -/* SERIRQ */ _PAD_CFG_STRUCT(GPP_A6, 0x44000700, 0x00000000), -/* CLKRUN# */ _PAD_CFG_STRUCT(GPP_A8, 0x44000700, 0x00000000), -/* CLKOUT_LPC0 */ _PAD_CFG_STRUCT(GPP_A9, 0x44000700, 0x00000000), -/* CLKOUT_LPC1 */ _PAD_CFG_STRUCT(GPP_A10, 0x44000700, 0x00000000), + PAD_CFG_NF_BUF_TRIG(GPP_A1, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* LAD0 */ + PAD_CFG_NF_BUF_TRIG(GPP_A2, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* LAD1 */ + PAD_CFG_NF_BUF_TRIG(GPP_A3, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* LAD2 */ + PAD_CFG_NF_BUF_TRIG(GPP_A4, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* LAD3 */ + PAD_CFG_NF_BUF_TRIG(GPP_A5, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* LFRAME# */ + PAD_CFG_NF_BUF_TRIG(GPP_A6, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* SERIRQ */ + PAD_CFG_NF_BUF_TRIG(GPP_A8, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* CLKRUN# */ + PAD_CFG_NF_BUF_TRIG(GPP_A9, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* CLKOUT_LPC0 */ + PAD_CFG_NF_BUF_TRIG(GPP_A10, NONE, DEEP, NF1, TX_RX_DISABLE, OFF), /* CLKOUT_LPC1 */ }; #endif /* __ACPI__ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/35679 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idad7536854d4b1ae7dcf7934e81de438478fe059 Gerrit-Change-Number: 35679 Gerrit-PatchSet: 1 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/intelp2m: initial commit

by Maxim Polyakov (Code Review)

Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35643 ) Change subject: util/intelp2m: initial commit ...................................................................... util/intelp2m: initial commit intelp2m - Intel Pad to Macro A small utility for converting a pad configuration from an inteltool dump to a PAD_CFG_ * macro coreboot. Tested on Asroch-H110M-DVS motherboard [2] [1] https://github.com/maxpoliak/pch-pads-parser [2] https://review.coreboot.org/c/coreboot/+/33565 Change-Id: If3e3b523c4f63dc2f91e9ccd16934e3a1b6e21fa Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- A util/intelp2m/main.go A util/intelp2m/parser/parser.go A util/intelp2m/sunrise/dw.go A util/intelp2m/sunrise/macro.go 4 files changed, 871 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/35643/1 diff --git a/util/intelp2m/main.go b/util/intelp2m/main.go new file mode 100644 index 0000000..0881e10 --- /dev/null +++ b/util/intelp2m/main.go @@ -0,0 +1,129 @@ +package main + +import ( + "flag" + "fmt" + "os" +) + +import "./parser" + +// HdrInfoAdd - adds license header to file f +func HdrInfoAdd(f *os.File) { + f.WriteString(`/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +`) +} + +// CreateHdrFile - generates include file +func CreateHdrFile() (err error) { + hrdFile, err := os.Create("generate/gpio.h") + if err != nil { + fmt.Printf("Error!\n") + return err + } + defer hrdFile.Close() + + HdrInfoAdd(hrdFile) + hrdFile.WriteString(`#ifndef PCH_GPIO_H +#define PCH_GPIO_H + +#include <soc/gpe.h> +#include <soc/gpio.h> + +const struct pad_config *get_gpio_table(size_t *num); +const struct pad_config *get_early_gpio_table(size_t *num); + +#endif /* PCH_GPIO_H */ +`) + return nil +} + +// CreateGpioFile - generates gpio_raw.c file +// parser : parser data structure +// showRawDataFlag : raw data flag +// in the case when this flag is false, pad information will +// be create as macro +func CreateGpioFile(parser *parser.ParserData, showRawDataFlag bool) (err error) { + var name = "generate/gpio" + if showRawDataFlag { + name += "_raw" + } + name += ".c" + gpio, err := os.Create(name) + if err != nil { + fmt.Printf("Error!\n") + return err + } + defer gpio.Close() + + HdrInfoAdd(gpio) + gpio.WriteString(` +#include <commonlib/helpers.h> +#include "include/gpio.h" +`) + // Add the pads map to gpio.h file + parser.PadMapFprint(gpio, showRawDataFlag) + return nil +} + +// main +func main() { + // Command line arguments + wordPtr := flag.String("file", + "inteltool.log", + "the path to the inteltool log file") + dbgPtr := flag.Bool("dbg", false, "debug flag") + flag.Parse() + + fmt.Println("dbg:", *dbgPtr) + fmt.Println("file:", *wordPtr) + + var parser parser.ParserData + parser.DbgFlag = *dbgPtr + err := parser.Parse(*wordPtr) + if err != nil { + fmt.Printf("Parser: Error!\n") + os.Exit(1) + } + + // create dir for output files + err = os.MkdirAll("generate", os.ModePerm) + if err != nil { + fmt.Printf("Create a directory of generated files: Error!\n") + os.Exit(1) + } + + // gpio.h + err = CreateHdrFile() + if err != nil { + fmt.Printf("Create pch_gpio.h: Error!\n") + os.Exit(1) + } + + // gpio_raw.c + err = CreateGpioFile(&parser, true) + if err != nil { + fmt.Printf("Create gpio_raw.c: Error!\n") + os.Exit(1) + } + + // gpio.c with macros + err = CreateGpioFile(&parser, false) + if err != nil { + fmt.Printf("Create gpio.c: Error!\n") + os.Exit(1) + } +} diff --git a/util/intelp2m/parser/parser.go b/util/intelp2m/parser/parser.go new file mode 100644 index 0000000..b684653 --- /dev/null +++ b/util/intelp2m/parser/parser.go @@ -0,0 +1,189 @@ +package parser + +import ( + "bufio" + "fmt" + "os" + "strings" +) + +import "../sunrise" + +// padInfo - information about pad +// id : pad id string +// offset : the offset of the register address relative to the base +// function : the string that means the pad function +// dw0 : DW0 register value +// dw1 : DW1 register value +type padInfo struct { + id string + offset uint16 + function string + community uint8 + dw0 uint32 + dw1 uint32 +} + +// add - add information about pad to data structure +// line : string from inteltool log file +func (info *padInfo) add(line string) { + var val uint64 + if strings.HasPrefix(line, "----") { + // ------- GPIO Group GPP_A ------- + // ------- GPIO Community 0 ------- + // Add header to define GPIO group or community + info.function = line + return + } + // 0x0520: 0x0000003c44000600 GPP_B12 SLP_S0# + // 0x0438: 0xffffffffffffffff GPP_C7 RESERVED + fmt.Sscanf(line, + "0x%x: 0x%x %s %s", + &info.offset, + &val, + &info.id, + &info.function) + info.dw0 = uint32(val & 0xffffffff) + info.dw1 = uint32(val >> 32) +} + +// titleFprint - print GPIO group title to file +// gpio : gpio.c file descriptor +func (info *padInfo) titleFprint(gpio *os.File) { + fmt.Fprintf(gpio, "\n\t/* %s */\n", info.function) +} + +// reservedFprint - print reserved GPIO to file as comment +// gpio : gpio.c file descriptor +func (info *padInfo) reservedFprint(gpio *os.File) { + // small comment about reserved port + fmt.Fprintf(gpio, "\t/* %s - %s */\n", info.id, info.function) +} + +// padInfoRawFprint - print information about current pad to file using +// raw format: +// _PAD_CFG_STRUCT(GPP_F1, 0x84000502, 0x00003026), /* SATAXPCIE4 */ +// gpio : gpio.c file descriptor +func (info *padInfo) padInfoRawFprint(gpio *os.File) { + fmt.Fprintf(gpio, + "\t_PAD_CFG_STRUCT(%s, 0x%0.8x, 0x%0.8x), /* %s */\n", + info.id, + info.dw0, + (info.dw1 & 0xffffff00), // Interrupt Select - RO + info.function) +} + +// padInfoMacroFprint - print information about current pad to file using +// special macros: +// PAD_CFG_NF(GPP_F1, 20K_PU, PLTRST, NF1), /* SATAXPCIE4 */ +// gpio : gpio.c file descriptor +func (info *padInfo) padInfoMacroFprint(gpio *os.File) { + fmt.Fprintf(gpio, "\t/* %s - %s */\n\t%s\n", + info.id, + info.function, + sunrise.GetMacro(info.id, info.dw0, info.dw1)) +} + +// ParserData - global data +// padmap : pad info map +// dbgFlag : gebug flag, currently not used +type ParserData struct { + padmap []padInfo + DbgFlag bool +} + +// padInfoAdd - adds a new entry to pad info map +// line : string/line from the inteltool log file +// community : pads community number +func (parser *ParserData) padInfoAdd(line string, community uint8) { + pad := padInfo{community : community} + pad.add(line) + parser.padmap = append(parser.padmap, pad) +} + +// getCommunity - scans the string and returns the pads community number +// line : string from inteltool log file +// return +// community number +func (parser *ParserData) getCommunity(line string) uint8 { + var comm uint8 + fmt.Sscanf(line, "------- GPIO Community %d -------", &comm) + return comm +} + +// PadMapFprint - print pad info map to file +// gpio : gpio.c descriptor file +// raw : in the case when this flag is false, pad information will be print +// as macro +func (parser *ParserData) PadMapFprint(gpio *os.File, raw bool) { + gpio.WriteString("\n/* Pad configuration in ramstage */\n") + gpio.WriteString("static const struct pad_config gpio_table[] = {\n") + for _, pad := range parser.padmap { + switch pad.dw0 { + case 0: + pad.titleFprint(gpio) + case 0xffffffff: + pad.reservedFprint(gpio) + default: + if raw { + pad.padInfoRawFprint(gpio) + } else { + pad.padInfoMacroFprint(gpio) + } + } + } + gpio.WriteString("};\n") + + // FIXME: need to add early configuration + gpio.WriteString(`/* Early pad configuration in romstage. */ +static const struct pad_config early_gpio_table[] = { + /* TODO: Add early pad configuration */ +}; + +const struct pad_config *get_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(gpio_table); + return gpio_table; +} + +const struct pad_config *get_early_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(early_gpio_table); + return early_gpio_table; +} + +`) +} + +// Parse pads groupe information in the inteltool log file +// logFile : name of inteltool log file +// return +// err : error +func (parser *ParserData) Parse(logFile string) (err error) { + file, err := os.Open(logFile) + if err != nil { + return err + } + defer file.Close() + + // Read all lines from inteltool log file + fmt.Println("Parse IntelTool Log File...") + scanner := bufio.NewScanner(file) + var line string + var community uint8 = 0 + for scanner.Scan() { + line = scanner.Text() + // Use only the string that contains the GPP information + if !strings.Contains(line, "GPP_") && !strings.Contains(line, "GPD") { + // ------- GPIO Community 0 ------- + if strings.Contains(line, "Community") { + community = parser.getCommunity(line) + } else { + continue + } + } + parser.padInfoAdd(line, community) + } + fmt.Println("...done!") + return nil +} \ No newline at end of file diff --git a/util/intelp2m/sunrise/dw.go b/util/intelp2m/sunrise/dw.go new file mode 100644 index 0000000..f3623b0 --- /dev/null +++ b/util/intelp2m/sunrise/dw.go @@ -0,0 +1,198 @@ +package sunrise + +// Bit field constants for DW0 register +const ( + padRstCfgShift uint8 = 30 + padRstCfgMask uint32 = 0x3 << padRstCfgShift + + rxPadStateSelectShift uint8 = 29 + rxPadStateSelectMask uint32 = 0x1 << rxPadStateSelectShift + + rxRawOverrideTo1Shift uint8 = 28 + rxRawOverrideTo1Mask uint32 = 0x1 << rxRawOverrideTo1Shift + + rxLevelEdgeConfigurationShift uint8 = 25 + rxLevelEdgeConfigurationMask uint32 = 0x3 << rxLevelEdgeConfigurationShift + + rxInvertShift uint8 = 23 + rxInvertMask uint32 = 0x1 << rxInvertShift + + gpioInputRouteIOxApicShift uint8 = 20 + gpioInputRouteIOxApicMask uint32 = 0x1 << gpioInputRouteIOxApicShift + + gpioInputRouteSCIShift uint8 = 19 + gpioInputRouteSCIMask uint32 = 0x1 << gpioInputRouteSCIShift + + gpioInputRouteSMIShift uint8 = 18 + gpioInputRouteSMIMask uint32 = 0x1 << gpioInputRouteSMIShift + + gpioInputRouteNMIShift uint8 = 17 + gpioInputRouteNMIMask uint32 = 0x1 << gpioInputRouteNMIShift + + padModeShift uint8 = 10 + padModeMask uint32 = 0x7 << padModeShift + + gpioRxTxDisableShift uint8 = 8 + gpioRxTxDisableMask uint32 = 0x3 << gpioRxTxDisableShift + + gpioRxStateShift uint8 = 1 + gpioRxStateMask uint32 = 0x1 << gpioRxStateShift + + gpioTxStateMask uint32 = 0x1 +) + +// Bit field constants for DW1 register +const ( + termShift uint8 = 10 + termMask uint32 = 0xF << termShift + interruptSelectShift uint32 = 0xFF +) + +// Maximum numbers of the config DW register for Sunrise chipset +const ( + MaxDWNum = 2 +) + +// dwcfg - configuration data structure based on DW0/1 reg value +// reg : register value +// mask : bit fileds mask +type dwcfg struct { + reg [MaxDWNum]uint32 + mask [MaxDWNum]uint32 +} + +// getResetConfig - get Reset Configuration from PADRSTCFG field in PAD_CFG_DW0_GPx register +func (dw *dwcfg) getFieldVal(regNum uint8, mask uint32, shift uint8) uint8 { + if regNum < MaxDWNum { + dw.mask[regNum] |= mask + return uint8((dw.reg[regNum] & mask) >> shift) + } + return 0 +} + +// Check the mask of the new macro +// regNum : DW register number +// Returns true if the macro is generated correctly +func (dw *dwcfg) maskCheck(regNum uint8) bool { + if regNum >= MaxDWNum { + return false + } + + // Take into account the bits that are read-only + readonly := [MaxDWNum]uint32{ + (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfe, + 0xfffffc3f, + } + mask := ^(dw.mask[regNum] | readonly[regNum]) + return dw.reg[regNum]&mask == 0 +} + +// Fix Pad Reset Config field in mask for DW0 register +// Returns *dwcfg +func (dw *dwcfg) maskResetFix() *dwcfg { + dw.mask[0] |= padRstCfgMask + return dw +} + +// Fix RX Level/Edge Configuration field in mask for DW0 register +// Returns *dwcfg +func (dw *dwcfg) maskTrigFix() *dwcfg { + dw.mask[0] |= rxLevelEdgeConfigurationMask + return dw +} + +// getResetConfig - returns type reset source for corresponding pad +// PADRSTCFG field in PAD_CFG_DW0 register +// 00 = RSMRST#, 01 = DEEP#, 10 = PLTRST#, 11 = RSMRST# for GPDx pads +// and Reserved for others +func (dw *dwcfg) getResetConfig() uint8 { + return dw.getFieldVal(0, padRstCfgMask, padRstCfgShift) +} + +// getRXPadStateSelect - returns RX Pad State (RXINV) +// 0 = Raw RX pad state directly from RX buffer +// 1 = Internal RX pad state +func (dw *dwcfg) getRXPadStateSelect() uint8 { + return dw.getFieldVal(0, rxPadStateSelectMask, rxPadStateSelectShift) +} + +// getRXRawOverrideStatus - returns 1 if the selected pad state is being +// overridden to '1' (RXRAW1 field) +func (dw *dwcfg) getRXRawOverrideStatus() uint8 { + return dw.getFieldVal(0, rxRawOverrideTo1Mask, rxRawOverrideTo1Shift) +} + +// getRXLevelEdgeConfiguration - returns RX Level/Edge Configuration (RXEVCFG) +// 0h = Level, 1h = Edge, 2h = Drive '0', 3h = Reserved (implement as setting 0h) +func (dw *dwcfg) getRXLevelEdgeConfiguration() uint8 { + return dw.getFieldVal(0, rxLevelEdgeConfigurationMask, rxLevelEdgeConfigurationShift) +} + +// getRXLevelConfiguration - returns RX Invert state (RXINV) +// 1 - Inversion, 0 - No inversion +func (dw *dwcfg) getRXLevelConfiguration() bool { + return dw.getFieldVal(0, rxInvertMask, rxInvertShift) != 0 +} + +// getGPIOInputRouteIOxAPIC - returns 1 if the pad can be routed to cause +// peripheral IRQ when configured in GPIO input mode. +func (dw *dwcfg) getGPIOInputRouteIOxAPIC() bool { + return dw.getFieldVal(0, gpioInputRouteIOxApicMask, gpioInputRouteIOxApicShift) != 0 +} + +// getGPIOInputRouteSCI - returns 1 if the pad can be routed to cause SCI when +// configured in GPIO input mode. +func (dw *dwcfg) getGPIOInputRouteSCI() bool { + return dw.getFieldVal(0, gpioInputRouteSCIMask, gpioInputRouteSCIShift) != 0 +} + +// getGPIOInputRouteSMI - returns 1 if the pad can be routed to cause SMI when +// configured in GPIO input mode +func (dw *dwcfg) getGPIOInputRouteSMI() bool { + return dw.getFieldVal(0, gpioInputRouteSMIMask, gpioInputRouteSMIShift) != 0 +} + +// getGPIOInputRouteNMI - returns 1 if the pad can be routed to cause NMI when +// configured in GPIO input mode +func (dw *dwcfg) getGPIOInputRouteNMI() bool { + return dw.getFieldVal(0, gpioInputRouteNMIMask, gpioInputRouteNMIShift) != 0 +} + +// getPadMode - reutrns pad mode or one of the native functions +// 0h = GPIO control the Pad. +// 1h = native function 1, if applicable, controls the Pad +// 2h = native function 2, if applicable, controls the Pad +// 3h = native function 3, if applicable, controls the Pad +// 4h = enable GPIO blink/PWM capability if applicable +func (dw *dwcfg) getPadMode() uint8 { + return dw.getFieldVal(0, padModeMask, padModeShift) +} + +// getGPIORxTxDisableStatus - returns GPIO RX/TX buffer state (GPIORXDIS | GPIOTXDIS) +// 0 - both are enabled, 1 - TX Disable, 2 - RX Disable, 3 - both are disabled +func (dw *dwcfg) getGPIORxTxDisableStatus() uint8 { + return dw.getFieldVal(0, gpioRxTxDisableMask, gpioRxTxDisableShift) +} + +// getGPIORXState - returns GPIO RX State (GPIORXSTATE) +func (dw *dwcfg) getGPIORXState() uint8 { + return dw.getFieldVal(0, gpioRxStateMask, gpioRxStateShift) +} + +// getGPIOTXState - returns GPIO TX State (GPIOTXSTATE) +func (dw *dwcfg) getGPIOTXState() int { + return int(dw.getFieldVal(0, gpioTxStateMask, 0)) +} + +// getTermination - returns the pad termination state defines the different weak +// pull-up and pull-down settings that are supported by the buffer +// 0000 = none; 0010 = 5k PD; 0100 = 20k PD; 1010 = 5k PU; 1100 = 20k PU; +// 1111 = Native controller selected +func (dw *dwcfg) getTermination() uint8 { + return dw.getFieldVal(1, termMask, termShift) +} + +// getInterruptSelect - returns Interrupt Line number from the GPIO controller +func (dw *dwcfg) getInterruptSelect() uint8 { + return dw.getFieldVal(1, interruptSelectShift, 0) +} diff --git a/util/intelp2m/sunrise/macro.go b/util/intelp2m/sunrise/macro.go new file mode 100644 index 0000000..7489709 --- /dev/null +++ b/util/intelp2m/sunrise/macro.go @@ -0,0 +1,355 @@ +package sunrise + +import ( + "fmt" + "strconv" + "strings" +) + +// macro - contains macro information and methods +// padID : pad ID string +// str : macro string entirely +// dwcfg : configuration data structure +type macro struct { + padID string + str string + dwcfg +} + +// dw - returns dwcfg data configuration structure with PAD_CFG_DW0/1 register +// values +func (macro *macro) dw() *dwcfg { + return &macro.dwcfg +} + +// add a string to macro +func (macro *macro) add(str string) *macro { + macro.str += str + return macro +} + +// set a string in a macro instead of its previous contents +func (macro *macro) set(str string) *macro { + macro.str = str + return macro +} + +// get macro string +func (macro *macro) get() string { + return macro.str +} + +// Adds PAD Id to the macro as a new argument +// return: macro +func (macro *macro) id() *macro { + return macro.add(macro.padID) +} + +// Add separator to macro if needed +func (macro *macro) separator() *macro { + str := macro.get() + c := str[len(str)-1] + if c != '(' && c != '_' { + macro.add(", ") + } + return macro +} + +// Adds the PADRSTCFG parameter from DW0 to the macro as a new argument +// return: macro +func (macro *macro) rstsrc() *macro { + var resetSrc = map[uint8]string{ + 0x0: "PWROK", + 0x1: "DEEP", + 0x2: "PLTRST", + } + str, valid := resetSrc[macro.dw().getResetConfig()] + if !valid { + // Pad Reset Config field in DW0 register should implements 3h value + // as RSMRST for GPD pads group, but this value is reserved for other + // groups + if strings.Contains(macro.padID, "GPD") { + str = "RSMRST" + } else { + str = resetSrc[0] + fmt.Println("Warning:", macro.padID, "PADRSTCFG = 3h Reserved") + fmt.Println("It is implemented as setting 0h (PWROK) for Sunrise PCH") + } + } + return macro.separator().add(str) +} + +// Adds The Pad Termination (TERM) parameter from DW1 to the macro as a new argument +// return: macro +func (macro *macro) pull() *macro { + var pull = map[uint8]string{ + 0x0: "NONE", + 0x2: "5K_PD", + 0x4: "20K_PD", + 0x9: "1K_PU", + 0xa: "5K_PU", + 0xb: "2K_PU", + 0xc: "20K_PU", + 0xd: "667_PU", + 0xf: "NATIVE", + } + str, valid := pull[macro.dw().getTermination()] + if !valid { + str = "INVALID" + fmt.Println("Error", + macro.padID, + " invalid TERM value = ", + int(macro.dw().getTermination())) + } + return macro.separator().add(str) +} + +// Adds Pad GPO value to macro string as a new argument +// return: macro +func (macro *macro) val() *macro { + return macro.separator().add(strconv.Itoa(macro.dw().getGPIOTXState())) +} + +// Adds Pad GPO value to macro string as a new argument +// return: macro +func (macro *macro) trig() *macro { + var dw = macro.dw() + var trig = map[uint8]string{ + 0x0: "LEVEL", + 0x1: "EDGE_SINGLE", + 0x2: "OFF", + 0x3: "EDGE_BOTH", + } + return macro.separator().add(trig[dw.getRXLevelEdgeConfiguration()]) +} + +// Adds Pad Polarity Inversion Stage (RXINV) to macro string as a new argument +// return: macro +func (macro *macro) invert() *macro { + macro.separator() + if macro.dw().getRXLevelConfiguration() { + return macro.add("YES") + } + return macro.add("NONE") +} + +// Adds input/output buffer state +// return: macro +func (macro *macro) bufdis() *macro { + var buffDisStat = map[uint8]string{ + 0x0: "NO_DISABLE", // both buffers are enabled + 0x1: "TX_DISABLE", // output buffer is disabled + 0x2: "RX_DISABLE", // input buffer is disabled + 0x3: "TX_RX_DISABLE", // both buffers are disabled + } + state := macro.dw().getGPIORxTxDisableStatus() + return macro.separator().add(buffDisStat[state]) +} + +//Adds pad native function (PMODE) as a new argument +//return: macro +func (macro *macro) padfn() *macro { + nfnum := int(macro.dw().getPadMode()) + if nfnum != 0 { + return macro.separator().add("NF" + strconv.Itoa(nfnum)) + } + // GPIO used only for PAD_FUNC(x) macro + return macro.add("GPIO") +} + +// Adds suffix to GPI macro with arguments +func (macro *macro) addSuffixInput() { + dw := macro.dw() + isEdge := dw.getRXLevelEdgeConfiguration() + macro.add("_GPI") + switch { + case dw.getGPIOInputRouteNMI(): + // e.g. PAD_CFG_GPI_NMI(GPIO_24, UP_20K, DEEP, LEVEL, INVERT), + macro.add("_NMI").add("(").id().pull().rstsrc().trig().invert() + + case dw.getGPIOInputRouteIOxAPIC(): + // e.g. PAD_CFG_GPI_APIC(GPP_B3, NONE, PLTRST) + macro.add("_APIC") + if isEdge == 0 { + if dw.getRXLevelConfiguration() { + // e.g. PAD_CFG_GPI_APIC_INVERT(GPP_C5, DN_20K, DEEP), + macro.add("_INVERT") + } + macro.add("(").id().pull().rstsrc() + } else { + // PAD_CFG_GPI_APIC_IOS(GPP_C20, NONE, DEEP, LEVEL, INVERT, + // TxDRxE, DISPUPD) macro isn't used for this chipset. But, in + // the case when SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS is + // defined in the config, this macro allows you to set trig and + // invert parameters. + macro.add("_IOS").add("(").id().pull().rstsrc().trig().invert() + // IOStandby Config will be ignored for the Sunrise PCH, so use + // any values + macro.add(", TxDRxE, DISPUPD") + } + + case dw.getGPIOInputRouteSCI(): + + // e.g. PAD_CFG_GPI_SCI(GPP_B18, UP_20K, PLTRST, LEVEL, INVERT), + if (isEdge & 0x1) != 0 { + // e.g. PAD_CFG_GPI_ACPI_SCI(GPP_G2, NONE, DEEP, YES), + macro.add("_ACPI") + } + macro.add("_SCI").add("(").id().pull().rstsrc() + if (isEdge & 0x1) == 0 { + macro.trig() + } + macro.invert() + + case dw.getGPIOInputRouteSMI(): + if (isEdge & 0x1) != 0 { + // e.g. PAD_CFG_GPI_ACPI_SMI(GPP_I3, NONE, DEEP, YES), + macro.add("_ACPI") + } + macro.add("_SMI").add("(").id().pull().rstsrc().invert() + + case isEdge != 0: + // e.g. ISH_SPI_CS# + // PAD_CFG_GPI_INT(GPP_D9, NONE, PLTRST, EDGE), + macro.add("_INT").add("(").id().pull().rstsrc().trig() + + default: + // e.g. PAD_CFG_GPI(GPP_A7, NONE, DEEP), + macro.add("(").id().pull().rstsrc() + } +} + +// Adds suffix to GPO macro with arguments +func (macro *macro) addSuffixOutput() { + term := macro.dw().getTermination() + // FIXME: don`t understand how to get PAD_CFG_GPI_GPIO_DRIVER(..) + if term != 0 { + // e.g. PAD_CFG_TERM_GPO(GPP_B23, 1, DN_20K, DEEP), + macro.add("_TERM") + } + macro.add("_GPO").add("(").id().val() + if term != 0 { + macro.pull() + } + macro.rstsrc() + + // Fix mask for RX Level/Edge Configuration (RXEVCFG) + // See https://github.com/coreboot/coreboot/commit/3820e3c + macro.dw().maskTrigFix() +} + +const ( + rxDisable uint8 = 0x2 + txDisable uint8 = 0x1 +) + +// Set common macros macros if the standard ones can't define the values from +// the DW0/1 register +func (macro *macro) common() *macro { + macro.set("_PAD_CFG_STRUCT(").id(). + add(",\n\t\tPAD_FUNC(").padfn(). + add(") | PAD_RESET(").rstsrc().add(") |\n\t\t") + + var str string + var argument = true + switch dw := macro.dw(); { + case dw.getGPIOInputRouteIOxAPIC(): + str = "IOAPIC" + case dw.getGPIOInputRouteSCI(): + str = "SCI" + case dw.getGPIOInputRouteSMI(): + str = "SMI" + case dw.getGPIOInputRouteNMI(): + str = "NMI" + default: + argument = false + } + + if argument { + macro.add("PAD_IRQ_CFG(").add(str).trig().invert().add(")") + } else { + macro.add("PAD_CFG0_TRIG_").trig().add(" | PAD_CFG0_RX_POL_").invert() + } + + macro.add(" |\n\t\t").add("PAD_BUF(").bufdis().add(")") + if macro.dw().getGPIOTXState() != 0 { + macro.add(" | 1") + } + return macro.add(",\n\t\tPAD_PULL(").pull().add(")),") +} + +// Check created macro +func (macro *macro) check() { + if !macro.dw().maskCheck(0) { + macro.common() + // Debug message about this + fmt.Printf( + "\nCoreboot macros can't define the configuration for pad: %s\n", + macro.padID) + fmt.Printf("Use %s\n", macro.get()) + } +} + +// Gets base string of current macro +// return: string of macro +// error +func (macro *macro) generate(id string, dw0 uint32, dw1 uint32) string { + macro.dwcfg.reg[0] = dw0 + macro.dwcfg.reg[1] = dw1 + dw := &macro.dwcfg + + macro.set("PAD_CFG") + if dw.getPadMode() == 0 { + // GPIO + switch dw.getGPIORxTxDisableStatus() { + case rxDisable: + // GPI + macro.addSuffixInput() + + case txDisable: + // GPO + macro.addSuffixOutput() + + case rxDisable | txDisable: + // NC + macro.set("PAD_NC").add("(").id().pull() + // Fix mask for RX Level/Edge Configuration (RXEVCFG) + // and Pad Reset Config (PADRSTCFG) + // There is no need to check these fields if the pad + // is in the NC state + macro.dw().maskResetFix().maskTrigFix() + + default: + // In case the rule isn't found, a common macro is used + // to create the pad configuration + return macro.common().get() + } + } else { + isEdge := dw.getRXLevelEdgeConfiguration() != 0 + isTxRxBufDis := dw.getGPIORxTxDisableStatus() != 0 + // e.g. PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1) + macro.add("_NF") + if isEdge || isTxRxBufDis { + // e.g. PCHHOT# + // PAD_CFG_NF_BUF_TRIG(GPP_B23, 20K_PD, PLTRST, NF2, RX_DIS, OFF), + macro.add("_BUF_TRIG") + } + macro.add("(").id().pull().rstsrc().padfn() + if isEdge || isTxRxBufDis { + macro.bufdis().trig() + } + } + macro.add("),") + macro.check() + return macro.get() +} + +// GetMacro - get pad macro +// dw0 : DW0 config register value +// dw1 : DW1 config register value +// return: string of macro +// error +func GetMacro(id string, dw0 uint32, dw1 uint32) string { + macro := macro{padID : id} + return macro.generate(id, dw0, dw1) +} -- To view, visit https://review.coreboot.org/c/coreboot/+/35643 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If3e3b523c4f63dc2f91e9ccd16934e3a1b6e21fa Gerrit-Change-Number: 35643 Gerrit-PatchSet: 1 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-MessageType: newchange

1 day, 20 hours

9
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Change in coreboot[master]: soc/intel/common/block/cpu/car: Enable caching before FSP-T

by Gaggery Tsai (Code Review)

Gaggery Tsai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38252 ) Change subject: soc/intel/common/block/cpu/car: Enable caching before FSP-T ...................................................................... soc/intel/common/block/cpu/car: Enable caching before FSP-T This patch is required for Boot Guard enabled platform. Enable caching before entering FSP-T. TEST=Stitch boot guard ACM with signed KM and BPM && Enable FSP-T and boot all the way to the OS && Read MSR 0x13a and esnure boot guard verified boot and measured boot are enabled. Change-Id: Ie1def754f7b0024725638fcea481fd3273ef3d24 --- M src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/38252/1 diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S index 091fc4a..fd22903 100644 --- a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S +++ b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S @@ -35,6 +35,12 @@ cache_as_ram: post_code(0x21) + /* Enable caching */ + mov %cr0, %eax + and $~(CR0_CD | CR0_NW), %eax + invd + mov %eax, %cr0 + /* find fsp in cbfs */ lea fsp_name, %esi mov $1f, %esp -- To view, visit https://review.coreboot.org/c/coreboot/+/38252 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie1def754f7b0024725638fcea481fd3273ef3d24 Gerrit-Change-Number: 38252 Gerrit-PatchSet: 1 Gerrit-Owner: Gaggery Tsai <gaggery.tsai(a)intel.com> Gerrit-MessageType: newchange

2 days

10
25
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Change in coreboot[master]: *.asl: Don't define Devices by absolute path

by Arthur Heymans (Code Review)

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36600 ) Change subject: *.asl: Don't define Devices by absolute path ...................................................................... *.asl: Don't define Devices by absolute path Be consistent with the rest tree and set the scope first when defining devices. In general make the resulting code more readable as it avoid '^' symbols. Change-Id: I0b8dd33fac7cb1524d920b77e95c08b839157e8f Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/asus/h61m-cs/dsdt.asl M src/mainboard/asus/p8z77-m_pro/dsdt.asl M src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl M src/mainboard/lenovo/t440p/dsdt.asl M src/mainboard/msi/ms7707/dsdt.asl M src/mainboard/supermicro/x10slm-f/dsdt.asl M util/autoport/main.go 7 files changed, 42 insertions(+), 32 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/36600/1 diff --git a/src/mainboard/asus/h61m-cs/dsdt.asl b/src/mainboard/asus/h61m-cs/dsdt.asl index 0e1cc3a..a1a70c0 100644 --- a/src/mainboard/asus/h61m-cs/dsdt.asl +++ b/src/mainboard/asus/h61m-cs/dsdt.asl @@ -32,9 +32,11 @@ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> #include <southbridge/intel/common/acpi/sleepstates.asl> - Device (\_SB.PCI0) { - #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> - #include <drivers/intel/gma/acpi/default_brightness_levels.asl> - #include <southbridge/intel/bd82x6x/acpi/pch.asl> + Scope (\_SB) { + Device (PCI0) { + #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> + #include <drivers/intel/gma/acpi/default_brightness_levels.asl> + #include <southbridge/intel/bd82x6x/acpi/pch.asl> + } } } diff --git a/src/mainboard/asus/p8z77-m_pro/dsdt.asl b/src/mainboard/asus/p8z77-m_pro/dsdt.asl index 1c7a620..2c14e8f 100644 --- a/src/mainboard/asus/p8z77-m_pro/dsdt.asl +++ b/src/mainboard/asus/p8z77-m_pro/dsdt.asl @@ -34,10 +34,11 @@ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> #include <southbridge/intel/common/acpi/sleepstates.asl> - Device (\_SB.PCI0) - { - #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> - #include <drivers/intel/gma/acpi/default_brightness_levels.asl> - #include <southbridge/intel/bd82x6x/acpi/pch.asl> + Scope (\_SB) { + Device (PCI0) { + #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> + #include <drivers/intel/gma/acpi/default_brightness_levels.asl> + #include <southbridge/intel/bd82x6x/acpi/pch.asl> + } } } diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl b/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl index 7ee12a0..e54b01b 100644 --- a/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl +++ b/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl @@ -37,10 +37,11 @@ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> #include <southbridge/intel/common/acpi/sleepstates.asl> - Device (\_SB.PCI0) - { - #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> - #include <drivers/intel/gma/acpi/default_brightness_levels.asl> - #include <southbridge/intel/bd82x6x/acpi/pch.asl> + Scope (\_SB) { + Device (PCI0) { + #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> + #include <drivers/intel/gma/acpi/default_brightness_levels.asl> + #include <southbridge/intel/bd82x6x/acpi/pch.asl> + } } } diff --git a/src/mainboard/lenovo/t440p/dsdt.asl b/src/mainboard/lenovo/t440p/dsdt.asl index 82358aa..fd37f9e 100644 --- a/src/mainboard/lenovo/t440p/dsdt.asl +++ b/src/mainboard/lenovo/t440p/dsdt.asl @@ -37,10 +37,11 @@ #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl> #include <southbridge/intel/common/acpi/sleepstates.asl> - Device (\_SB.PCI0) - { - #include <northbridge/intel/haswell/acpi/haswell.asl> - #include <drivers/intel/gma/acpi/default_brightness_levels.asl> - #include <southbridge/intel/lynxpoint/acpi/pch.asl> + Scope (\_SB) { + Device (PCI0) { + #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> + #include <drivers/intel/gma/acpi/default_brightness_levels.asl> + #include <southbridge/intel/bd82x6x/acpi/pch.asl> + } } } diff --git a/src/mainboard/msi/ms7707/dsdt.asl b/src/mainboard/msi/ms7707/dsdt.asl index d3e3602..6df1394 100644 --- a/src/mainboard/msi/ms7707/dsdt.asl +++ b/src/mainboard/msi/ms7707/dsdt.asl @@ -32,10 +32,11 @@ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> #include <southbridge/intel/common/acpi/sleepstates.asl> - Device (\_SB.PCI0) - { - #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> - #include <drivers/intel/gma/acpi/default_brightness_levels.asl> - #include <southbridge/intel/bd82x6x/acpi/pch.asl> + Scope (\_SB) { + Device (PCI0) { + #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> + #include <drivers/intel/gma/acpi/default_brightness_levels.asl> + #include <southbridge/intel/bd82x6x/acpi/pch.asl> + } } } diff --git a/src/mainboard/supermicro/x10slm-f/dsdt.asl b/src/mainboard/supermicro/x10slm-f/dsdt.asl index 6ed19ee..8649a95 100644 --- a/src/mainboard/supermicro/x10slm-f/dsdt.asl +++ b/src/mainboard/supermicro/x10slm-f/dsdt.asl @@ -24,10 +24,11 @@ #include <southbridge/intel/common/acpi/sleepstates.asl> #include <cpu/intel/common/acpi/cpu.asl> - Device (\_SB.PCI0) - { - #include <northbridge/intel/haswell/acpi/haswell.asl> - #include <southbridge/intel/lynxpoint/acpi/pch.asl> - #include <drivers/intel/gma/acpi/default_brightness_levels.asl> + Scope (\_SB) { + Device (PCI0) { + #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> + #include <drivers/intel/gma/acpi/default_brightness_levels.asl> + #include <southbridge/intel/bd82x6x/acpi/pch.asl> + } } } diff --git a/util/autoport/main.go b/util/autoport/main.go index 03523a2..51d10cf 100644 --- a/util/autoport/main.go +++ b/util/autoport/main.go @@ -876,17 +876,20 @@ } dsdt.WriteString(` - Device (\_SB.PCI0) + Scope (\_SB) { + Device (PCI0) + { `) for _, x := range DSDTPCI0Includes { if x.Comment != "" { fmt.Fprintf(dsdt, "\t/* %s. */\n", x.Comment) } - fmt.Fprintf(dsdt, "\t\t#include <%s>\n", x.File) + fmt.Fprintf(dsdt, "\t\t\t#include <%s>\n", x.File) } dsdt.WriteString( - ` } + ` } + } } `) -- To view, visit https://review.coreboot.org/c/coreboot/+/36600 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b8dd33fac7cb1524d920b77e95c08b839157e8f Gerrit-Change-Number: 36600 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

2 days, 6 hours

4
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Change in coreboot[master]: crossgcc: Upgrade binutils to version 2.34

by HAOUAS Elyes (Code Review)

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38666 ) Change subject: crossgcc: Upgrade binutils to version 2.34 ...................................................................... crossgcc: Upgrade binutils to version 2.34 Change-Id: I0ad01e5da34c96fee6a9b1a63897a9fb28471c75 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M util/crossgcc/buildgcc R util/crossgcc/patches/binutils-2.34_as-ipxe.patch R util/crossgcc/patches/binutils-2.34_mips-gold.patch R util/crossgcc/patches/binutils-2.34_no-bfd-doc.patch D util/crossgcc/sum/binutils-2.33.1.tar.xz.cksum A util/crossgcc/sum/binutils-2.34.tar.xz.cksum 6 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/38666/1 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index ab2ea89..334c7b7 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -52,7 +52,7 @@ MPC_VERSION=1.1.0 GCC_VERSION=8.3.0 GCC_AUTOCONF_VERSION=2.69 -BINUTILS_VERSION=2.33.1 +BINUTILS_VERSION=2.34 GDB_VERSION=8.3.1 # Conflicting use of _ADR and _HID in coreboot tree needs diff --git a/util/crossgcc/patches/binutils-2.33.1_as-ipxe.patch b/util/crossgcc/patches/binutils-2.34_as-ipxe.patch similarity index 100% rename from util/crossgcc/patches/binutils-2.33.1_as-ipxe.patch rename to util/crossgcc/patches/binutils-2.34_as-ipxe.patch diff --git a/util/crossgcc/patches/binutils-2.33.1_mips-gold.patch b/util/crossgcc/patches/binutils-2.34_mips-gold.patch similarity index 100% rename from util/crossgcc/patches/binutils-2.33.1_mips-gold.patch rename to util/crossgcc/patches/binutils-2.34_mips-gold.patch diff --git a/util/crossgcc/patches/binutils-2.33.1_no-bfd-doc.patch b/util/crossgcc/patches/binutils-2.34_no-bfd-doc.patch similarity index 100% rename from util/crossgcc/patches/binutils-2.33.1_no-bfd-doc.patch rename to util/crossgcc/patches/binutils-2.34_no-bfd-doc.patch diff --git a/util/crossgcc/sum/binutils-2.33.1.tar.xz.cksum b/util/crossgcc/sum/binutils-2.33.1.tar.xz.cksum deleted file mode 100644 index 3a2f076..0000000 --- a/util/crossgcc/sum/binutils-2.33.1.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -06598868f5fa8efc98427dcb790d42c664f1a1a4 tarballs/binutils-2.33.1.tar.xz diff --git a/util/crossgcc/sum/binutils-2.34.tar.xz.cksum b/util/crossgcc/sum/binutils-2.34.tar.xz.cksum new file mode 100644 index 0000000..ea25ae8 --- /dev/null +++ b/util/crossgcc/sum/binutils-2.34.tar.xz.cksum @@ -0,0 +1 @@ +78f7ba4c0775ae75f5b906dc9af03d70b39b0785 tarballs/binutils-2.34.tar.xz -- To view, visit https://review.coreboot.org/c/coreboot/+/38666 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0ad01e5da34c96fee6a9b1a63897a9fb28471c75 Gerrit-Change-Number: 38666 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mb/*/romstage: Drop defines already set by raminit code

by Patrick Rudolph (Code Review)

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32070 Change subject: mb/*/romstage: Drop defines already set by raminit code ...................................................................... mb/*/romstage: Drop defines already set by raminit code Drop defines that are set by raminit code. Change-Id: Ica844a70b50486b4db3744cb123b3e4b8d5bedb0 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/mainboard/asrock/h81m-hds/romstage.c M src/mainboard/google/beltino/romstage.c M src/mainboard/google/butterfly/romstage.c M src/mainboard/google/link/romstage.c M src/mainboard/google/parrot/romstage.c M src/mainboard/google/slippy/variants/falco/romstage.c M src/mainboard/google/slippy/variants/leon/romstage.c M src/mainboard/google/slippy/variants/peppy/romstage.c M src/mainboard/google/slippy/variants/wolf/romstage.c M src/mainboard/google/stout/romstage.c M src/mainboard/intel/dcp847ske/romstage.c M src/mainboard/intel/emeraldlake2/romstage.c M src/mainboard/kontron/ktqm77/romstage.c M src/mainboard/lenovo/x220/romstage.c M src/mainboard/roda/rv11/variants/rv11/romstage.c M src/mainboard/roda/rv11/variants/rw11/romstage.c M src/mainboard/samsung/lumpy/romstage.c M src/mainboard/samsung/stumpy/romstage.c M src/mainboard/supermicro/x10slm-f/romstage.c 19 files changed, 0 insertions(+), 265 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/32070/1 diff --git a/src/mainboard/asrock/h81m-hds/romstage.c b/src/mainboard/asrock/h81m-hds/romstage.c index a917722..68ed658 100644 --- a/src/mainboard/asrock/h81m-hds/romstage.c +++ b/src/mainboard/asrock/h81m-hds/romstage.c @@ -74,20 +74,6 @@ { struct pei_data pei_data = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = HPET_ADDR, - .rcba = (uintptr_t)DEFAULT_RCBA, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .temp_mmio_base = 0xfed08000, - .system_type = 1, /* desktop/server */ - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xa0, 0x00, 0xa4, 0x00 }, .ec_present = 0, .dimm_channel0_disabled = 2, /* Disable DIMM 1 on channel 0. */ diff --git a/src/mainboard/google/beltino/romstage.c b/src/mainboard/google/beltino/romstage.c index 70a8c19..6417f0d 100644 --- a/src/mainboard/google/beltino/romstage.c +++ b/src/mainboard/google/beltino/romstage.c @@ -71,20 +71,6 @@ { struct pei_data pei_data = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = HPET_ADDR, - .rcba = (uintptr_t)DEFAULT_RCBA, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .temp_mmio_base = 0xfed08000, - .system_type = 5, /* ULT */ - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xa0, 0x00, 0xa4, 0x00 }, .ec_present = 0, // 0 = leave channel enabled diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c index d34b1e4..cbd9f3d 100644 --- a/src/mainboard/google/butterfly/romstage.c +++ b/src/mainboard/google/butterfly/romstage.c @@ -132,20 +132,6 @@ { struct pei_data pei_data_template = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, // 0 Mobile, 1 Desktop/Server - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xA0, 0x00,0xA4,0x00 }, .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, .ec_present = 1, diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index 66a503d0..6617dc4 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -127,20 +127,6 @@ { struct pei_data pei_data_template = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, // 0 Mobile, 1 Desktop/Server - .tseg_size = CONFIG_SMM_TSEG_SIZE, .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, .ec_present = 1, .ddr3lv_support = 1, diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c index 76a4b4b..d76d814 100644 --- a/src/mainboard/google/parrot/romstage.c +++ b/src/mainboard/google/parrot/romstage.c @@ -101,20 +101,6 @@ { struct pei_data pei_data_template = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, // 0 Mobile, 1 Desktop/Server - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xA0, 0x00,0xA4,0x00 }, .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, .ec_present = 1, diff --git a/src/mainboard/google/slippy/variants/falco/romstage.c b/src/mainboard/google/slippy/variants/falco/romstage.c index 25f8d27..2244119 100644 --- a/src/mainboard/google/slippy/variants/falco/romstage.c +++ b/src/mainboard/google/slippy/variants/falco/romstage.c @@ -109,20 +109,6 @@ { struct pei_data pei_data = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = HPET_ADDR, - .rcba = (uintptr_t)DEFAULT_RCBA, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .temp_mmio_base = 0xfed08000, - .system_type = 5, /* ULT */ - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xff, 0x00, 0xff, 0x00 }, .ec_present = 1, // 0 = leave channel enabled diff --git a/src/mainboard/google/slippy/variants/leon/romstage.c b/src/mainboard/google/slippy/variants/leon/romstage.c index b95c6e1..35345d0 100644 --- a/src/mainboard/google/slippy/variants/leon/romstage.c +++ b/src/mainboard/google/slippy/variants/leon/romstage.c @@ -106,20 +106,6 @@ { struct pei_data pei_data = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = HPET_ADDR, - .rcba = (uintptr_t)DEFAULT_RCBA, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .temp_mmio_base = 0xfed08000, - .system_type = 5, /* ULT */ - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xff, 0x00, 0xff, 0x00 }, .ec_present = 1, // 0 = leave channel enabled diff --git a/src/mainboard/google/slippy/variants/peppy/romstage.c b/src/mainboard/google/slippy/variants/peppy/romstage.c index e47edc7..a5de6c0 100644 --- a/src/mainboard/google/slippy/variants/peppy/romstage.c +++ b/src/mainboard/google/slippy/variants/peppy/romstage.c @@ -124,20 +124,6 @@ { struct pei_data pei_data = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = HPET_ADDR, - .rcba = (uintptr_t)DEFAULT_RCBA, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .temp_mmio_base = 0xfed08000, - .system_type = 5, /* ULT */ - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xff, 0x00, 0xff, 0x00 }, .ec_present = 1, // 0 = leave channel enabled diff --git a/src/mainboard/google/slippy/variants/wolf/romstage.c b/src/mainboard/google/slippy/variants/wolf/romstage.c index 3125efe..5a8c972 100644 --- a/src/mainboard/google/slippy/variants/wolf/romstage.c +++ b/src/mainboard/google/slippy/variants/wolf/romstage.c @@ -111,20 +111,7 @@ { struct pei_data pei_data = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = HPET_ADDR, - .rcba = (uintptr_t)DEFAULT_RCBA, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .temp_mmio_base = 0xfed08000, .system_type = 5, /* ULT */ - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xff, 0x00, 0xff, 0x00 }, .ec_present = 1, // 0 = leave channel enabled diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index 7539dd7..6e32145 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -137,20 +137,6 @@ { struct pei_data pei_data_template = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, // 0 Mobile, 1 Desktop/Server - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xA0, 0x00,0xA4,0x00 }, .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, .ec_present = 1, diff --git a/src/mainboard/intel/dcp847ske/romstage.c b/src/mainboard/intel/dcp847ske/romstage.c index 24ec912..2043cf6 100644 --- a/src/mainboard/intel/dcp847ske/romstage.c +++ b/src/mainboard/intel/dcp847ske/romstage.c @@ -29,20 +29,6 @@ { struct pei_data pei_data_template = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, // 0 Mobile, 1 Desktop/Server - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xa0, 0x00, 0xa2, 0x00 }, .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, .ec_present = 0, diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index 9a9fc24..8cd7ec2 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -94,20 +94,6 @@ { struct pei_data pei_data_template = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, // 0 Mobile, 1 Desktop/Server - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xa0, 0x00, 0xa4, 0x00 }, .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, .ec_present = 0, diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c index f778f96..e0f8954 100644 --- a/src/mainboard/kontron/ktqm77/romstage.c +++ b/src/mainboard/kontron/ktqm77/romstage.c @@ -80,20 +80,6 @@ { struct pei_data pei_data_template = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, /* 0 Mobile, 1 Desktop/Server */ - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xA0, 0x00,0xA4,0x00 }, .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, .ec_present = 1, diff --git a/src/mainboard/lenovo/x220/romstage.c b/src/mainboard/lenovo/x220/romstage.c index a5b0c81..d398d81 100644 --- a/src/mainboard/lenovo/x220/romstage.c +++ b/src/mainboard/lenovo/x220/romstage.c @@ -50,20 +50,6 @@ { struct pei_data pei_data_template = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, // 0 Mobile, 1 Desktop/Server - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xa0, 0x00,0xa2,0x00 }, .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, .ec_present = 1, diff --git a/src/mainboard/roda/rv11/variants/rv11/romstage.c b/src/mainboard/roda/rv11/variants/rv11/romstage.c index 685e942..df679f1 100644 --- a/src/mainboard/roda/rv11/variants/rv11/romstage.c +++ b/src/mainboard/roda/rv11/variants/rv11/romstage.c @@ -37,20 +37,6 @@ { const struct pei_data pei_data_template = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, // 0 Mobile, 1 Desktop/Server - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xA0, 0x00, 0xA4, 0x00 }, .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, .ec_present = 1, diff --git a/src/mainboard/roda/rv11/variants/rw11/romstage.c b/src/mainboard/roda/rv11/variants/rw11/romstage.c index 97d9d2b..56ac32c 100644 --- a/src/mainboard/roda/rv11/variants/rw11/romstage.c +++ b/src/mainboard/roda/rv11/variants/rw11/romstage.c @@ -66,20 +66,6 @@ { const struct pei_data pei_data_template = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, // 0 Mobile, 1 Desktop/Server - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xA0, 0xA2, 0xA4, 0xA6 }, .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, .ec_present = 1, diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index 1080689..29fe08b 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -156,20 +156,6 @@ { struct pei_data pei_data_template = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, // 0 Mobile, 1 Desktop/Server - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xa0, 0x00,0x00,0x00 }, .ts_addresses = { 0x30, 0x00, 0x00, 0x00 }, .ec_present = 1, diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index a8e28d6..510efbe 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -144,20 +144,6 @@ { struct pei_data pei_data_template = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, // 0 Mobile, 1 Desktop/Server - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xa0, 0x00,0xa4,0x00 }, .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, .ec_present = 0, diff --git a/src/mainboard/supermicro/x10slm-f/romstage.c b/src/mainboard/supermicro/x10slm-f/romstage.c index 84ad047..702e8bb 100644 --- a/src/mainboard/supermicro/x10slm-f/romstage.c +++ b/src/mainboard/supermicro/x10slm-f/romstage.c @@ -66,20 +66,6 @@ { struct pei_data pei_data = { .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = HPET_ADDR, - .rcba = (uintptr_t)DEFAULT_RCBA, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .temp_mmio_base = 0xfed08000, - .system_type = 1, /* desktop/server */ - .tseg_size = CONFIG_SMM_TSEG_SIZE, .spd_addresses = { 0xa0, 0xa2, 0xa4, 0xa6 }, .ec_present = 0, .ddr_refresh_2x = 1, -- To view, visit https://review.coreboot.org/c/coreboot/+/32070 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica844a70b50486b4db3744cb123b3e4b8d5bedb0 Gerrit-Change-Number: 32070 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

3 days, 2 hours

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Change in coreboot[master]: [WIP]crossgcc: Upgrade Python to version 3.8.2

by HAOUAS Elyes (Code Review)

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39148 ) Change subject: [WIP]crossgcc: Upgrade Python to version 3.8.2 ...................................................................... [WIP]crossgcc: Upgrade Python to version 3.8.2 Change-Id: I660994ece28f04d97de2fe3a074ebcf93fb4d2f4 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M util/crossgcc/buildgcc D util/crossgcc/sum/Python-3.8.1.tar.xz.cksum A util/crossgcc/sum/Python-3.8.2.tar.xz.cksum 3 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/39148/1 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index fef4b82..eb2e4e9 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -55,7 +55,7 @@ BINUTILS_VERSION=2.34 GDB_VERSION=8.3.1 IASL_VERSION=20200214 -PYTHON_VERSION=3.8.1 +PYTHON_VERSION=3.8.2 EXPAT_VERSION=2.2.9 # CLANG version number CLANG_VERSION=9.0.0 diff --git a/util/crossgcc/sum/Python-3.8.1.tar.xz.cksum b/util/crossgcc/sum/Python-3.8.1.tar.xz.cksum deleted file mode 100644 index e899a45..0000000 --- a/util/crossgcc/sum/Python-3.8.1.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -a48fd28a037c0bcd7b7fc4d914c023f584e910ed tarballs/Python-3.8.1.tar.xz diff --git a/util/crossgcc/sum/Python-3.8.2.tar.xz.cksum b/util/crossgcc/sum/Python-3.8.2.tar.xz.cksum new file mode 100644 index 0000000..1a0c784 --- /dev/null +++ b/util/crossgcc/sum/Python-3.8.2.tar.xz.cksum @@ -0,0 +1 @@ +5ae54baf26628a7ed74206650a31192e6d5c6f93 tarballs/Python-3.8.2.tar.xz -- To view, visit https://review.coreboot.org/c/coreboot/+/39148 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I660994ece28f04d97de2fe3a074ebcf93fb4d2f4 Gerrit-Change-Number: 39148 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

4 days, 4 hours

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coreboot-gerrit February 2020