Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Felix Held.
Fred Reitberger has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/67377 )
Change subject: soc/amd/mendocino/Kconfig: Enable APOB_HASH
......................................................................
soc/amd/mendocino/Kconfig: Enable APOB_HASH
Enable the APOB_HASH feature. This improves boot times by ~10ms.
BUG=b:193557430
TEST=boot to OS and verify boot time improvement
Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com>
Change-Id: I9628b67cd3206ffdbef23162c453dc183c69e5a5
---
M src/soc/amd/mendocino/Kconfig
1 file changed, 17 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/67377/1
diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig
index e9d549d..c114af6 100644
--- a/src/soc/amd/mendocino/Kconfig
+++ b/src/soc/amd/mendocino/Kconfig
@@ -57,7 +57,8 @@
select SOC_AMD_COMMON_BLOCK_ACPI_GPIO
select SOC_AMD_COMMON_BLOCK_ACPI_IVRS # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_AOAC
- select SOC_AMD_COMMON_BLOCK_APOB # TODO: Check if this is still correct
+ select SOC_AMD_COMMON_BLOCK_APOB
+ select SOC_AMD_COMMON_BLOCK_APOB_HASH
select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_DATA_FABRIC
select SOC_AMD_COMMON_BLOCK_GRAPHICS # TODO: Check if this is still correct
--
To view, visit https://review.coreboot.org/c/coreboot/+/67377
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9628b67cd3206ffdbef23162c453dc183c69e5a5
Gerrit-Change-Number: 67377
Gerrit-PatchSet: 1
Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-MessageType: newchange
Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Martin Roth, Felix Held.
Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Matt DeVillier, Martin Roth, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/67301
to look at the new patch set (#4).
Change subject: soc/amd/common/block/apob: Add hashed APOB support
......................................................................
soc/amd/common/block/apob: Add hashed APOB support
Comparing the APOB in RAM to flash takes a significant amount of time
(~11ms). Instead of comparing the entire APOB, use a fast hash function
and compare just that. Reading, hashing, and comparing the hash take
~70 microseconds.
BUG=b:193557430
TEST=compile and boot to OS in chausie with and without this option set
Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com>
Change-Id: I241968b115aaf41af63445410660bdd5199ceaba
---
M src/soc/amd/common/block/apob/Kconfig
M src/soc/amd/common/block/apob/apob_cache.c
2 files changed, 78 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/67301/4
--
To view, visit https://review.coreboot.org/c/coreboot/+/67301
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I241968b115aaf41af63445410660bdd5199ceaba
Gerrit-Change-Number: 67301
Gerrit-PatchSet: 4
Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com>
Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com>
Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-MessageType: newpatchset
Attention is currently required from: Maximilian Brune.
Hello build bot (Jenkins), Tim Wawrzynczak, Angel Pons, Lean Sheng Tan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/66545
to look at the new patch set (#11).
Change subject: mainboard/intel/adlrvp: Add ADL-S DDR5 UDIMM 1DPC
......................................................................
mainboard/intel/adlrvp: Add ADL-S DDR5 UDIMM 1DPC
TEST=Boot ADL-S DDR5 UDIMM 1DPC and check that ramstage is executing
Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com>
Change-Id: Ic1f62d6dd0b00d26f8c8a71b624ba5fba4c63774
---
M src/mainboard/intel/adlrvp/Kconfig
M src/mainboard/intel/adlrvp/Kconfig.name
M src/mainboard/intel/adlrvp/Makefile.inc
A src/mainboard/intel/adlrvp/devicetree_s.cb
A src/mainboard/intel/adlrvp/early_gpio_s.c
A src/mainboard/intel/adlrvp/gpio_s.c
M src/mainboard/intel/adlrvp/include/baseboard/variants.h
M src/mainboard/intel/adlrvp/memory.c
M src/mainboard/intel/adlrvp/ramstage.c
M src/mainboard/intel/adlrvp/romstage_fsp_params.c
A src/mainboard/intel/adlrvp/variants/adlrvp_s_ddr5_udimm_1dpc/overridetree.cb
11 files changed, 112 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/66545/11
--
To view, visit https://review.coreboot.org/c/coreboot/+/66545
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic1f62d6dd0b00d26f8c8a71b624ba5fba4c63774
Gerrit-Change-Number: 66545
Gerrit-PatchSet: 11
Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com>
Gerrit-MessageType: newpatchset
Attention is currently required from: Tarun Tuli, Subrata Banik, Tim Wawrzynczak, Kapil Porwal, Nick Vaccaro, Maximilian Brune.
Hello build bot (Jenkins), Tarun Tuli, Subrata Banik, Kapil Porwal, Nick Vaccaro, Angel Pons, Sridhar Siricilla,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/67078
to look at the new patch set (#13).
Change subject: mb/intel/adlrvp: Make SOC_INTEL_CSE_LITE_SKU configurable
......................................................................
mb/intel/adlrvp: Make SOC_INTEL_CSE_LITE_SKU configurable
Having a CSE Lite SKU's firmware is not necessarily depending
on the underlying hardware nor on having ChromeOS installed as
already mentioned in commit f3419b29b7e0 ("soc/intel/common/cse:
Drop dependency on CHROMEOS for SOC_INTEL_CSE_LITE_SKU").
For example RVP Boards sometimes have a CSE LITE FW, if Chrome board
related stuff is tested, which doesn't necessarily imply a ChromeOS
being used. It is therefore changed to an option, which can be
changed in menuconfig.
Change-Id: I4da7feab881ae43528c9d852cc842ac93fa9c6de
Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com>
---
M src/mainboard/intel/adlrvp/Kconfig
1 file changed, 30 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/67078/13
--
To view, visit https://review.coreboot.org/c/coreboot/+/67078
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I4da7feab881ae43528c9d852cc842ac93fa9c6de
Gerrit-Change-Number: 67078
Gerrit-PatchSet: 13
Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org>
Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com>
Gerrit-Attention: Subrata Banik <subratabanik(a)google.com>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>
Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com>
Gerrit-MessageType: newpatchset
Attention is currently required from: Dtrain Hsu, Ricky Chang.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67307 )
Change subject: mb/google/brya/var/kinox: Modify fan speed/duty table
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
Could we please separate this into 2 commits? One that update the acpigen_dptf.h file and the other for kinox overridetree ? Thanks.
--
To view, visit https://review.coreboot.org/c/coreboot/+/67307
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Id5e885b96624d5fc31f1d42e3582c3ab01e08458
Gerrit-Change-Number: 67307
Gerrit-PatchSet: 3
Gerrit-Owner: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com>
Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com>
Gerrit-Reviewer: John Su <john_su(a)compal.corp-partner.google.com>
Gerrit-Reviewer: Ricky Chang <rickytlchang(a)google.com>
Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com>
Gerrit-Attention: Ricky Chang <rickytlchang(a)google.com>
Gerrit-Comment-Date: Tue, 06 Sep 2022 16:05:35 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
Attention is currently required from: Jason Nien, Harsha B R, Himanshu Sahdev, Julius Werner, Martin Roth.
Vadim Bendebury has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67376 )
Change subject: guybrush: remove RO_GSCVD area from FMAP
......................................................................
Patch Set 2: Code-Review+2
--
To view, visit https://review.coreboot.org/c/coreboot/+/67376
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I896b871bf2ac64e334514b979add9b8ac2c43945
Gerrit-Change-Number: 67376
Gerrit-PatchSet: 2
Gerrit-Owner: Himanshu Sahdev <himanshu.sahdev(a)intel.com>
Gerrit-Reviewer: Harsha B R <harsha.b.r(a)intel.com>
Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com>
Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com>
Gerrit-Reviewer: Vadim Bendebury <vbendeb(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com>
Gerrit-Attention: Harsha B R <harsha.b.r(a)intel.com>
Gerrit-Attention: Himanshu Sahdev <himanshu.sahdev(a)intel.com>
Gerrit-Attention: Julius Werner <jwerner(a)chromium.org>
Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com>
Gerrit-Comment-Date: Tue, 06 Sep 2022 16:04:50 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Attention is currently required from: Bao Zheng, Jason Glenesk, Marshall Dawson, Matt DeVillier, Zheng Bao, Fred Reitberger, Felix Held.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67050 )
Change subject: soc/amd: Recalculate the field power in PSS table entry
......................................................................
Patch Set 6:
(1 comment)
File src/soc/amd/cezanne/acpi.c:
https://review.coreboot.org/c/coreboot/+/67050/comment/9b6f574c_b4c27e80
PS2, Line 198: power_in_mw
> I'm fine with keeping the code to match AGESA. […]
How about we change AGESA?
--
To view, visit https://review.coreboot.org/c/coreboot/+/67050
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ib43103cc62c18debea3fd2c23d9c30fb0ecd781b
Gerrit-Change-Number: 67050
Gerrit-PatchSet: 6
Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: Zheng Bao
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com>
Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-Attention: Zheng Bao
Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com>
Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Comment-Date: Tue, 06 Sep 2022 15:55:32 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Bao Zheng <fishbaozi(a)gmail.com>
Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org>
Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-MessageType: comment
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67263 )
Change subject: Makefile.inc: Fix build hang if file-size is run on empty string
......................................................................
Makefile.inc: Fix build hang if file-size is run on empty string
Currently, if for some reason, the file-size command is called on an
empty string, the build will hang waiting for stdin input to cat.
Since wc accepts a file, this cat was unnecessary anyway. Put the file
name in quotes so an empty string will result in calling wc on an
actual null file instead of just leaving the filename blank. This
results in an error, and will probably halt the build.
BUG=214790407
TEST=Build default build.
Signed-off-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com>
Change-Id: I3dacf1968ed897a8ebd00f95583c2f254a7fb55a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67263
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de>
---
M Makefile.inc
1 file changed, 24 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Felix Held: Looks good to me, approved
diff --git a/Makefile.inc b/Makefile.inc
index 0dd4864..0ed205f 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -153,7 +153,7 @@
int-eq=$(if $(filter 1,$(words $1)),$(strip $1),$(shell expr $(call _toint,$(word 1,$1)) = $(call _toint,$(word 2,$1))))
int-align=$(shell A=$(call _toint,$1) B=$(call _toint,$2); expr $$A + \( \( $$B - \( $$A % $$B \) \) % $$B \) )
int-align-down=$(shell A=$(call _toint,$1) B=$(call _toint,$2); expr $$A - \( $$A % $$B \) )
-file-size=$(strip $(shell cat $1 | wc -c))
+file-size=$(strip $(shell wc -c "$1" | cut -f 1 -d ' '))
tolower=$(shell echo '$1' | tr '[:upper:]' '[:lower:]')
toupper=$(shell echo '$1' | tr '[:lower:]' '[:upper:]')
ws_to_under=$(shell echo '$1' | tr ' \t' '_')
--
To view, visit https://review.coreboot.org/c/coreboot/+/67263
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I3dacf1968ed897a8ebd00f95583c2f254a7fb55a
Gerrit-Change-Number: 67263
Gerrit-PatchSet: 3
Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com>
Gerrit-MessageType: merged
Attention is currently required from: Martin L Roth, Matt DeVillier.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67263 )
Change subject: Makefile.inc: Fix build hang if file-size is run on empty string
......................................................................
Patch Set 2: Code-Review+2
--
To view, visit https://review.coreboot.org/c/coreboot/+/67263
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I3dacf1968ed897a8ebd00f95583c2f254a7fb55a
Gerrit-Change-Number: 67263
Gerrit-PatchSet: 2
Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com>
Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com>
Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-Comment-Date: Tue, 06 Sep 2022 15:48:38 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment