Himanshu Sahdev has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/67376 )
Change subject: guybrush: remove RO_GSCVD area from FMAP
......................................................................
guybrush: remove RO_GSCVD area from FMAP
This area relates to storing of AP RO verification information.
CONFIG_VBOOT_GSCVD is enabled by default for TPM_GOOGLE_TI50 and guybrush is
using TPM_GOOGLE_CR50.
Signed-off-by: Himanshu Sahdev <himanshu.sahdev(a)intel.com>
Change-Id: I896b871bf2ac64e334514b979add9b8ac2c43945
---
M src/mainboard/google/guybrush/chromeos.fmd
1 file changed, 14 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/67376/1
diff --git a/src/mainboard/google/guybrush/chromeos.fmd b/src/mainboard/google/guybrush/chromeos.fmd
index a6dbc2c..3875700 100644
--- a/src/mainboard/google/guybrush/chromeos.fmd
+++ b/src/mainboard/google/guybrush/chromeos.fmd
@@ -22,7 +22,6 @@
RW_LEGACY(CBFS)
WP_RO@8M 8M {
RO_VPD(PRESERVE) 16K
- RO_GSCVD 8K
RO_SECTION {
FMAP 2K
RO_FRID 64
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Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67137 )
Change subject: Add support for PSP NVRAM base addr and size
......................................................................
Patch Set 5: Code-Review+1
(1 comment)
File util/amdfwtool/amdfwtool.h:
https://review.coreboot.org/c/coreboot/+/67137/comment/031422b9_10c625ac
PS4, Line 279: uint64_t dest;
: size_t size;
> But this amd_fw_entry is for legacy XHCI,IMC firmware, not for PSP FW.
Done.
you are right.
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Hello build bot (Jenkins), Nico Huber, Martin L Roth, Jakub Czapiga, Paul Menzel, Angel Pons, Arthur Heymans, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62181
to look at the new patch set (#9).
Change subject: device/dram/ddr: Deduplicate enum spd_dimm_type_ddr{2,3,4}
......................................................................
device/dram/ddr: Deduplicate enum spd_dimm_type_ddr{2,3,4}
Change-Id: Iaffa84704d2a627394b2aae4d35d47d1358a2621
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
---
M src/device/dram/ddr2.c
M src/device/dram/ddr3.c
M src/device/dram/ddr4.c
M src/device/dram/spd.c
M src/include/device/dram/ddr2.h
M src/include/device/dram/ddr3.h
M src/include/device/dram/ddr4.h
M src/include/spd.h
M src/mainboard/scaleway/tagada/ramstage.c
M src/northbridge/intel/haswell/haswell_mrc/raminit.c
M src/northbridge/intel/sandybridge/raminit_mrc.c
M tests/lib/dimm_info_util-test.c
12 files changed, 106 insertions(+), 180 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/62181/9
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Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67304 )
Change subject: mb/google/skyrim: Enable ASPM for SD
......................................................................
Patch Set 1:
(1 comment)
File src/mainboard/google/skyrim/port_descriptors.c:
https://review.coreboot.org/c/coreboot/+/67304/comment/307f5e1a_188e552f
PS1, Line 31: 2
i'd use ASPM_L1 from enum dxio_aspm_type instead. same for the other two descriptors, but that's probably something for another patch
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Change subject: mb/google/zork: Enable AC wake
......................................................................
Patch Set 4: Code-Review+1
(1 comment)
Patchset:
PS4:
Will this be a full wake or a dark resume?
Was this also tested with the lid closed? i.e. Does the Ezkinil go back to sleep properly when inserting AC while the lid is closed?
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Change subject: mb/prodrive/hermes: Add libgfxinit support
......................................................................
Patch Set 5: Verified+1
(1 comment)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-158130):
https://review.coreboot.org/c/coreboot/+/62648/comment/a3dfa770_9adbec02
PS5, Line 8:
Possible unwrapped commit description (prefer a maximum 72 chars per line)
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Angel Pons has uploaded a new patch set (#5) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/62649 )
Change subject: mb/prodrive/hermes: Skip setting up ASPEED if primary is IGD
......................................................................
mb/prodrive/hermes: Skip setting up ASPEED if primary is IGD
This allows the payload to be usable on the Intel integrated graphic
device instead of the BMC depending on an eeprom variable.
TODO Angel: We also need to skip stuff when coreboot enumerates buses,
otherwise coreboot sets up VGA for the ASPEED instead of the Intel iGPU.
Change-Id: I24d9ebc2055dc246e7f257aa2f3853b22c8af370
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/mainboard/prodrive/hermes/mainboard.c
1 file changed, 45 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/62649/5
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Hello Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brya/variants/skolas: Set power limit values
......................................................................
mb/google/brya/variants/skolas: Set power limit values
Skolas board is based on Raptor Lake SoC, not Alder Lake. The code
change sets CPU power limit values as performance configuration based
on various Raptor Lake SoC SKUs as per the document #686872.
BUG=b:242869605
BRANCH=None
TEST=Built and tested on skolas board
Change-Id: Ieb3ca4ff77039412ef56da49e1b438f5e0b9db02
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com>
---
M src/mainboard/google/brya/variants/skolas/ramstage.c
M src/mainboard/google/brya/variants/skolas4es/ramstage.c
2 files changed, 26 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/67375/2
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