coreboot-gerrit June 2019

coreboot-gerrit@coreboot.org

1 participants
1454 discussions

Change in ...coreboot[master]: arch/mips: Make MIPS specific options depend on select ARCH_MIPS
by Arthur Heymans (Code Review) 07 Jul '19

07 Jul '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31312 Change subject: arch/mips: Make MIPS specific options depend on select ARCH_MIPS ...................................................................... arch/mips: Make MIPS specific options depend on select ARCH_MIPS Also don't define the default as this result in spurious lines in the .config. Change-Id: I7f35a5a9dcbc7b25b7806056e2b8e822fa94e428 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/mips/Kconfig M src/soc/imgtec/pistachio/Kconfig 2 files changed, 5 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/31312/1 diff --git a/src/arch/mips/Kconfig b/src/arch/mips/Kconfig index 9e51d9c..b8570c1 100644 --- a/src/arch/mips/Kconfig +++ b/src/arch/mips/Kconfig @@ -16,12 +16,12 @@ config ARCH_MIPS bool - default n + +if ARCH_MIPS config ARCH_BOOTBLOCK_MIPS bool default n - select ARCH_MIPS select BOOTBLOCK_CUSTOM select C_ENVIRONMENT_BOOTBLOCK @@ -36,3 +36,5 @@ config ARCH_RAMSTAGE_MIPS bool default n + +endif # if ARCH_MIPS diff --git a/src/soc/imgtec/pistachio/Kconfig b/src/soc/imgtec/pistachio/Kconfig index 333216d..40b63c3 100644 --- a/src/soc/imgtec/pistachio/Kconfig +++ b/src/soc/imgtec/pistachio/Kconfig @@ -15,6 +15,7 @@ # config CPU_IMGTEC_PISTACHIO + select ARCH_MIPS select ARCH_BOOTBLOCK_MIPS select ARCH_VERSTAGE_MIPS select ARCH_ROMSTAGE_MIPS -- To view, visit https://review.coreboot.org/c/coreboot/+/31312 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7f35a5a9dcbc7b25b7806056e2b8e822fa94e428 Gerrit-Change-Number: 31312 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

3 4

Change in ...coreboot[master]: payloads/coreinfo: Enable -Wmissing-prototypes
by Jacob Garber (Code Review) 07 Jul '19

07 Jul '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33866 Change subject: payloads/coreinfo: Enable -Wmissing-prototypes ...................................................................... payloads/coreinfo: Enable -Wmissing-prototypes Change-Id: I7ee9436ba71ceea35a35272291ea245c0b7c37c5 Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> --- M payloads/coreinfo/Makefile 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/33866/1 diff --git a/payloads/coreinfo/Makefile b/payloads/coreinfo/Makefile index 1a34dbe..38e5bac 100644 --- a/payloads/coreinfo/Makefile +++ b/payloads/coreinfo/Makefile @@ -83,7 +83,8 @@ LPCC := CC="$(CC)" $(LIBPAYLOAD_OBJ)/bin/lpgcc LPAS := AS="$(AS)" $(LIBPAYLOAD_OBJ)/bin/lpas -CFLAGS += -Wall -Wextra -Os -fno-builtin $(CFLAGS_$(ARCH-y)) $(INCLUDES) +CFLAGS += -Wall -Wextra -Wmissing-prototypes +CFLAGS += -Os -fno-builtin $(CFLAGS_$(ARCH-y)) $(INCLUDES) ifneq ($(strip $(HAVE_DOTCONFIG)),) include $(src)/.config -- To view, visit https://review.coreboot.org/c/coreboot/+/33866 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ee9436ba71ceea35a35272291ea245c0b7c37c5 Gerrit-Change-Number: 33866 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

3 4

Change in ...coreboot[master]: payloads/coreinfo: Make internal functions static
by Jacob Garber (Code Review) 07 Jul '19

07 Jul '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33865 Change subject: payloads/coreinfo: Make internal functions static ...................................................................... payloads/coreinfo: Make internal functions static These functions are only used in the files they are defined in, so they can be made static. Change-Id: Ic7f78912803cbdd1cb3a75f7f69f526739dab6e7 Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> --- M payloads/coreinfo/coreboot_module.c M payloads/coreinfo/multiboot_module.c 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/33865/1 diff --git a/payloads/coreinfo/coreboot_module.c b/payloads/coreinfo/coreboot_module.c index 66c2582..e56ce68 100644 --- a/payloads/coreinfo/coreboot_module.c +++ b/payloads/coreinfo/coreboot_module.c @@ -37,7 +37,7 @@ static int tables_good = 0; -int coreboot_module_redraw(WINDOW *win) +static int coreboot_module_redraw(WINDOW *win) { int row = 2; int i; diff --git a/payloads/coreinfo/multiboot_module.c b/payloads/coreinfo/multiboot_module.c index e394dbd..865561d 100644 --- a/payloads/coreinfo/multiboot_module.c +++ b/payloads/coreinfo/multiboot_module.c @@ -32,7 +32,7 @@ static int tables_good = 0; -int multiboot_module_redraw(WINDOW *win) +static int multiboot_module_redraw(WINDOW *win) { int row = 2; int i; -- To view, visit https://review.coreboot.org/c/coreboot/+/33865 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic7f78912803cbdd1cb3a75f7f69f526739dab6e7 Gerrit-Change-Number: 33865 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

3 2

Change in ...coreboot[master]: payloads/coreinfo: Enable -Wextra
by Jacob Garber (Code Review) 07 Jul '19

07 Jul '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33864 Change subject: payloads/coreinfo: Enable -Wextra ...................................................................... payloads/coreinfo: Enable -Wextra This enables extra useful warnings. Change-Id: I3d54988935c7df9ac0dc2f7aceb56fb720c9c4d1 Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> --- M payloads/coreinfo/Makefile 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/33864/1 diff --git a/payloads/coreinfo/Makefile b/payloads/coreinfo/Makefile index 50659d3..1a34dbe 100644 --- a/payloads/coreinfo/Makefile +++ b/payloads/coreinfo/Makefile @@ -83,7 +83,7 @@ LPCC := CC="$(CC)" $(LIBPAYLOAD_OBJ)/bin/lpgcc LPAS := AS="$(AS)" $(LIBPAYLOAD_OBJ)/bin/lpas -CFLAGS += -Wall -Werror -Os -fno-builtin $(CFLAGS_$(ARCH-y)) $(INCLUDES) +CFLAGS += -Wall -Wextra -Os -fno-builtin $(CFLAGS_$(ARCH-y)) $(INCLUDES) ifneq ($(strip $(HAVE_DOTCONFIG)),) include $(src)/.config -- To view, visit https://review.coreboot.org/c/coreboot/+/33864 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d54988935c7df9ac0dc2f7aceb56fb720c9c4d1 Gerrit-Change-Number: 33864 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

3 5

Change in ...coreboot[master]: payloads/coreinfo: Use correct integer types for loop indices
by Jacob Garber (Code Review) 07 Jul '19

07 Jul '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33863 Change subject: payloads/coreinfo: Use correct integer types for loop indices ...................................................................... payloads/coreinfo: Use correct integer types for loop indices Make sure that the type of the loop index matches the type of the upper bound. This fixes several -Wsign-compare warnings. Change-Id: I73a88355d86288609e03f7a6fcaec14dfedac203 Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> --- M payloads/coreinfo/coreboot_module.c M payloads/coreinfo/coreinfo.c M payloads/coreinfo/pci_module.c M payloads/coreinfo/timestamps_module.c 4 files changed, 13 insertions(+), 17 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/33863/1 diff --git a/payloads/coreinfo/coreboot_module.c b/payloads/coreinfo/coreboot_module.c index d294288..66c2582 100644 --- a/payloads/coreinfo/coreboot_module.c +++ b/payloads/coreinfo/coreboot_module.c @@ -195,7 +195,7 @@ /* Now, walk the tables. */ ptr += header->header_bytes; - for (i = 0; i < header->table_entries; i++) { + for (u32 j = 0; j < header->table_entries; j++) { struct cb_record *rec = (struct cb_record *)ptr; switch (rec->tag) { diff --git a/payloads/coreinfo/coreinfo.c b/payloads/coreinfo/coreinfo.c index 649bfde..b731abf 100644 --- a/payloads/coreinfo/coreinfo.c +++ b/payloads/coreinfo/coreinfo.c @@ -132,7 +132,7 @@ static void print_menu(void) { - int i, j; + int j; char menu[80]; char *ptr = menu; @@ -140,11 +140,11 @@ for (j = 0; j < SCREEN_X; j++) waddch(menuwin, ' '); - for (i = 0; i < ARRAY_SIZE(categories); i++) { + for (size_t i = 0; i < ARRAY_SIZE(categories); i++) { if (categories[i].count == 0) continue; - ptr += sprintf(ptr, "F%d: %s ", i + 1, categories[i].name); + ptr += sprintf(ptr, "F%zu: %s ", i + 1, categories[i].name); } mvwprintw(menuwin, 1, 0, menu); @@ -215,9 +215,9 @@ static void print_no_modules_selected(void) { - int height = getmaxy(stdscr), i; + int height = getmaxy(stdscr); - for (i = 0; i < ARRAY_SIZE(categories); i++) + for (size_t i = 0; i < ARRAY_SIZE(categories); i++) if (categories[i].count > 0) return; @@ -227,9 +227,7 @@ static int first_nonempty_category(void) { - int i; - - for (i = 0; i < ARRAY_SIZE(categories); i++) + for (size_t i = 0; i < ARRAY_SIZE(categories); i++) if (categories[i].count > 0) return i; return 0; @@ -268,7 +266,7 @@ if (key >= '1' && key <= '9') ch = key - '1'; - if (ch >= 0 && ch <= ARRAY_SIZE(categories)) { + if (ch >= 0 && (unsigned int)ch <= ARRAY_SIZE(categories)) { if (ch == ARRAY_SIZE(categories)) continue; if (categories[ch].count == 0) @@ -289,7 +287,7 @@ int main(void) { - int i, j; + int j; if (CONFIG(LP_USB)) usb_initialize(); @@ -310,7 +308,7 @@ werase(modwin); - for (i = 0; i < ARRAY_SIZE(categories); i++) { + for (size_t i = 0; i < ARRAY_SIZE(categories); i++) { for (j = 0; j < categories[i].count; j++) categories[i].modules[j]->init(); } diff --git a/payloads/coreinfo/pci_module.c b/payloads/coreinfo/pci_module.c index 3060161..cb53ed6 100644 --- a/payloads/coreinfo/pci_module.c +++ b/payloads/coreinfo/pci_module.c @@ -51,7 +51,7 @@ static int partition(struct pci_devices *list, int len) { - int val = list[len / 2].device; + pcidev_t val = list[len / 2].device; int index = 0; int i; diff --git a/payloads/coreinfo/timestamps_module.c b/payloads/coreinfo/timestamps_module.c index fe2d2b5..5468844 100644 --- a/payloads/coreinfo/timestamps_module.c +++ b/payloads/coreinfo/timestamps_module.c @@ -29,9 +29,7 @@ static const char *timestamp_name(uint32_t id) { - int i; - - for (i = 0; i < ARRAY_SIZE(timestamp_ids); i++) { + for (size_t i = 0; i < ARRAY_SIZE(timestamp_ids); i++) { if (timestamp_ids[i].id == id) return timestamp_ids[i].name; } @@ -184,7 +182,7 @@ prev_stamp = base_time; total_time = 0; - for (int i = 0; i < n_entries; i++) { + for (u32 i = 0; i < n_entries; i++) { uint64_t stamp; const struct timestamp_entry *tse = &timestamps->entries[i]; -- To view, visit https://review.coreboot.org/c/coreboot/+/33863 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73a88355d86288609e03f7a6fcaec14dfedac203 Gerrit-Change-Number: 33863 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

3 2

Change in ...coreboot[master]: payloads/coreinfo: Use fixed-width integers for cpuid
by Jacob Garber (Code Review) 07 Jul '19

07 Jul '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33862 Change subject: payloads/coreinfo: Use fixed-width integers for cpuid ...................................................................... payloads/coreinfo: Use fixed-width integers for cpuid This function executes the cpuid instruction, which takes a 32 bit input value (idx), and then stores output in eax, ebx, ecx, and edx, which are all 32 bit registers. Update the prototype to use fixed-width integers, and update all usage calls appropriately. Change-Id: I15876fa35628d3a505864fb49be4fdab1fd19f4a Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> --- M payloads/coreinfo/coreinfo.h M payloads/coreinfo/cpuinfo_module.c 2 files changed, 7 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/33862/1 diff --git a/payloads/coreinfo/coreinfo.h b/payloads/coreinfo/coreinfo.h index 073c5f9..03e59c9 100644 --- a/payloads/coreinfo/coreinfo.h +++ b/payloads/coreinfo/coreinfo.h @@ -27,8 +27,7 @@ int (*handle) (int); }; -extern void docpuid(int, unsigned long *, unsigned long *, unsigned long *, - unsigned long *); +extern void docpuid(uint32_t idx, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx); void print_module_title(WINDOW *win, const char *title); diff --git a/payloads/coreinfo/cpuinfo_module.c b/payloads/coreinfo/cpuinfo_module.c index 0ea2dfc..94379f3 100644 --- a/payloads/coreinfo/cpuinfo_module.c +++ b/payloads/coreinfo/cpuinfo_module.c @@ -85,7 +85,7 @@ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL }; -static unsigned long vendor; +static uint32_t vendor; static unsigned int cpu_khz; static void decode_flags(WINDOW *win, unsigned long reg, const char **flags, @@ -114,7 +114,7 @@ static void get_features(WINDOW *win, int *row) { - unsigned long eax, ebx, ecx, edx; + uint32_t eax, ebx, ecx, edx; int lrow = *row; wmove(win, lrow++, 1); @@ -150,12 +150,12 @@ static void do_name(WINDOW *win, int row) { char name[49], *p; - unsigned long eax, ebx, ecx, edx; - int i, t; + uint32_t eax, ebx, ecx, edx; + int t; p = name; - for (i = 0x80000002; i <= 0x80000004; i++) { + for (uint32_t i = 0x80000002; i <= 0x80000004; i++) { docpuid(i, &eax, &ebx, &ecx, &edx); if (eax == 0) @@ -176,7 +176,7 @@ static int cpuinfo_module_redraw(WINDOW *win) { - unsigned long eax, ebx, ecx, edx; + uint32_t eax, ebx, ecx, edx; unsigned int brand; char *vstr; int row = 2; -- To view, visit https://review.coreboot.org/c/coreboot/+/33862 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I15876fa35628d3a505864fb49be4fdab1fd19f4a Gerrit-Change-Number: 33862 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

3 2

Change in ...coreboot[master]: mb/google/hatch/var/kindred: Add Raydium touchscreen support
by David Wu (Code Review) 07 Jul '19

07 Jul '19

David Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33857 Change subject: mb/google/hatch/var/kindred: Add Raydium touchscreen support ...................................................................... mb/google/hatch/var/kindred: Add Raydium touchscreen support - Add Raydium controller - GPIO_COMM_0/1/2/3: Disable gpio community all PM configuration BUG=b:135728282 BRANCH=master TEST= 1. FW_NAME="kindred" emerge-hatch coreboot chromeos-bootimage 2. boot up on kindred DUT to check touchscreen device by evtest /dev/input/event3: Raydium Touchscreen 3. Raydium TS is working Change-Id: Id963300ab0dadcb78786c5a1328c2a4098a48a05 Signed-off-by: David Wu <david_wu(a)quanta.corp-partner.google.com> --- M src/mainboard/google/hatch/variants/kindred/overridetree.cb 1 file changed, 17 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/33857/1 diff --git a/src/mainboard/google/hatch/variants/kindred/overridetree.cb b/src/mainboard/google/hatch/variants/kindred/overridetree.cb index cc068bb..0ddcf43 100644 --- a/src/mainboard/google/hatch/variants/kindred/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kindred/overridetree.cb @@ -50,6 +50,12 @@ # Enable eMMC HS400 register "ScsEmmcHs400Enabled" = "1" + # GPIO community PM configuration + register "gpio_pm[COMM_0]" = "0" + register "gpio_pm[COMM_1]" = "0" + register "gpio_pm[COMM_2]" = "0" + register "gpio_pm[COMM_3]" = "0" + device domain 0 on device pci 15.0 on chip drivers/i2c/generic @@ -74,6 +80,17 @@ register "stop_off_delay_ms" = "5" device i2c 49 on end end + chip drivers/i2c/generic + register "hid" = ""RAYD0001"" + register "desc" = ""Raydium Touchscreen"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D16_IRQ)" + register "probed" = "1" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)" + register "reset_delay_ms" = "1" + register "reset_off_delay_ms" = "2" + register "has_power_resource" = "1" + device i2c 39 on end + end chip drivers/i2c/hid register "generic.hid" = ""GDIX0000"" register "generic.desc" = ""Goodix Touchscreen"" -- To view, visit https://review.coreboot.org/c/coreboot/+/33857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id963300ab0dadcb78786c5a1328c2a4098a48a05 Gerrit-Change-Number: 33857 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

5 8

Change in ...coreboot[master]: mb/google/hatch/var/kindred: Update ELAN GPIO/IRQ and add Synaptics T...
by David Wu (Code Review) 07 Jul '19

07 Jul '19

David Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33660 Change subject: mb/google/hatch/var/kindred: Update ELAN GPIO/IRQ and add Synaptics Touchpad ...................................................................... mb/google/hatch/var/kindred: Update ELAN GPIO/IRQ and add Synaptics Touchpad Update ELAN GPIO and IRQ setting and add Synaptics Touchpad BUG=b:132708463 BRANCH=None TEST=Verify ELAN/Synaptics touchpad is working fine. Change-Id: I883ce2e50ca5c6bd2b1ca76cbe24177055cc5d60 Signed-off-by: David Wu <david_wu(a)quanta.corp-partner.google.com> --- M src/mainboard/google/hatch/variants/kindred/gpio.c M src/mainboard/google/hatch/variants/kindred/overridetree.cb 2 files changed, 14 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/33660/1 diff --git a/src/mainboard/google/hatch/variants/kindred/gpio.c b/src/mainboard/google/hatch/variants/kindred/gpio.c index f6aeb69..ec72f0e 100644 --- a/src/mainboard/google/hatch/variants/kindred/gpio.c +++ b/src/mainboard/google/hatch/variants/kindred/gpio.c @@ -19,6 +19,10 @@ #include <commonlib/helpers.h> static const struct pad_config gpio_table[] = { + /* A21 : TRACKPAD_INT_ODL */ + PAD_CFG_GPI_APIC(GPP_A21, NONE, PLTRST, LEVEL, NONE), + /* D21 : GPP_D21 ==> NC */ + PAD_NC(GPP_D21, NONE), /* F3 : MEM_STRAP_3 */ PAD_CFG_GPI(GPP_F3, NONE, PLTRST), /* F10 : MEM_STRAP_2 */ diff --git a/src/mainboard/google/hatch/variants/kindred/overridetree.cb b/src/mainboard/google/hatch/variants/kindred/overridetree.cb index cc068bb..9edb167 100644 --- a/src/mainboard/google/hatch/variants/kindred/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kindred/overridetree.cb @@ -55,10 +55,19 @@ chip drivers/i2c/generic register "hid" = ""ELAN0000"" register "desc" = ""ELAN Touchpad"" - register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D21_IRQ)" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A21_IRQ)" register "wake" = "GPE0_DW0_21" device i2c 15 on end end + chip drivers/i2c/hid + register "generic.hid" = ""PNP0C50"" + register "generic.desc" = ""Synaptics Touchpad"" + register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_A21_IRQ)" + register "generic.wake" = "GPE0_DW2_27" + register "generic.probed" = "1" + register "hid_desc_reg_offset" = "0x20" + device i2c 0x2c on end + end end # I2C #0 device pci 15.1 on chip drivers/i2c/generic -- To view, visit https://review.coreboot.org/c/coreboot/+/33660 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I883ce2e50ca5c6bd2b1ca76cbe24177055cc5d60 Gerrit-Change-Number: 33660 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

6 17

Change in ...coreboot[master]: mb/google/hatch/variants/kindred: Enable eMMC support
by David Wu (Code Review) 07 Jul '19

07 Jul '19

David Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33618 Change subject: mb/google/hatch/variants/kindred: Enable eMMC support ...................................................................... mb/google/hatch/variants/kindred: Enable eMMC support Enable eMMC support for kindred. Cq-Depend: chromium:1666982 BUG=b:135464155 BRANCH=none TEST=Boot kindred onboard eMMC. Change-Id: I040af6da30313f8dd59e3ef910b290922e090cdc Signed-off-by: David Wu <david_wu(a)quanta.corp-partner.google.com> --- M src/mainboard/google/hatch/variants/kindred/gpio.c M src/mainboard/google/hatch/variants/kindred/overridetree.cb 2 files changed, 28 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/33618/1 diff --git a/src/mainboard/google/hatch/variants/kindred/gpio.c b/src/mainboard/google/hatch/variants/kindred/gpio.c index 43948a3..f6aeb69 100644 --- a/src/mainboard/google/hatch/variants/kindred/gpio.c +++ b/src/mainboard/google/hatch/variants/kindred/gpio.c @@ -23,6 +23,30 @@ PAD_CFG_GPI(GPP_F3, NONE, PLTRST), /* F10 : MEM_STRAP_2 */ PAD_CFG_GPI(GPP_F10, NONE, PLTRST), + /* F11 : EMMC_CMD ==> EMMC_CMD */ + PAD_CFG_NF(GPP_F11, NONE, DEEP, NF1), + /* F12 : EMMC_DATA0 ==> EMMC_DAT0 */ + PAD_CFG_NF(GPP_F12, NONE, DEEP, NF1), + /* F13 : EMMC_DATA1 ==> EMMC_DAT1 */ + PAD_CFG_NF(GPP_F13, NONE, DEEP, NF1), + /* F14 : EMMC_DATA2 ==> EMMC_DAT2 */ + PAD_CFG_NF(GPP_F14, NONE, DEEP, NF1), + /* F15 : EMMC_DATA3 ==> EMMC_DAT3 */ + PAD_CFG_NF(GPP_F15, NONE, DEEP, NF1), + /* F16 : EMMC_DATA4 ==> EMMC_DAT4 */ + PAD_CFG_NF(GPP_F16, NONE, DEEP, NF1), + /* F17 : EMMC_DATA5 ==> EMMC_DAT5 */ + PAD_CFG_NF(GPP_F17, NONE, DEEP, NF1), + /* F18 : EMMC_DATA6 ==> EMMC_DAT6 */ + PAD_CFG_NF(GPP_F18, NONE, DEEP, NF1), + /* F19 : EMMC_DATA7 ==> EMMC_DAT7 */ + PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1), + /* F20 : EMMC_RCLK ==> EMMC_RCLK */ + PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1), + /* F21 : EMMC_CLK ==> EMMC_CLK */ + PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1), + /* F22 : EMMC_RESET# ==> EMMC_RST_L */ + PAD_CFG_NF(GPP_F22, NONE, DEEP, NF1), /* H19 : MEM_STRAP_0 */ PAD_CFG_GPI(GPP_H19, NONE, PLTRST), /* H22 : MEM_STRAP_1 */ diff --git a/src/mainboard/google/hatch/variants/kindred/overridetree.cb b/src/mainboard/google/hatch/variants/kindred/overridetree.cb index 562bb8b..cc068bb 100644 --- a/src/mainboard/google/hatch/variants/kindred/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kindred/overridetree.cb @@ -47,6 +47,9 @@ # GPIO for SD card detect register "sdcard_cd_gpio" = "vSD3_CD_B" + # Enable eMMC HS400 + register "ScsEmmcHs400Enabled" = "1" + device domain 0 on device pci 15.0 on chip drivers/i2c/generic @@ -143,6 +146,7 @@ device i2c 1a on end end end #I2C #4 + device pci 1a.0 on end # eMMC device pci 1e.3 on chip drivers/spi/acpi register "name" = ""CRFP"" -- To view, visit https://review.coreboot.org/c/coreboot/+/33618 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I040af6da30313f8dd59e3ef910b290922e090cdc Gerrit-Change-Number: 33618 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

5 6

Change in ...coreboot[master]: arch/x86/acpi: Add os.asl
by Richard Spiegel (Code Review) 07 Jul '19

07 Jul '19

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33652 Change subject: arch/x86/acpi: Add os.asl ...................................................................... arch/x86/acpi: Add os.asl As time goes by, newer OS come into the market, requiring modification on ACPI code to identify the new OS. With this new file, a single file will need maintenance in the future, and it will fix the code for every board including this file. It assumes OSVR is already declared elsewhere within the ACPI code. BUG=b:none. TEST=Tested later with padmelon board. Change-Id: I87200cafdafcf078db16c95463a86c3e9105cea6 Signed-off-by: Richard Spiegel <richard.spiegel(a)silverbackltd.com> --- A src/arch/x86/acpi/os.asl 1 file changed, 135 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/33652/1 diff --git a/src/arch/x86/acpi/os.asl b/src/arch/x86/acpi/os.asl new file mode 100644 index 0000000..17fe29e --- /dev/null +++ b/src/arch/x86/acpi/os.asl @@ -0,0 +1,135 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 Silverback, Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* Assumes OSVR is declared elsewhere */ +Method(OSFL, 0, NotSerialized) +{ + If(LNotEqual(OSVR, Ones)) + { + Return(OSVR) + } + Store(0x03, OSVR) + If(CondRefOf(\_OSI, Local0)) + { + If(_OSI("Windows 2001")) + { + Store(0x04, OSVR) + } + If(_OSI("Windows 2001.1")) + { + Store(0x05, OSVR) + } + If(_OSI("FreeBSD")) + { + Store(0x06, OSVR) + } + If(_OSI("HP-UX")) + { + Store(0x07, OSVR) + } + If(_OSI("OpenVMS")) + { + Store(0x08, OSVR) + } + If(_OSI("Windows 2001 SP1")) + { + Store(0x09, OSVR) + } + If(_OSI("Windows 2001 SP2")) + { + Store(0x0A, OSVR) + } + If(_OSI("Windows 2001 SP3")) + { + Store(0x0B, OSVR) + } + If(_OSI("Windows 2006")) + { + Store(0x0C, OSVR) + } + If(_OSI("Windows 2006 SP1")) + { + Store(0x0D, OSVR) + } + If(_OSI("Windows 2009")) + { + Store(0x0E, OSVR) + } + If(_OSI("Windows 2012")) + { + Store(0x0F, OSVR) + } + If(_OSI("Windows 2013")) + { + Store(0x10, OSVR) + } + } + Else + { + Store (\_OS, local0) + If(SCPM(local0, "Microsoft Windows NT")) + { + Store(Zero, OSVR) + } + If(SCPM(local0, "Microsoft Windows")) + { + Store(One, OSVR) + } + If(SCPM(local0, "Microsoft WindowsME: Millennium Edition")) + { + Store(0x02, OSVR) + } + If(SCPM(local0, "Linux")) + { + Store(0x03, OSVR) + } + If(SCPM(local0, "FreeBSD")) + { + Store(0x06, OSVR) + } + If(SCPM(local0, "HP-UX")) + { + Store(0x07, OSVR) + } + If(SCPM(local0, "OpenVMS")) + { + Store(0x08, OSVR) + } + } + Return(OSVR) +} + +/* String compare */ +Method(SCPM, 2, Serialized) +{ + If(LLess(SizeOf(Arg0), SizeOf(Arg1))) + { + Return(Zero) + } + Add(SizeOf(Arg0), One, Local0) + Name(BUF0, Buffer(Local0){}) + Name(BUF1, Buffer(Local0){}) + Store(Arg0, BUF0) + Store(Arg1, BUF1) + While(Local0) + { + Decrement(Local0) + If(LNotEqual(DerefOf(Index(BUF0, Local0)), DerefOf(Index(BUF1, Local0)))) + { + Return(Zero) + } + } + Return(One) +} -- To view, visit https://review.coreboot.org/c/coreboot/+/33652 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87200cafdafcf078db16c95463a86c3e9105cea6 Gerrit-Change-Number: 33652 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-MessageType: newchange

4 11

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit June 2019