Name of user not set #1002358 has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33235
Change subject: cpu/x86/smm/ STM Support ......................................................................
cpu/x86/smm/ STM Support
SMI Handler modifications needed to setup the STM data structures
Change-Id: I935cd5a8bc0bf293240324c2e3a04a655d44c69f --- M src/cpu/x86/smm/smm_module_handler.c M src/cpu/x86/smm/smm_module_loader.c M src/cpu/x86/smm/smm_stub.S M src/include/cpu/x86/smm.h 4 files changed, 92 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/33235/1
diff --git a/src/cpu/x86/smm/smm_module_handler.c b/src/cpu/x86/smm/smm_module_handler.c index f9af965..26ddd66 100644 --- a/src/cpu/x86/smm/smm_module_handler.c +++ b/src/cpu/x86/smm/smm_module_handler.c @@ -18,6 +18,15 @@ #include <cpu/x86/smm.h> #include <rmodule.h>
+#include <cpu/x86/msr.h> +#include <cpu/x86/cache.h> + +#include <security/intel/stm/StmApi.h> +#include <security/intel/stm/StmPlatformResource.h> +#include <arch/acpi.h> +#include <lib.h> +#include <security/intel/stm/SmmStm.h> + #if IS_ENABLED(CONFIG_SPI_FLASH_SMM) #include <spi-generic.h> #endif @@ -116,6 +125,10 @@ return base; }
+#ifdef CONFIG_STM + static uint32_t MsegInit = 0; // used for STM/mseg initialization +#endif + asmlinkage void smm_handler_start(void *arg) { const struct smm_module_params *p; @@ -123,7 +136,16 @@ int cpu; uintptr_t actual_canary; uintptr_t expected_canary; +#ifdef CONFIG_STM + int MsegInit2 = 1; // assume that the STM has been set
+ /* this initialzation strategy works on the assumption that all + * processors will enter SMM at generally the same time. + * If a single processor lags then a locking/counting scheme will + * need to be implemented. */ + if (MsegInit == 0) + MsegInit2 = 0; +#endif p = arg; runtime = p->runtime; cpu = p->cpu; @@ -140,9 +162,33 @@ "Invalid CPU number assigned in SMM stub: %d\n", cpu); return; } +#ifdef CONFIG_STM + if (MsegInit == 0) { + + /* Initialize the MSEG base address for each logical processor + * and indicate that there is an STM present */ + msr_t InitMseg; + msr_t MsegChk; + + InitMseg.lo = smm_runtime->mseg | IA32_SMM_MONITOR_VALID; + InitMseg.hi = 0; + + wrmsr(IA32_SMM_MONITOR_CTL_MSR_INDEX, InitMseg); + + MsegChk = rdmsr(IA32_SMM_MONITOR_CTL_MSR_INDEX); + console_init(); + + printk(BIOS_DEBUG, "MSEG Initialized (%d) 0x%08x 0x%08x\n", + cpu, MsegChk.hi, MsegChk.lo); + } + +#endif
/* Are we ok to execute the handler? */ if (!smi_obtain_lock()) { +#ifdef CONFIG_STM + void *smbase = (void *) smm_runtime->smbase; +#endif /* For security reasons we don't release the other CPUs * until the CPU with the lock is actually done */ while (smi_handler_status == SMI_LOCKED) { @@ -150,13 +196,35 @@ ".byte 0xf3, 0x90\n" /* PAUSE */ ); } +#ifdef CONFIG_STM + if (MsegInit2 == 0) { + + /* Setup an SMM Descriptor for this logical processor */ + SetupSmmDescriptor(smbase, smm_runtime->save_state_size, cpu, smm_runtime->start32_offset); + MsegInit2 = 1; + } +#endif + wbinvd(); return; }
+#ifdef CONFIG_STM + + if (MsegInit == 0) { + void *smbase = (void *) smm_runtime->smbase; + + AddResourcesCmd(); + + /* Setup an SMM Descriptor for this logical processor */ + + SetupSmmDescriptor(smbase, smm_runtime->save_state_size, cpu, + smm_runtime->start32_offset); + MsegInit = 1; // flag that we are done + wbinvd(); // force the tables to memory + } +#endif smi_backup_pci_address(); - console_init(); - printk(BIOS_SPEW, "\nSMI# #%d\n", cpu);
/* Allow drivers to initialize variables in SMM context. */ diff --git a/src/cpu/x86/smm/smm_module_loader.c b/src/cpu/x86/smm/smm_module_loader.c index 6c16645..4f15fdd 100644 --- a/src/cpu/x86/smm/smm_module_loader.c +++ b/src/cpu/x86/smm/smm_module_loader.c @@ -18,6 +18,7 @@ #include <cpu/x86/smm.h> #include <cpu/x86/cache.h> #include <console/console.h> +#include <security/intel/stm/SmmStm.h>
#define FXSAVE_SIZE 512
@@ -268,6 +269,9 @@ stub_params->fxsave_area_size = FXSAVE_SIZE; stub_params->runtime.smbase = (uintptr_t)smbase; stub_params->runtime.save_state_size = params->per_cpu_save_state_size; + + /* mseg is after the smi handler */ + stub_params->runtime.mseg = (uint32_t) params->stack_top;
/* Initialize the APIC id to CPU number table to be 1:1 */ for (i = 0; i < params->num_concurrent_stacks; i++) @@ -354,7 +358,13 @@
/* Stacks start at the top of the region. */ base = smram; + +#ifdef CONFIG_STM + base += size - CONFIG_MSEG_SIZE; // take out the mseg +#else base += size; +#endif + params->stack_top = base;
/* SMM module starts at offset SMM_DEFAULT_SIZE with the load alignment diff --git a/src/cpu/x86/smm/smm_stub.S b/src/cpu/x86/smm/smm_stub.S index 59eb27c..3817424 100644 --- a/src/cpu/x86/smm/smm_stub.S +++ b/src/cpu/x86/smm/smm_stub.S @@ -46,6 +46,11 @@ .long 0 save_state_size: .long 0 +mseg: +.long 0 +/* allows the STM to bring up SMM in 32-bit mode*/ +start32_offset: +.long smm_trampoline32 - _start /* apic_to_cpu_num is a table mapping the default APIC id to CPU num. If the * APIC id is found at the given index, the contiguous CPU number is index * into the table. */ @@ -92,6 +97,10 @@ /* gdt selector 0x10, flat data segment */ .word 0xffff, 0x0000 .byte 0x00, 0x93, 0xcf, 0x00 + + /* gdt selector 0x18 tr segment */ + .word 0xffff, 0x0000 + .byte 0x00, 0x8b, 0x80, 0x00 smm_relocate_gdt_end:
.align 4 diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index 576449d..b2d7445 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -512,6 +512,9 @@ struct smm_runtime { u32 smbase; u32 save_state_size; + u32 mseg; + /* used so that the STM can start the SMI handler in 32bit mode */ + u32 start32_offset; /* The apic_id_to_cpu provides a mapping from APIC id to CPU number. * The CPU number is indicated by the index into the array by matching * the default APIC id and value at the index. The stub loader
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33235 )
Change subject: cpu/x86/smm/ STM Support ......................................................................
Patch Set 1:
(7 comments)
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_module_handler.c File src/cpu/x86/smm/smm_module_handler.c:
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_module_handler.c... PS1, Line 179: console_init(); code indent should use tabs where possible
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_module_handler.c... PS1, Line 179: console_init(); please, no space before tabs
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_module_handler.c... PS1, Line 179: console_init(); please, no spaces at the start of a line
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_module_handler.c... PS1, Line 203: SetupSmmDescriptor(smbase, smm_runtime->save_state_size, cpu, smm_runtime->start32_offset); line over 80 characters
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_module_handler.c... PS1, Line 220: SetupSmmDescriptor(smbase, smm_runtime->save_state_size, cpu, trailing whitespace
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_module_loader.c File src/cpu/x86/smm/smm_module_loader.c:
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_module_loader.c@... PS1, Line 272: trailing whitespace
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_module_loader.c@... PS1, Line 272: please, no spaces at the start of a line
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33235 )
Change subject: cpu/x86/smm/ STM Support ......................................................................
Patch Set 1:
(3 comments)
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_module_handler.c File src/cpu/x86/smm/smm_module_handler.c:
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_module_handler.c... PS1, Line 139: #ifdef CONFIG_STM no need for preprocessor
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_module_handler.c... PS1, Line 178: MsegChk = rdmsr(IA32_SMM_MONITOR_CTL_MSR_INDEX); delay the printk after console_init(). So you don't need to call it twice.
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_stub.S File src/cpu/x86/smm/smm_stub.S:
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_stub.S@51 PS1, Line 51: /* allows the STM to bring up SMM in 32-bit mode*/ seems unsued
Name of user not set #1002358 has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33235 )
Change subject: cpu/x86/smm/ STM Support ......................................................................
Patch Set 1:
(3 comments)
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_module_handler.c File src/cpu/x86/smm/smm_module_handler.c:
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_module_handler.c... PS1, Line 139: #ifdef CONFIG_STM
no need for preprocessor
Done
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_module_handler.c... PS1, Line 178: MsegChk = rdmsr(IA32_SMM_MONITOR_CTL_MSR_INDEX);
delay the printk after console_init(). So you don't need to call it twice.
Done
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_stub.S File src/cpu/x86/smm/smm_stub.S:
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_stub.S@51 PS1, Line 51: /* allows the STM to bring up SMM in 32-bit mode*/
seems unsued
This variable is consumed in smm_handler_start as part of the STM/MSEG initialization
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33235
to look at the new patch set (#2).
Change subject: cpu/x86/smm: Add STM Support ......................................................................
cpu/x86/smm: Add STM Support
SMI Handler modifications needed to setup the SMM descriptors used by the STM during its initialization
Change-Id: I935cd5a8bc0bf293240324c2e3a04a655d44c69f Signed-off-by: Eugene D Myers cedarhouse1@comcast.net --- M src/cpu/x86/smm/smm_module_handler.c M src/cpu/x86/smm/smm_module_loader.c M src/cpu/x86/smm/smm_stub.S M src/include/cpu/x86/smm.h 4 files changed, 91 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/33235/2
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33235 )
Change subject: cpu/x86/smm: Add STM Support ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/#/c/33235/2/src/cpu/x86/smm/smm_module_handler.c File src/cpu/x86/smm/smm_module_handler.c:
https://review.coreboot.org/#/c/33235/2/src/cpu/x86/smm/smm_module_handler.c... PS2, Line 168: if(smm_runtime->mseg != 0) { // has the STM been loaded space required before the open parenthesis '('
https://review.coreboot.org/#/c/33235/2/src/cpu/x86/smm/smm_module_handler.c... PS2, Line 170: InitMseg.lo = smm_runtime->mseg | IA32_SMM_MONITOR_VALID; line over 80 characters
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33235
to look at the new patch set (#3).
Change subject: cpu/x86/smm: Add STM Support ......................................................................
cpu/x86/smm: Add STM Support
SMI Handler modifications needed to setup the SMM descriptors used by the STM during its initialization
Change-Id: I935cd5a8bc0bf293240324c2e3a04a655d44c69f Signed-off-by: Eugene D Myers cedarhouse1@comcast.net --- M src/cpu/x86/smm/smm_module_handler.c M src/cpu/x86/smm/smm_module_loader.c M src/cpu/x86/smm/smm_stub.S M src/include/cpu/x86/smm.h 4 files changed, 92 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/33235/3
Name of user not set #1002358 has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33235 )
Change subject: cpu/x86/smm: Add STM Support ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/#/c/33235/2/src/cpu/x86/smm/smm_module_handler.c File src/cpu/x86/smm/smm_module_handler.c:
https://review.coreboot.org/#/c/33235/2/src/cpu/x86/smm/smm_module_handler.c... PS2, Line 168: if(smm_runtime->mseg != 0) { // has the STM been loaded
space required before the open parenthesis '('
Done
https://review.coreboot.org/#/c/33235/2/src/cpu/x86/smm/smm_module_handler.c... PS2, Line 170: InitMseg.lo = smm_runtime->mseg | IA32_SMM_MONITOR_VALID;
line over 80 characters
Done
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33235 )
Change subject: cpu/x86/smm: Add STM Support ......................................................................
Patch Set 6:
(14 comments)
https://review.coreboot.org/#/c/33235/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/33235/6//COMMIT_MSG@9 PS6, Line 9: setup The verb is spelled with a space: set up.
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_handler.c File src/cpu/x86/smm/smm_module_handler.c:
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_handler.c... PS6, Line 144: * If a single processor lags then a locking/counting scheme will Please check the coding style on how to format concise multi-line comments.
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_handler.c... PS6, Line 195: Setup Set up
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_handler.c... PS6, Line 198: printk(BIOS_DEBUG, "MSEG Initialized (%d) 0x%08x 0x%08x\n", Same debug message?
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_handler.c... PS6, Line 211: Setup Set up
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_loader.c File src/cpu/x86/smm/smm_module_loader.c:
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_loader.c@... PS6, Line 165: : /* : * The stub setup code assumes it is completely co Gerrit syntax highlighting bug?
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_loader.c@... PS6, Line 179: void *fxsave_area) Same debug message again?
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_loader.c@... PS6, Line 195: e num Set up
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_loader.c@... PS6, Line 211: Set up
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_loader.c@... PS6, Line 211: : /* Need a minimum stack size and alignment. */ : if (params->per_cpu_stack_size <= SMM_MINIMUM_STACK_SIZE || : (params->per_cpu_stack_size & 3) != 0) : return -1; : : smm_stub_loc = NULL; : smm_stub_size = rmodule_memory_size(&smm_stub); : stub_entry_offset = rmodule_entr Can this somehow be refactored into a separate function?
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_loader.c@... PS6, Line 274: #ifdef CONFIG_STM Please use C code to check the Kconfig variable, if possible.
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_loader.c@... PS6, Line 277: //STM not configured - no mseg Space after //.
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_stub.S File src/cpu/x86/smm/smm_stub.S:
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_stub.S@51 PS6, Line 51: /* allows the STM to bring up SMM in 32-bit mode*/ Please add a space before */.
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_stub.S@277 PS6, Line 277: Please add a space.
ron minnich has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33235 )
Change subject: cpu/x86/smm: Add STM Support ......................................................................
Patch Set 6:
Eugene, if you're willing, I'd like to help you get this into Coreboot Normal Form. It's not that there's anything terribly wrong with this code, it just needs to be reshaped a tad. Can I help?
Name of user not set #1002358 has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33235 )
Change subject: cpu/x86/smm: Add STM Support ......................................................................
Patch Set 6:
(14 comments)
Patch Set 6:
Eugene, if you're willing, I'd like to help you get this into Coreboot Normal Form. It's not that there's anything terribly wrong with this code, it just needs to be reshaped a tad. Can I help?
Thanks for the offer. The next patch set will non-CamelCase and it should be in line with the coreboot coding standard. So, wait until I put out the next patchset as it is 99% done.
https://review.coreboot.org/#/c/33235/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/33235/6//COMMIT_MSG@9 PS6, Line 9: setup
The verb is spelled with a space: set up.
Done
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_handler.c File src/cpu/x86/smm/smm_module_handler.c:
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_handler.c... PS6, Line 144: * If a single processor lags then a locking/counting scheme will
Please check the coding style on how to format concise multi-line comments.
Done
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_handler.c... PS6, Line 195: Setup
Set up
Done
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_handler.c... PS6, Line 198: printk(BIOS_DEBUG, "MSEG Initialized (%d) 0x%08x 0x%08x\n",
Same debug message?
The MSEG (MSR) and SMM Descriptor has to be initialized on a per-thread (logical processor) basis. The duplication is a result of an earlier review that suggested that console_init be called only once. My earlier implementation resulted in console_init being called twice.
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_handler.c... PS6, Line 211: Setup
Set up
Done
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_loader.c File src/cpu/x86/smm/smm_module_loader.c:
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_loader.c@... PS6, Line 165: : /* : * The stub setup code assumes it is completely co
Gerrit syntax highlighting bug?
Done
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_loader.c@... PS6, Line 179: void *fxsave_area)
Same debug message again?
I'm confused, this is not the added code.
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_loader.c@... PS6, Line 195: e num
Set up
This seems to be a bug not related to the contribution.
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_loader.c@... PS6, Line 211:
Set up
Same here.
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_loader.c@... PS6, Line 211: : /* Need a minimum stack size and alignment. */ : if (params->per_cpu_stack_size <= SMM_MINIMUM_STACK_SIZE || : (params->per_cpu_stack_size & 3) != 0) : return -1; : : smm_stub_loc = NULL; : smm_stub_size = rmodule_memory_size(&smm_stub); : stub_entry_offset = rmodule_entr
Can this somehow be refactored into a separate function?
Same here, it seems to be a bug.
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_loader.c@... PS6, Line 274: #ifdef CONFIG_STM
Please use C code to check the Kconfig variable, if possible.
Done
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_module_loader.c@... PS6, Line 277: //STM not configured - no mseg
Space after //.
Done
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_stub.S File src/cpu/x86/smm/smm_stub.S:
https://review.coreboot.org/#/c/33235/1/src/cpu/x86/smm/smm_stub.S@51 PS1, Line 51: /* allows the STM to bring up SMM in 32-bit mode*/
This variable is consumed in smm_handler_start as part of the STM/MSEG initialization
Done
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_stub.S File src/cpu/x86/smm/smm_stub.S:
https://review.coreboot.org/#/c/33235/6/src/cpu/x86/smm/smm_stub.S@51 PS6, Line 51: /* allows the STM to bring up SMM in 32-bit mode*/
Please add a space before */.
Done
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33235
to look at the new patch set (#7).
Change subject: cpu/x86/smm: Add STM Support ......................................................................
cpu/x86/smm: Add STM Support
SMI Handler modifications needed to set up the SMM descriptors used by the STM during its initialization
Change-Id: I935cd5a8bc0bf293240324c2e3a04a655d44c69f Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/smm/smm_module_handler.c M src/cpu/x86/smm/smm_module_loader.c M src/cpu/x86/smm/smm_stub.S M src/include/cpu/x86/smm.h 4 files changed, 96 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/33235/7
Name of user not set #1002358 has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33235 )
Change subject: cpu/x86/smm: Add STM Support ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/#/c/33235/7/src/cpu/x86/smm/smm_module_handler.c File src/cpu/x86/smm/smm_module_handler.c:
https://review.coreboot.org/#/c/33235/7/src/cpu/x86/smm/smm_module_handler.c... PS7, Line 199: setup_smm_descriptor(smbase, smm_runtime->save_state_size,
line over 80 characters
Done
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33235
to look at the new patch set (#8).
Change subject: cpu/x86/smm: Add STM Support ......................................................................
cpu/x86/smm: Add STM Support
SMI Handler modifications needed to set up the SMM descriptors used by the STM during its initialization
Change-Id: I935cd5a8bc0bf293240324c2e3a04a655d44c69f Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/smm/smm_module_handler.c M src/cpu/x86/smm/smm_module_loader.c M src/cpu/x86/smm/smm_stub.S M src/include/cpu/x86/smm.h 4 files changed, 97 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/33235/8
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33235
to look at the new patch set (#12).
Change subject: cpu/x86/smm: Add STM Support ......................................................................
cpu/x86/smm: Add STM Support
SMI Handler modifications needed to set up the SMM descriptors used by the STM during its initialization
Change-Id: I935cd5a8bc0bf293240324c2e3a04a655d44c69f Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/smm/smm_module_handler.c M src/cpu/x86/smm/smm_module_loader.c M src/cpu/x86/smm/smm_stub.S D src/include/cpu/x86/smm.h 4 files changed, 99 insertions(+), 594 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/33235/12
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33235
to look at the new patch set (#13).
Change subject: cpu/x86/smm: Add STM Support ......................................................................
cpu/x86/smm: Add STM Support
SMI Handler modifications needed to set up the SMM descriptors used by the STM during its initialization
Change-Id: I935cd5a8bc0bf293240324c2e3a04a655d44c69f Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/smm/smm_module_handler.c M src/cpu/x86/smm/smm_module_loader.c M src/cpu/x86/smm/smm_stub.S 3 files changed, 99 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/33235/13
Name of user not set #1002358 has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33235 )
Change subject: cpu/x86/smm: Add STM Support ......................................................................
Patch Set 13:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33235/6/src/cpu/x86/smm/smm_stub.S File src/cpu/x86/smm/smm_stub.S:
https://review.coreboot.org/c/coreboot/+/33235/6/src/cpu/x86/smm/smm_stub.S@... PS6, Line 51: /* allows the STM to bring up SMM in 32-bit mode*/
Done
Done
Name of user not set #1002358 has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33235 )
Change subject: cpu/x86/smm: Add STM Support ......................................................................
Patch Set 13:
(1 comment)
Patch Set 6:
(14 comments)
Patch Set 6:
Eugene, if you're willing, I'd like to help you get this into Coreboot Normal Form. It's not that there's anything terribly wrong with this code, it just needs to be reshaped a tad. Can I help?
Thanks for the offer. The next patch set will non-CamelCase and it should be in line with the coreboot coding standard. So, wait until I put out the next patchset as it is 99% done.
https://review.coreboot.org/c/coreboot/+/33235/6/src/cpu/x86/smm/smm_module_... File src/cpu/x86/smm/smm_module_handler.c:
https://review.coreboot.org/c/coreboot/+/33235/6/src/cpu/x86/smm/smm_module_... PS6, Line 198: printk(BIOS_DEBUG, "MSEG Initialized (%d) 0x%08x 0x%08x\n",
The MSEG (MSR) and SMM Descriptor has to be initialized on a per-thread (logical processor) basis. […]
Done
Name of user not set #1002358 has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33235 )
Change subject: cpu/x86/smm: Add STM Support ......................................................................
Patch Set 13:
Patch Set 6:
(14 comments)
Patch Set 6:
Eugene, if you're willing, I'd like to help you get this into Coreboot Normal Form. It's not that there's anything terribly wrong with this code, it just needs to be reshaped a tad. Can I help?
Thanks for the offer. The next patch set will non-CamelCase and it should be in line with the coreboot coding standard. So, wait until I put out the next patchset as it is 99% done.
Name of user not set #1002358 has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33235 )
Change subject: cpu/x86/smm: Add STM Support ......................................................................
Patch Set 13:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33235/6/src/cpu/x86/smm/smm_stub.S File src/cpu/x86/smm/smm_stub.S:
https://review.coreboot.org/c/coreboot/+/33235/6/src/cpu/x86/smm/smm_stub.S@... PS6, Line 277:
Please add a space.
Done
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33235
to look at the new patch set (#14).
Change subject: cpu/x86/smm: Add STM Support ......................................................................
cpu/x86/smm: Add STM Support
SMI Handler modifications needed to set up the SMM descriptors used by the STM during its initialization
Change-Id: I935cd5a8bc0bf293240324c2e3a04a655d44c69f Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/smm/smm_module_handler.c M src/cpu/x86/smm/smm_module_loader.c M src/cpu/x86/smm/smm_stub.S 3 files changed, 28 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/33235/14
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33235
to look at the new patch set (#15).
Change subject: cpu/x86/smm: Add STM Support ......................................................................
cpu/x86/smm: Add STM Support
SMI Handler modifications needed to set up the SMM descriptors used by the STM during its initialization
Change-Id: I935cd5a8bc0bf293240324c2e3a04a655d44c69f Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/smm/smm_module_loader.c M src/cpu/x86/smm/smm_stub.S 2 files changed, 28 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/33235/15
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33235
to look at the new patch set (#16).
Change subject: cpu/x86/smm: Add STM Support ......................................................................
cpu/x86/smm: Add STM Support
SMI Handler modifications needed to set up the SMM descriptors used by the STM during its initialization
Change-Id: I935cd5a8bc0bf293240324c2e3a04a655d44c69f Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/smm/smm_module_loader.c M src/cpu/x86/smm/smm_stub.S 2 files changed, 27 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/33235/16
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33235
to look at the new patch set (#22).
Change subject: cpu/x86/smm: Add STM Support ......................................................................
cpu/x86/smm: Add STM Support
SMI module loader modifications needed to set up the SMM descriptors used by the STM during its initialization
Change-Id: I935cd5a8bc0bf293240324c2e3a04a655d44c69f Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/smm/smm_module_loader.c 1 file changed, 18 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/33235/22
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33235
to look at the new patch set (#24).
Change subject: cpu/x86/smm: Add STM Support ......................................................................
cpu/x86/smm: Add STM Support
SMI module loader modifications needed to set up the SMM descriptors used by the STM during its initialization
Change-Id: I935cd5a8bc0bf293240324c2e3a04a655d44c69f Signed-off-by: Eugene D. Myers edmyers@tycho.nsa.gov --- M src/cpu/x86/smm/smm_module_loader.c 1 file changed, 18 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/33235/24
Name of user not set #1002358 has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/33235 )
Change subject: cpu/x86/smm: Add STM Support ......................................................................
Abandoned
Squashed into CL #33234
-
build bot (Jenkins) (Code Review) -
Name of user not set (Code Review)
-
Patrick Rudolph (Code Review)
-
Paul Menzel (Code Review)
-
ron minnich (Code Review)