coreboot-gerrit September 2021

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Change in coreboot[master]: util/cbftool: Fix the bug in parsing Uefipayload with extended header
by duntan (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Ray Ni, Patrick Rudolph. duntan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57296 ) Change subject: util/cbftool: Fix the bug in parsing Uefipayload with extended header ...................................................................... Patch Set 3: (1 comment) Patchset: PS2: > Please wrap the line in the commit message at 75 chars. Commit message has been updated. The line in commit message has been wrapped within 75 chars. -- To view, visit https://review.coreboot.org/c/coreboot/+/57296 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id063efb1c8e6c7a96ec2182e87b71c7e8b7b6423 Gerrit-Change-Number: 57296 Gerrit-PatchSet: 3 Gerrit-Owner: duntan <dun.tan(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ray Ni <ray.ni(a)intel.com> Gerrit-Attention: Ray Ni <ray.ni(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Wed, 01 Sep 2021 08:02:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: comment

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Change in coreboot[master]: util/cbftool: Fix the bug in parsing Uefipayload with extended header
by duntan (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Ray Ni, duntan. Hello build bot (Jenkins), Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57296 to look at the new patch set (#3). Change subject: util/cbftool: Fix the bug in parsing Uefipayload with extended header ...................................................................... util/cbftool: Fix the bug in parsing Uefipayload with extended header The patch is to fix "Not a usable UEFI firmware volume" issue when creating CBFS/flash image. This issue is caused by adding FvNameGuid in UefiPayloadEntry.fdf in EDKII. There is an ext header between header of Fv and header of PayloadEntry in Fv with FvNameGuid. The ext header causes the UefiPayloadEntry to be found incorrectly when parsing Fv. Signed-off-by: Dun Tan <dun.tan(a)intel.com> Change-Id: Id063efb1c8e6c7a96ec2182e87b71c7e8b7b6423 --- M util/cbfstool/cbfs-mkpayload.c M util/cbfstool/fv.h 2 files changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/57296/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/57296 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id063efb1c8e6c7a96ec2182e87b71c7e8b7b6423 Gerrit-Change-Number: 57296 Gerrit-PatchSet: 3 Gerrit-Owner: duntan <dun.tan(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ray Ni <ray.ni(a)intel.com> Gerrit-Attention: Ray Ni <ray.ni(a)intel.com> Gerrit-Attention: duntan <dun.tan(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/cbftool: Fix the bug in parsing Uefipayload with extended header
by Patrick Rudolph (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Ray Ni, duntan. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57296 ) Change subject: util/cbftool: Fix the bug in parsing Uefipayload with extended header ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Patchset: PS2: Please wrap the line in the commit message at 75 chars. -- To view, visit https://review.coreboot.org/c/coreboot/+/57296 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id063efb1c8e6c7a96ec2182e87b71c7e8b7b6423 Gerrit-Change-Number: 57296 Gerrit-PatchSet: 2 Gerrit-Owner: duntan <dun.tan(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ray Ni <ray.ni(a)intel.com> Gerrit-Attention: Ray Ni <ray.ni(a)intel.com> Gerrit-Attention: duntan <dun.tan(a)intel.com> Gerrit-Comment-Date: Wed, 01 Sep 2021 07:32:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: qualcomm/sc7180: Clean up drivers with common clock
by Taniya Das (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Shelley Chen, Ravi kumar, Paul Menzel, mturney mturney, Julius Werner. Taniya Das has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56587 ) Change subject: qualcomm/sc7180: Clean up drivers with common clock ...................................................................... Patch Set 7: (8 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/56587/comment/d06dd232_c95b7f39 PS5, Line 7: Cleanups for drivers with common clock > Clean up drivers with common clock Done Patchset: PS7: > Can you please fix the last couple of small things? Thanks! Done. File src/soc/qualcomm/sc7180/clock.c: https://review.coreboot.org/c/coreboot/+/56587/comment/8c6edc37_379abf5b PS5, Line 131: int > When using the CB_xxx error values, please use the return type `enum cb_err` instead of a standard i […] Done https://review.coreboot.org/c/coreboot/+/56587/comment/79cfc9b5_91727140 PS5, Line 172: while > This should be an `if` now Done https://review.coreboot.org/c/coreboot/+/56587/comment/596a41e0_4479276b PS5, Line 183: while > same Done https://review.coreboot.org/c/coreboot/+/56587/comment/b70eda21_95da4262 PS5, Line 311: if (ret < 0) > If you want to use the cb_err type, use it consistently (i.e. […] Done https://review.coreboot.org/c/coreboot/+/56587/comment/a3265a36_4778aeb6 PS5, Line 356: divider > nit: Would be easier to just say `divider * 2 - 1` here? File src/soc/qualcomm/sc7180/watchdog.c: https://review.coreboot.org/c/coreboot/+/56587/comment/d1273fa8_67244462 PS5, Line 8: #define WDOG_RESET_BIT_MASK 1 > If you add this here you also should remove it from clock.h in this same patch. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/56587 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic334fd0d43e5b4b1e43a27d5db7665f0bc151d66 Gerrit-Change-Number: 56587 Gerrit-PatchSet: 7 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Taniya Das <tdas(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Wed, 01 Sep 2021 07:30:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: smbios write 7 table using deterministic cache functions
by Subrata Banik (Code Review) 01 Sep '21

01 Sep '21

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56121 ) Change subject: arch/x86: smbios write 7 table using deterministic cache functions ...................................................................... Patch Set 10: (1 comment) File src/arch/x86/smbios.c: https://review.coreboot.org/c/coreboot/+/56121/comment/f634ebd6_fbf098c1 PS10, Line 813: continue; > Thanks for your reply. […] Can we please give a try with CB:57305 and CB:57306 I guess CB:57306 would help in your. Looks like i have missed to check the unsupported CPUID type hence its not getting skipped at line 803 as mentioned earlier. -- To view, visit https://review.coreboot.org/c/coreboot/+/56121 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iedbd3b745629dea57c3ad6b0d187eab2bcc3f7d3 Gerrit-Change-Number: 56121 Gerrit-PatchSet: 10 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-CC: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Comment-Date: Wed, 01 Sep 2021 07:17:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Check unsupported CPU type while writing to SMBIOS table 7
by Subrata Banik (Code Review) 01 Sep '21

01 Sep '21

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57306 ) Change subject: arch/x86: Check unsupported CPU type while writing to SMBIOS table 7 ...................................................................... arch/x86: Check unsupported CPU type while writing to SMBIOS table 7 Don't attempt to fill the SMBIOS table if the CPU doesn't support deterministic cache CPUID. Change-Id: Id65dc963e235f7080370a32cf69bcc4bee94d28f Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/arch/x86/smbios.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/57306/1 diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index 0af149e..71b6a22 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -765,7 +765,8 @@ if (!cpu_have_cpuid()) return len; - if (cpu_check_deterministic_cache_cpuid_supported() == CPUID_TYPE_INVALID) { + enum cpu_type dcache_cpuid = cpu_check_deterministic_cache_cpuid_supported(); + if (dcache_cpuid == CPUID_TYPE_INVALID || dcache_cpuid == CPUID_COMMAND_UNSUPPORTED) { printk(BIOS_DEBUG, "SMBIOS: Unknown CPU\n"); return len; } -- To view, visit https://review.coreboot.org/c/coreboot/+/57306 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id65dc963e235f7080370a32cf69bcc4bee94d28f Gerrit-Change-Number: 57306 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: arch/x86: Skip returning default leaf value as `0`
by Subrata Banik (Code Review) 01 Sep '21

01 Sep '21

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57305 ) Change subject: arch/x86: Skip returning default leaf value as `0` ...................................................................... arch/x86: Skip returning default leaf value as `0` `cpu_get_cache_info_leaf()` function is responsible to report leaf value for CPU that have support for deterministic cache cpuid. As per available datasheets from AMD and Intel the supported CPUID leaf are 0x8000_001d for AMD and 0x04 for Intel. Hence, this CL skip returning default leaf value as `0`. Change-Id: Iee33b39298e7821ac5280d998172b58a70c8715b Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/arch/x86/cpu_common.c 1 file changed, 2 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/57305/1 diff --git a/src/arch/x86/cpu_common.c b/src/arch/x86/cpu_common.c index 835cddd6..390dbef 100644 --- a/src/arch/x86/cpu_common.c +++ b/src/arch/x86/cpu_common.c @@ -109,14 +109,10 @@ static uint32_t cpu_get_cache_info_leaf(void) { - switch (cpu_check_deterministic_cache_cpuid_supported()) { - case CPUID_TYPE_AMD: + if (cpu_check_deterministic_cache_cpuid_supported() == CPUID_TYPE_AMD) return DETERMINISTIC_CACHE_PARAMETERS_CPUID_AMD; - case CPUID_TYPE_INTEL: + else return DETERMINISTIC_CACHE_PARAMETERS_CPUID_IA; - default: - return 0; - } } size_t cpu_get_cache_ways_assoc_info(const struct cpu_cache_info *info) -- To view, visit https://review.coreboot.org/c/coreboot/+/57305 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iee33b39298e7821ac5280d998172b58a70c8715b Gerrit-Change-Number: 57305 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/zork: correct MST probes
by Peter Marheine (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Sam McNally, Felix Held. Peter Marheine has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57298 ) Change subject: mb/google/zork: correct MST probes ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > The way the override feature works in device tree is by walking the tree in base tree and override t […] Okay, so the current behavior is intended inasmuch as the current implementation does that but it might become smarter if somebody wanted to do so. Thanks for clarifying. -- To view, visit https://review.coreboot.org/c/coreboot/+/57298 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2a8feb544f3fc198fe6313b226ad8995aad31c3e Gerrit-Change-Number: 57298 Gerrit-PatchSet: 2 Gerrit-Owner: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniel Kurtz <djkurtz(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sam McNally <sammc(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 01 Sep 2021 06:52:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Peter Marheine <pmarheine(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: smbios write 7 table using deterministic cache functions
by Subrata Banik (Code Review) 01 Sep '21

01 Sep '21

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56121 ) Change subject: arch/x86: smbios write 7 table using deterministic cache functions ...................................................................... Patch Set 10: (1 comment) File src/arch/x86/smbios.c: https://review.coreboot.org/c/coreboot/+/56121/comment/74184b9a_17019794 PS10, Line 813: continue; > Is it an infinite loop here when fill_cpu_cache_info() return false (will happen if cpu_get_cache_in […] Thanks for your reply. I guessed that if fill_cpu_cache_info() function return 0 then only it might cause the infinite loop. But for that to happen we might need one of below condition is set 1. cpu_get_cache_info_leaf() return 0 2, info is NULL For #1, we already have same check at line https://review.coreboot.org/c/coreboot/+/56121/10/src/arch/x86/smbios.c#803 where we are checking if cpu_check_deterministic_cache_cpuid_supported() doesn't support deterministic cache hence we could "safely" assume that, if the said platform doesn't support this feature then it would have returned from there isn't it? rather enter into this while(1) and then say it doesn't support this CPUID? For #2, do we suspect this ? -- To view, visit https://review.coreboot.org/c/coreboot/+/56121 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iedbd3b745629dea57c3ad6b0d187eab2bcc3f7d3 Gerrit-Change-Number: 56121 Gerrit-PatchSet: 10 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-CC: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Comment-Date: Wed, 01 Sep 2021 06:49:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/volteer: Fix USB4 enabling for volteer family
by Weimin Wu (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Nick Vaccaro. Weimin Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57112 ) Change subject: mb/google/volteer: Fix USB4 enabling for volteer family ...................................................................... Patch Set 4: Code-Review+1 (1 comment) Patchset: PS4: @Nick, could you pls help with CR+2, because there are some CLs sort on this queue. Like these CLs: https://review.coreboot.org/c/coreboot/+/57111 https://review.coreboot.org/c/coreboot/+/57105 Thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/57112 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If380dcb1ea1633b3a1d6932e769cb6ed0a2761c7 Gerrit-Change-Number: 57112 Gerrit-PatchSet: 4 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 01 Sep 2021 06:44:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit September 2021